Search results for "high-speed switch"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Dehui Zhang, Quan Liang Zhao, Jun Gang Han	Design and implementation of an SDH high-speed switch.	ASP-DAC	2005	DBLP DOI BibTeX RDF
2	Jonathan C. L. Liu, Lin Xia, David Hung-Chang Du, Rose P. Tsang, Allalaghatta Pavan	Scheduling Algorithms for A High-Speed Switch Supporting Real-Time Periodic Traffic Sources. (PDF / PS)	LCN	2000	DBLP DOI BibTeX RDF	high-speed switch, real-time periodic traffic sources, fast scheduling algorithms, periodic source flows, real-time delivery requirements, data frames, FCFS algorithm, CBR flows, variable bandwidth requirements, scheduling, real-time systems, packet switching, scheduling algorithms, wide area networks, WAN, telecommunication traffic, multiplexing, mission critical systems, constant bit rate
2	Chao-Ju Hou, Ching-Chih Han, Wun-Chun Chau	Priority-based high-speed switch scheduling for ATM networks. (PDF / PS)	LCN	1995	DBLP DOI BibTeX RDF	iterated switching networks, priority-based high-speed switch scheduling, AN2 switch, parallel iterative matching algorithm, maximal input-output matching, priority lists, input/output pairs, probability analysis, switch size, high QoS requirements, simulation, scheduling, parallel algorithms, computational complexity, asynchronous transfer mode, probability, local area networks, iterative methods, time complexity, ATM networks, iterations, switches, high-performance distributed computing
2	Phyllis Crandall	The Limited Applicability of Block Decomposition in Cluster Computing. (PDF / PS)	HPDC	1995	DBLP DOI BibTeX RDF	block decomposition, high-speed switch technology, mathematical characterizations, contiguous partitioning, ring-connected networks, simulations, performance evaluation, cluster computing, switched network, FDDI, FDDI, token networks
1	Ling Wu, Cheng Li	Architecture design, performance analysis and VLSI implementation of a reconfigurable shared buffer for high-speed switch/router.	Int. J. Communication Systems	2009	DBLP DOI BibTeX RDF
1	Ling Wu, Cheng Li	Performance Modeling of a Reconfigurable Shared Buffer for High-Speed Switch/Router.	ICC	2008	DBLP DOI BibTeX RDF
1	Si-Qing Zheng, Mei Yang	Algorithm-Hardware Codesign of Fast Parallel Round-Robin Arbiters.	IEEE Trans. Parallel Distrib. Syst.	2007	DBLP DOI BibTeX RDF	circuits and systems, round-robin arbiter, parallel processing, matching, Arbitration, switch scheduling
1	Samson Mil'shtein, C. Liessner	High speed switch using pairs of pHEMTs with shifted gates.	Microelectronics Journal	2005	DBLP DOI BibTeX RDF
1	Isaac Keslassy, Murali S. Kodialam, T. V. Lakshman, Dimitrios Stiliadis	On guaranteed smooth scheduling for input-queued switches.	IEEE/ACM Trans. Netw.	2005	DBLP DOI BibTeX RDF	scheduling, router, switch, jitter
1	José Duato	On the Design of High-Speed Switch Fabrics. (PDF / PS)	NCA	2001	DBLP DOI BibTeX RDF
1	Myongsu Choe, Carl Tropper	Flow Control and Dynamic Load Balancing in Time Warp.	Annual Simulation Symposium	2000	DBLP DOI BibTeX RDF	GVT, stochastic learning automata, space-time product, stability, flow control, dynamic load balancing, Time Warp
1	Myongsu Choe, Carl Tropper	On Learning Algorithms and Balancing Loads in Time Warp.	Workshop on Parallel and Distributed Simulation	1999	DBLP BibTeX RDF	GVT, stochastic learning automata, space-time product, stability, flow control, dynamic load balancing, Time Warp
1	Phyllis Crandall, Eranti V. Sumithasri, Mark J. Clement	Performance Comparison of Desktop Multiprocessing and Workstation Cluster Computing. (PDF / PS)	HPDC	1996	DBLP DOI BibTeX RDF	parallel processing, shared memory, threads, distributed memory, Workstation clusters
1	Benjamin J. Ewy, Joseph B. Evans, Victor Frost, Gary J. Minden	TCP/ATM Experiences in the MAGIC Testbed. (PDF / PS)	HPDC	1995	DBLP DOI BibTeX RDF	TCP/ATM, MAGIC testbed, cell level pacing, bandwidth capacity, high performance distributed systems, traffic management infrastructureThe limited applicability of block decomposition in cluster computing - Crandall, P.E. Dept. of Comput, Sci. & Eng., Connecticut Univ., Storrs, USA This Paper Appears in : High Performance Distributed Computing, 1995., Proceedings of the Fourth IEEE International Symposium on on Pages: 102 - 109 This Conference was Held : 2-4 Aug. 1995 1995 ISBN: 0-8186-7088-6 IEEE Catalog Number: 95TB8075 Total Pages: xiv+246 Refer, Mathematical characterizations of the communication costs for contiguous partitioning and block decomposition in both a ring-connected and switched network are presented, Simulations of ring and switch technologies indicate that as network speeds increase and as the effects of message-preparation latency dominate, the advantages claimed for block decomposition diminish, Subject Terms: FDDI, block decomposition, high-speed switch technology, mathematical characterizations, contiguous partitioning, ring-connected networks, simulations, performance evaluation, performance evaluation, performance, asynchronous transfer mode, congestion control, cluster computing, local area networks, transport protocols, performance measurements, wide area networks, CT, switched network, FDDI, congestion avoidance, token networks
1	Thomas E. Anderson, Susan S. Owicki, James B. Saxe, Charles P. Thacker	High Speed Switch Scheduling for Local Area Networks.	ACM Trans. Comput. Syst.	1993	DBLP DOI BibTeX RDF	iterative matching, statistical matching, ATM networks, switching scheduling
1	Thomas E. Anderson, Susan S. Owicki, James B. Saxe, Charles P. Thacker	High Speed Switch Scheduling for Local Area Networks.	ASPLOS	1992	DBLP DOI BibTeX RDF