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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 17 occurrences of 17 keywords
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Results
Found 5 publication records. Showing 5 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 2 | Chuan-Yu Wang, Kaushik Roy |
Control unit synthesis targeting low-power processors. (PDF / PS)  |
ICCD  |
1995 |
DBLP DOI BibTeX RDF |
control unit synthesis, low-power processors, low-power decoding scheme, microprogrammed architecture, nanoprogrammed architecture, 8086 instruction set, instruction opcodes, computer architecture, logic design, encoding, decoding, microprocessor chips, graph embedding, instruction sets, microprogramming, CMOS circuits, logic minimization, system reliability, switching activity, minimisation of switching nets, pseudo-Boolean programming |
| 1 | Balaji V. Iyer, Jason A. Poovey, Thomas M. Conte |
Energy-aware opcode design. |
ICCD |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Dimitris Saougkos, George Manis, Konstantinos Blekas, Apostolos Zarras |
Revisiting Java Bytecode Compression for Embedded and Mobile Computing Environments. |
IEEE Trans. Software Eng. |
2007 |
DBLP DOI BibTeX RDF |
compression (coding), Java |
| 1 | Ramon Canal, Antonio González, James E. Smith |
Software-Controlled Operand-Gating. |
CGO |
2004 |
DBLP DOI BibTeX RDF |
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| 1 | Achim Nohl, Volker Greive, Gunnar Braun, Andreas Hoffmann, Rainer Leupers, Oliver Schliebusch, Heinrich Meyr |
Instruction encoding synthesis for architecture exploration using hierarchical processor models. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
instruction set architectures, instruction encoding |
Displaying result #1 - #5 of 5 (100 per page; Change: )
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