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Searching for phrase integrated circuit manufacture (changed automatically) with no syntactic query expansion in all metadata.

Publication years (Num. hits)
1994 (1) 1995 (1) 1996 (1) 1997 (1)
Publication types (Num. hits)
article(1) inproceedings(3)
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Found 4 publication records. Showing 4 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1C. H. Tong, Juan C. Meza, C. D. Moen Simulation of equipment design optimisation in microelectronics manufacturing. Search on Bibsonomy Annual Simulation Symposium The full citation details ... 1997 DBLP  DOI  BibTeX  RDF equipment design optimisation simulation, microelectronics manufacturing, mathematical formulations, object oriented simulation environment, parametric study, short cycle time chemical vapor deposition reactor, numerical optimization problems, heat conduction, species transport simulation codes, modern optimization software, object oriented optimization environment, software architecture, optimization problems, integrated circuit manufacture
1Prathima Agrawal, B. Narendran, Narayanan Shivakumar Multi-way partitioning of VLSI circuits. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF multi-way partitioning, hierarchical design processes, nets cut metric, VLSI, delays, economics, logic CAD, VLSI layout, integrated circuit layout, VLSI circuits, logic partitioning, minimisation of switching nets, average delay, integrated circuit manufacture, cost metric
1L. F. Fuller, C. Kraaijenvanger Design and manufacture of a 2K transistor p-well CMOS gate array in a student run factory at RIT. Search on Bibsonomy Great Lakes Symposium on VLSI The full citation details ... 1995 DBLP  DOI  BibTeX  RDF educational aids, p-well CMOS gate array, student run factory, microelectronic engineering program, wafer fabrication, logic design, integrated circuit design, integrated circuit design, CMOS logic circuits, logic arrays, teaching tool, integrated circuit manufacture, integrated circuit manufacturing, electronic engineering education
1Claude Thibeault, Yvon Savaria, Jean-Louis Houle A Fast Method to Evaluate the Optimum Number of Spares in Defect-Tolerant Integrated Circuits. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1994 DBLP  DOI  BibTeX  RDF defect-tolerant integrated circuits, optimum number of spares, reconfiguration strategies, optimum redundancy, VLSI, logic testing, redundancy, defect tolerance, circuit reliability, yield models, integrated circuit manufacture
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