Search results for "large-scale CMP"

Found 11 publication records. Showing 11 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Li Zhao, Ravi R. Iyer, Srihari Makineni, Ramesh Illikkal, Jaideep Moses, Donald Newell	Constraint-Aware Large-Scale CMP Cache Design.	HiPC	2007	DBLP DOI BibTeX RDF	Large Scale CMP, constraint-aware design, CAAM, LCMP, cache hierarchy
2	Li Zhao, Ravi R. Iyer, Jaideep Moses, Ramesh Illikkal, Srihari Makineni, Donald Newell	Exploring Large-Scale CMP Architectures Using ManySim.	IEEE Micro	2007	DBLP DOI BibTeX RDF	performance evaluation, architecture, CMP, workload characterization, servers, simulation techniques
2	Bratin Saha, Ali-Reza Adl-Tabatabai, Anwar M. Ghuloum, Mohan Rajagopalan, Richard L. Hudson, Leaf Petersen, Vijay Menon, Brian R. Murphy, Tatiana Shpeisman, Eric Sprangle, Anwar Rohillah, Doug Carmean, Jesse Fang	Enabling scalability and performance in a large scale CMP environment.	EuroSys	2007	DBLP DOI BibTeX RDF	runtime design, scheduler design, sequestered mode, parallel programming, memory management, transactional memory, multi-core processors, synchronization primitives
2	Ravi R. Iyer, Mahesh Bhat, Li Zhao, Ramesh Illikkal, Srihari Makineni, Michael Jones, Kumar Shiv, Donald Newell	Exploring Small-Scale and Large-Scale CMP Architectures for Commercial Java Servers.	IISWC	2006	DBLP DOI BibTeX RDF
1	J. A. Davis, Gihan R. Mudalige, Simon D. Hammond, J. A. Herdman, I. Miller, Stephen A. Jarvis	Predictive analysis of a hydrodynamics application on large-scale CMP clusters.	Computer Science - R&D	2011	DBLP DOI BibTeX RDF
1	Baik Song An, Ki Hwan Yum, Eun Jung Kim	Scalable and Efficient Bounds Checking for Large-Scale CMP Environments.	PACT	2011	DBLP DOI BibTeX RDF
1	Chongmin Li, Haixia Wang, Yibo Xue, Xi Zhang, Dongsheng Wang	Fast Hierarchical Cache Directory: A Scalable Cache Organization for Large-Scale CMP.	NAS	2010	DBLP DOI BibTeX RDF	Hierarchical cache directory, Multi-level directory, Chip multiprocessors
1	Daniel Sanchez, Richard M. Yoo, Christos Kozyrakis	Flexible architectural support for fine-grain scheduling.	ASPLOS	2010	DBLP DOI BibTeX RDF	fine-grain scheduling, scheduling, chip-multiprocessors, messaging, many-core, work-stealing
1	Wenlong Li, Eric Li, Aamer Jaleel, Jiulong Shan, Yurong Chen, Qigang Wang, Ravi R. Iyer, Ramesh Illikkal, Yimin Zhang, Dong Liu, Michael Liao, Wei Wei, Jinhua Du	Understanding the Memory Performance of Data-Mining Workloads on Small, Medium, and Large-Scale CMPs Using Hardware-Software Co-simulation.	ISPASS	2007	DBLP DOI BibTeX RDF	DRAM caches, small-scale CMP, medium-scale CMP, large-scale CMP, hardware-software co-simulation, terabyte-level workloads, multithreaded data mining applications, cache design, memory performance, multicore systems, memory system performance
1	Donald Newell	Workloads, Scalability, and QoS Considerations in CMP Platforms.	ISPASS	2007	DBLP DOI BibTeX RDF
1	John D. Davis, Stephen E. Richardson, Charis Charitsis, Kunle Olukotun	A chip prototyping substrate: the flexible architecture for simulation and testing (FAST).	SIGARCH Computer Architecture News	2005	DBLP DOI BibTeX RDF