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Searching for phrase local clock buffer (changed automatically) with no syntactic query expansion in all metadata.

Publication years (Num. hits)
2006 (2) 2010 (1)
Publication types (Num. hits)
inproceedings(3)
Venues (Conferences, Journals, ...)
ISLPED(2) ASP-DAC(1)
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Found 3 publication records. Showing 3 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Martin Saint-Laurent, Animesh Datta A low-power clock gating cell optimized for low-voltage operation in a 45-nm technology. Search on Bibsonomy ISLPED The full citation details ... 2010 DBLP  DOI  BibTeX  RDF clock gater, clock gating cell, local clock buffer, set-reset latch
1Dac Pham, Hans-Werner Anderson, Erwin Behnen, Mark Bolliger, Sanjay Gupta, H. Peter Hofstee, Paul E. Harvey, Charles R. Johns, James A. Kahle, Atsushi Kameyama, John M. Keaty, Bob Le, Sang Lee, Tuyen V. Nguyen, John G. Petrovick, Mydung Pham, Juergen Pille, Stephen D. Posluszny, Mack W. Riley, Joseph Verock, James D. Warnock, Steve Weitzel, Dieter F. Wendel Key features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor. Search on Bibsonomy ASP-DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF 64-bit Power Architecture, design dependency solution, digital thermal sensor, flexible IO, hardware content protection, high-performance latch, linear sensor, local clock buffer, multi-operating system, synergistic processor, real-time system, modularity, power management, Linux, multi-core, multi-threading, SOC, thermal management, design environment, CELL Processor, clock distribution, virtualization technology, SOI, correct-by-construction, re-use, design hierarchy
1Pong-Fei Lu, Nianzheng Cao, Leon J. Sigal, Pieter Woltgens, Raphael Robertazzi, David F. Heidel A pulsed low-voltage swing latch for reduced power dissipation in high-frequency microprocessors. Search on Bibsonomy ISLPED The full citation details ... 2006 DBLP  DOI  BibTeX  RDF pulse latch, low-power, latch
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