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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 42 occurrences of 37 keywords
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Results
Found 28 publication records. Showing 28 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 2 | Ajay Nair, Roman L. Lysecky |
Non-intrusive dynamic application profiler for detailed loop execution characterization.  |
CASES  |
2008 |
DBLP DOI BibTeX RDF |
nonintrusive, embedded systems, profiling, dynamic optimization |
| 2 | Volodymyr Beletskyy |
A Correction Method for Parallel Loop Execution.  |
International Conference on Computational Science  |
2002 |
DBLP DOI BibTeX RDF |
|
| 2 | Tien-Fu Chen |
Efficient trace-sampling simulation techniques for cache performance analysis.  |
Annual Simulation Symposium  |
1996 |
DBLP DOI BibTeX RDF |
efficient trace sampling simulation techniques, cache performance analysis, large cache simulation, space sampling technique, index of locality, trace references, time sampling approach, inter loop intervals, time sampling technique, representative performance results, loop execution, simulation time, small estimate errors, performance evaluation, virtual machines, digital simulation, performance metric, cache storage, stratified sampling, loop iterations, trace reduction |
| 2 | Zbigniew Chamski |
Enumeration of dense non-convex iteration sets.  |
PDP  |
1995 |
DBLP DOI BibTeX RDF |
dense non-convex iteration sets, algorithmic problems, iteration domains, loop structures, arbitrary unions, dense convex polyhedra, incremental construction, nested loop sequence, loop execution, parallel algorithms, parallel programming, parallel programming, set theory, polyhedron, scientific programs |
| 2 | Karl J. Ottenstein |
A Simplified Framework for Reduction in Strength.  |
IEEE Trans. Software Eng.  |
1989 |
DBLP DOI BibTeX RDF |
loop execution, sequential processors, induction variable substitution, register requirements, array dependences, language fragments, iteration test replacement, target code, program compilers, parallelizing compilers, execution time, teaching tool, inverse transformation |
| 1 | Yangchun Luo, Venkatesan Packirisamy, Wei-Chung Hsu, Antonia Zhai, Nikhil Mungre, Ankit Tarkas |
Dynamic performance tuning for speculative threads.  |
ISCA  |
2009 |
DBLP DOI BibTeX RDF |
parallelism, multicore, dynamic optimization, thread-level speculation |
| 1 | Andrea Marongiu, Andrea Acquaviva, Luca Benini |
OpenMP Support for NBTI-Induced Aging Tolerance in MPSoCs.  |
SSS  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Pietro Longo, Andrea Sterbini, Marco Temperini |
TSW: A Web-Based Automatic Correction System for C Programming Exercises.  |
WSKS  |
2009 |
DBLP DOI BibTeX RDF |
automatic grading, automatic correction, programming exercises |
| 1 | Ricolindo Cariño, Ioana Banicescu |
Dynamic load balancing with adaptive factoring methods in scientific applications.  |
The Journal of Supercomputing  |
2008 |
DBLP DOI BibTeX RDF |
Adaptive weighted factoring, Dynamic load balancing |
| 1 | Florin Balasa, Per Gunnar Kjeldsberg, Arnout Vandecappelle, Martin Palkovic, Qubo Hu, Hongwei Zhu, Francky Catthoor |
Storage Estimation and Design Space Exploration Methodologies for the Memory Management of Signal Processing Applications.  |
Signal Processing Systems  |
2008 |
DBLP DOI BibTeX RDF |
Memory size evaluation, Digital signal processing, Memory management, Loop transformations |
| 1 | Wei Zhang 0002, Bramha Allu |
Reducing branch predictor leakage energy by exploiting loops.  |
ACM Trans. Embedded Comput. Syst.  |
2007 |
DBLP DOI BibTeX RDF |
compiler, Branch prediction, leakage energy |
| 1 | Riad Ben Mouhoub, Omar Hammami |
System-Level Design Methodology with Direct Execution For Multiprocessors on SoPC.  |
ISQED  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei Zhang 0002, Bramha Allu |
Loop-based leakage control for branch predictors.  |
CASES  |
2004 |
DBLP DOI BibTeX RDF |
compiler, branch prediction, leakage energy |
| 1 | Bogong Su, Jian Wang, Erh-Wen Hu, Joseph Manzano |
Software De-Pipelining Technique.  |
SCAM  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Patrick Riley, George F. Riley |
Next generation modeling III - agents: Spades - a distributed agent simulation environment with software-in-the-loop execution.  |
Winter Simulation Conference  |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Osvaldo Colavin, Davide Rizzo |
A scalable wide-issue clustered VLIW with a reconfigurable interconnect.  |
CASES  |
2003 |
DBLP DOI BibTeX RDF |
clustered VLIW, reconfigurable co-processor (RCP), modulo scheduling, IDCT |
| 1 | SangMin Shim, Soo-Mook Moon |
Split-Path Enhanced Pipeline Scheduling.  |
IEEE Trans. Parallel Distrib. Syst.  |
2003 |
DBLP DOI BibTeX RDF |
multipath loops, enhanced pipeline scheduling, all-path pipelining, Instruction-level parallelism, software pipelining, modulo scheduling |
| 1 | Volodymyr Beletskyy |
A Technique for Parallel Loop Execution.  |
PARA  |
2002 |
DBLP BibTeX RDF |
|
| 1 | Aristidis Sotiropoulos, Georgios Tsoukalas, Nectarios Koziris |
Enhancing the Performance of Tiled Loop Execution onto Clusters Using Memory Mapped Network Interfaces and Pipelined Schedules. (PDF / PS)  |
IPDPS  |
2002 |
DBLP DOI BibTeX RDF |
Memory Mapped Interfaces, Zero-Copy Protocols, DMA transfers, Loop Tiling, Communication Overlapping |
| 1 | Nestoras E. Evmorfopoulos, Georgios I. Stamoulis, John N. Avaritsiotis |
A Monte Carlo approach for maximum power estimation based onextreme value theory.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Arutyun Avetisyan, Serguei Gaissaryan, Oleg Samovarov |
Possibilities of Optimal Execution of Parallel Programs Containing Simple and Iterated Loops on Heterogeneous Parallel Computational Systems with Distributed Memory.  |
Programming and Computer Software  |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Matthew C. Merten, Wen-mei W. Hwu |
Modulo schedule buffers.  |
MICRO  |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei-Kai Cheng, Youn-Long Lin |
Addressing Optimization for Loop Execution Targeting DSP with Auto-Increment/Decrement Architecture. (PDF / PS)  |
ISSS  |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Cristina Barrado, Jesús Labarta |
Hamiltonian Recurrence for ILP.  |
Euro-Par  |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Chaitanya Tumuluri, Alok N. Choudhary |
Scalable Software Latency Hiding Schemes: Evaluation of the Poststore and Prefetch Options.  |
Euro-Par, Vol. II  |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Carl J. Beckmann, Constantine D. Polychronopoulos |
Fast barrier synchronization hardware.  |
SC  |
1990 |
DBLP BibTeX RDF |
|
| 1 | James C. Dehnert, Peter Y.-T. Hsu, Joseph P. Bratt |
Overlapped Loop Support in the Cydra 5.  |
ASPLOS  |
1989 |
DBLP DOI BibTeX RDF |
Cydra 5 |
| 1 | Young Man Kim, Kyungsook Y. Lee |
Performance analysis of buffered banyan networks under nonuniform traffic.  |
ICS  |
1989 |
DBLP DOI BibTeX RDF |
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