Search results for "low-power datapath synthesis"

Searching for phrase low-power datapath synthesis (changed automatically) with no syntactic query expansion in all metadata.

Found 4 publication records. Showing 4 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Nilanjan Banerjee, Arijit Raychowdhury, Kaushik Roy, Swarup Bhunia, Hamid Mahmoodi	Novel Low-Overhead Operand Isolation Techniques for Low-Power Datapath Synthesis.	IEEE Trans. VLSI Syst.	2006	DBLP DOI BibTeX RDF
2	Nilanjan Banerjee, Arijit Raychowdhury, Swarup Bhunia, Hamid Mahmoodi-Meimand, Kaushik Roy	Novel Low-Overhead Operand Isolation Techniques for Low-Power Datapath Synthesis.	ICCD	2005	DBLP DOI BibTeX RDF
1	Saraju P. Mohanty, N. Ranganathan	Energy-efficient datapath scheduling using multiple voltages and dynamic clocking.	ACM Trans. Design Autom. Electr. Syst.	2005	DBLP DOI BibTeX RDF	dynamic frequency clocking, low-power datapath synthesis, multiple voltage scheduling, time-constrained scheduling, High-level synthesis, resource-constrained scheduling
1	Vamsi K. Srikantam, N. Ranganathan, Srikanth Srinivasan	CREAM: Combined Register and Module Assignment with Floorplanning for Low Power Datapath Synthesis.	VLSI Design	2000	DBLP DOI BibTeX RDF	Register and Module Assignment Design for low power, High level synthesis, Low power design, Floorplanning

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