Search results for "memory performance"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Sangsoo Park, Yonghee Lee, Heonshik Shin	An experimental analysis of the effect of the operating system on memory performance in embedded multimedia computing.	EMSOFT	2004	DBLP DOI BibTeX RDF	multimedia, embedded system, operating system, memory performance
2	Wenlong Li, Eric Li, Aamer Jaleel, Jiulong Shan, Yurong Chen, Qigang Wang, Ravi R. Iyer, Ramesh Illikkal, Yimin Zhang, Dong Liu, Michael Liao, Wei Wei, Jinhua Du	Understanding the Memory Performance of Data-Mining Workloads on Small, Medium, and Large-Scale CMPs Using Hardware-Software Co-simulation.	ISPASS	2007	DBLP DOI BibTeX RDF	DRAM caches, small-scale CMP, medium-scale CMP, large-scale CMP, hardware-software co-simulation, terabyte-level workloads, multithreaded data mining applications, cache design, memory performance, multicore systems, memory system performance
2	Yong Chen, Surendra Byna, Xian-He Sun	Data access history cache and associated data prefetching mechanisms.	SC	2007	DBLP DOI BibTeX RDF	data access performance, prefetching simulation, cache memory, data prefetching, memory performance
2	Annie (Yujuan) Zeng, Kenneth Rose, Ronald J. Gutmann	Memory performance prediction for high-performance microprocessors at deep submicrometer technologies.	IEEE Trans. on CAD of Integrated Circuits and Systems	2006	DBLP DOI BibTeX RDF
2	Akihiro Musa, Hiroyuki Takizawa, Koki Okabe, Takashi Soga, Hiroaki Kobayashi	Implications of Memory Performance for Highly Efficient Supercomputing of Scientific Applications.	ISPA	2006	DBLP DOI BibTeX RDF
2	Andres Teene, Bob Davis, R. Castagnetti, J. Brown, S. Ramesh	Impact of Interconnect Process Variations on Memory Performance and Design.	ISQED	2005	DBLP DOI BibTeX RDF
2	Jeffrey K. Hollingsworth, Allan Snavely, Simone Sbaraglia, Kattamuri Ekanadham	EMPS: An Environment for Memory Performance Studies.	IPDPS	2005	DBLP DOI BibTeX RDF
2	Ying Chen, Karthik Ranganathan, Vasudev V. Pai, David J. Lilja, Kia Bazargan	Enhancing the Memory Performance of Embedded Systems with the Flexible Sequential and Random Access Memory.	Asia-Pacific Computer Systems Architecture Conference	2004	DBLP DOI BibTeX RDF
2	Kari Kallinen, Jari Laarni, Niklas Ravaja, Timo Saari	Gender and habitual use of media moderate the memory performance in emotional-multimodal context.	NordiCHI	2004	DBLP DOI BibTeX RDF	media use, multimedia, emotions, audio, gender, text, memory performance
2	Chitra Natarajan, Bruce Christenson, Faye A. Briggs	A study of performance impact of memory controller features in multi-processor server environment.	WMPI	2004	DBLP DOI BibTeX RDF	memory transaction scheduling, server systems, multi-processors, memory controller, memory subsystem, performance impact
2	Keun Soo Yim, Jang-Soo Lee, Jihong Kim, Shin-Dug Kim, Kern Koh	A Space-Efficient On-Chip Compressed Cache Organization for High Performance Computing.	ISPA	2004	DBLP DOI BibTeX RDF	processor-memory performance gap, on-chip compressed cache, fine-grained management, internal fragmentation problem, Parallel processing
2	Robbert-Jan Beun, Eveliene de Vos, Cilia Witteman	Embodied Conversational Agents: Effects on Memory Performance and Anthropomorphisation.	IVA	2003	DBLP DOI BibTeX RDF
2	Venkata K. Pingali, Sally A. McKee, Wilson C. Hsieh, John B. Carter	Restructuring Computations for Temporal Data Cache Locality.	International Journal of Parallel Programming	2003	DBLP DOI BibTeX RDF	optimization, data structures, Memory performance
2	Venkata K. Pingali, Sally A. McKee, Wilson C. Hsieh, John B. Carter	Computation regrouping: restructuring programs for temporal data cache locality.	ICS	2002	DBLP DOI BibTeX RDF	optimization, data structures, memory performance
2	Trishul M. Chilimbi, Martin Hirzel	Dynamic Hot Data Stream Prefetching for General-Purpose Programs.	PLDI	2002	DBLP DOI BibTeX RDF	data reference profiling, memory performance optimization, temporal profiling, prefetching, dynamic optimization, dynamic profiling
2	Dimitrios S. Nikolopoulos, Theodore S. Papatheodorou, Constantine D. Polychronopoulos, Jesús Labarta, Eduard Ayguadé	UPMLIB: A Runtime System for Tuning the Memory Performance of OpenMP Programs on Scalable Shared-Memory Multiprocessors.	LCR	2000	DBLP DOI BibTeX RDF	operating systems, memory management, OpenMP, runtime systems, scalable shared-memory multiprocessors
2	Gheith A. Abandah, Edward S. Davidson	Characterizing Distributed Shared Memory Performance: A Case Study of the Convex SPP1000.	IEEE Trans. Parallel Distrib. Syst.	1998	DBLP DOI BibTeX RDF	Convex SPP1000, Performance evaluation, distributed shared memory, memory performance, communication performance, microbenchmarking
2	Yau-Tsun Steven Li, Sharad Malik, Andrew Wolfe	Cache modeling for real-time software: beyond direct mapped instruction caches. (PDF / PS)	IEEE Real-Time Systems Symposium	1996	DBLP DOI BibTeX RDF	direct mapped instruction caches, worst case timing analysis, cache hits, set associative instruction caches, unified caches, cinderella, research, integer-linear-programming, worst case execution time, data caches, cache storage, design tool, memory performance, cache misses, real-time software, tight bound, cache modeling, hardware system
2	Stephen J. Walsh, John A. Board	Pollution control caching. (PDF / PS)	ICCD	1995	DBLP DOI BibTeX RDF	pollution control caching, high speed processors, bandwidth mismatch, standard DRAMS, on-chip caches, miss ratio statistics, expected clock cycles per instruction, main memory latencies, PCC+VB, discrete event simulation, memory architecture, trace driven simulation, cache storage, memory performance, ANOVA, DRAM chips
2	J. E. Smith, W. R. Taylor	Characterizing memory performance in vector multiprocessors.	ICS	1992	DBLP DOI BibTeX RDF
2	Jack W. Davidson, Richard A. Vaughan	The Effect of Instruction Set Complexity on Program Size and Memory Performance.	ASPLOS	1987	DBLP DOI BibTeX RDF
1	Jena B. Hales, James B. Brewer	The Path to Memory Is Guided by Strategy: Distinct Networks Are Engaged in Associative Encoding under Visual and Verbal Strategy and Influence Memory Performance in Healthy and Impaired Individuals.	J. Cognitive Neuroscience	2012	DBLP DOI BibTeX RDF
1	Amir Rizaan Abdul Rahiman, Putra Sumari	Cleaning Process with Efficient Allocation Scheme Improves Flash Memory Performance.	JCP	2012	DBLP DOI BibTeX RDF
1	Krunoslav Stingl, Stephanie Kullmann, Caroline Ketterer, Martin Heni, Hans-Ulrich Häring, Andreas Fritsche, Hubert Preissl	Neuronal correlates of reduced memory performance in overweight subjects.	NeuroImage	2012	DBLP DOI BibTeX RDF
1	Faliang Huang, Shichao Zhang, Changan Yuan, Zhi Zhong	Memory Performance Prediction of Web Server Applications Based on Grey System Theory.	APWeb	2012	DBLP DOI BibTeX RDF
1	Premjit K. Sanjram, Azizuddin Khan	Attention, polychronicity, and expertise in prospective memory performance: Programmers' vulnerability to habit intrusion error in multitasking.	Int. J. Hum.-Comput. Stud.	2011	DBLP DOI BibTeX RDF
1	Martin Vestergaard, Kathrine Skak Madsen, William F. C. Baaré, Arnold Skimminge, Lisser Rye Ejersbo, Thomas Z. Ramsøy, Christian Gerlach, Per Åkeson, Olaf B. Paulson, Terry L. Jernigan	White Matter Microstructure in Superior Longitudinal Fasciculus Associated with Spatial Working Memory Performance in Children.	J. Cognitive Neuroscience	2011	DBLP DOI BibTeX RDF
1	Irene E. Nagel, Claudia Preuschhof, Shu-Chen Li, Lars Nyberg, Lars Bäckman, Ulman Lindenberger, Hauke R. Heekeren	Load Modulation of BOLD Response and Connectivity Predicts Working Memory Performance in Younger and Older Adults.	J. Cognitive Neuroscience	2011	DBLP DOI BibTeX RDF
1	Byunghyun Jang, Dana Schaa, Perhaad Mistry, David R. Kaeli	Exploiting Memory Access Patterns to Improve Memory Performance in Data-Parallel Architectures.	IEEE Trans. Parallel Distrib. Syst.	2011	DBLP DOI BibTeX RDF	General-purpose computation on GPUs (GPGPUs), memory access pattern, memory selection, memory coalescing, data-parallel architectures, vectorization, data parallelism, memory optimization, GPU computing
1	Eelco V. van Dongen, Atsuko Takashima, Markus Barth, Guillén Fernández	Functional connectivity during light sleep is correlated with memory performance for face-location associations.	NeuroImage	2011	DBLP DOI BibTeX RDF
1	Yingbiao Yao, Xianbin Zeng	Fast, Accurate On-Chip Data Memory Performance Estimation.	CSE	2011	DBLP DOI BibTeX RDF
1	Jalil Boukhobza, Pierre Olivier	C-Lash: A Cache System for Optimizing NAND Flash Memory Performance and Lifetime.	DICTAP	2011	DBLP DOI BibTeX RDF
1	Hua Wang, Feiping Nie, Heng Huang, Shannon L. Risacher, Chris H. Q. Ding, Andrew J. Saykin, Li Shen, Adni	Sparse multi-task regression and feature selection to identify brain imaging predictors for memory performance.	ICCV	2011	DBLP DOI BibTeX RDF
1	Daniel Molka, Robert Schöne, Daniel Hackenberg, Matthias S. Müller	Memory Performance and SPEC OpenMP Scalability on Quad-Socket x86_64 Systems.	ICA3PP	2011	DBLP DOI BibTeX RDF
1	Aaron M. Rutman, Wesley C. Clapp, James Z. Chadick, Adam Gazzaley	Early Top-Down Control of Visual Processing Predicts Working Memory Performance.	J. Cognitive Neuroscience	2010	DBLP DOI BibTeX RDF
1	Basilio B. Fraguela, Diego Andrade, Ramon Doallo	Address-Independent Estimation of the Worst-case Memory Performance.	IEEE Trans. Industrial Informatics	2010	DBLP DOI BibTeX RDF
1	Peter Desnoyers	Empirical evaluation of NAND flash memory performance.	Operating Systems Review	2010	DBLP DOI BibTeX RDF
1	Donald E. Porter, Emmett Witchel	Understanding transactional memory performance.	ISPASS	2010	DBLP DOI BibTeX RDF
1	Sean Whitty, Henning Sahlbach, Brady Hurlburt, Rolf Ernst, Wolfram Putzke-Röming	Application-specific memory performance of a heterogeneous reconfigurable architecture.	DATE	2010	DBLP BibTeX RDF
1	Lixia Liu, Zhiyuan Li	Improving parallelism and locality with asynchronous algorithms.	PPOPP	2010	DBLP DOI BibTeX RDF	parallel numerical programs, data locality, memory performance, loop tiling, asynchronous algorithms
1	Jie Tao, Dominic Hillenbrand, Lizhe Wang, Holger Marten	Studying Filter Cache Bypassing on Embedded Systems.	CIT	2010	DBLP DOI BibTeX RDF	simulation, architecture design, cache optimization, memory performance, performance tools
1	Dong Hyuk Woo, Hsien-Hsin S. Lee	COMPASS: a programmable data prefetcher using idle GPU shaders.	ASPLOS	2010	DBLP DOI BibTeX RDF	compute shader, GPU, prefetch
1	Wooyoung Jang, David Z. Pan	Application-aware NoC design for efficient SDRAM access.	DAC	2010	DBLP DOI BibTeX RDF	QoS, memory, flow control, router, NoC, on-chip communication
1	Heiko Hübert	MEMTRACE: a memory, performance and energy profiler targeting RISC-based embedded systems for data intensive applications.		2009	RDF
1	Tianbao Zhuang, Hong Zhao, Zheng Tang	An Analysis of Improving Memory Performance Based on EEG Alpha and Theta Oscillations.	Computer and Information Science	2009	DBLP BibTeX RDF
1	Pamela M. Greenwood, Ramya Sundararajan, Ming-Kuan Lin, Reshma Kumar, Karl J. Fryxell, Raja Parasuraman	Both a Nicotinic Single Nucleotide Polymorphism (SNP) and a Noradrenergic SNP Modulate Working Memory Performance when Attention is Manipulated.	J. Cognitive Neuroscience	2009	DBLP DOI BibTeX RDF
1	Benjamin Straube, Antonia Green, Susanne Weis, Anjan Chatterjee, Tilo Kircher	Memory Effects of Speech and Gesture Binding: Cortical and Hippocampal Activation in Relation to Subsequent Memory Performance.	J. Cognitive Neuroscience	2009	DBLP DOI BibTeX RDF
1	Bithika Khargharia, Salim Hariri, Mazin S. Yousif	An Adaptive Interleaving Technique for Memory Performance-per-Watt Management.	IEEE Trans. Parallel Distrib. Syst.	2009	DBLP DOI BibTeX RDF
1	Itai Benjamini, Yury Makarychev	Balanced Allocation: Memory Performance Tradeoffs	CoRR	2009	DBLP BibTeX RDF
1	Ruibo Wang, Kai Lu, Xicheng Lu	Investigating transactional memory performance on ccNUMA machines.	HPDC	2009	DBLP DOI BibTeX RDF	transactional memory, ccNUMA
1	Daniel Molka, Daniel Hackenberg, Robert Schöne, Matthias S. Müller	Memory Performance and Cache Coherency Effects on an Intel Nehalem Multiprocessor System.	PACT	2009	DBLP DOI BibTeX RDF
1	Yosuke Mori, Kenji Kise	The Cache-Core Architecture to Enhance the Memory Performance on Multi-Core Processors.	PDCAT	2009	DBLP DOI BibTeX RDF
1	Mohammad Ansari, Mikel Luján, Christos Kotselidis, Kim Jarvis, Chris C. Kirkham, Ian Watson	Steal-on-Abort: Improving Transactional Memory Performance through Dynamic Transaction Reordering.	HiPEAC	2009	DBLP DOI BibTeX RDF
1	Junmin Lin, Yu Chen, Wenlong Li, Aamer Jaleel, Zhizhong Tang	Understanding the Memory Behavior of Emerging Multi-core Workloads.	ISPDC	2009	DBLP DOI BibTeX RDF	RMS workload, workload characterization, memory performance
1	Aviad Zuck, Ohad Barzilay, Sivan Toledo	NANDFS: a flexible flash file system for RAM-constrained systems.	EMSOFT	2009	DBLP DOI BibTeX RDF	RAM constrained, page mapping, file system, flash, NAND flash
1	Guangming Tan, Ziyu Guo, Mingyu Chen, Dan Meng	Single-particle 3d reconstruction from cryo-electron microscopy images on GPU.	ICS	2009	DBLP DOI BibTeX RDF	cryo-em, performance tuning, many-core, gpu
1	Cagdas Dirik, Bruce L. Jacob	The performance of PC solid-state disks (SSDs) as a function of bandwidth, concurrency, device architecture, and system organization.	ISCA	2009	DBLP DOI BibTeX RDF	performance, flash memory, storage systems, solid state disks
1	Andrew Putnam, Susan J. Eggers, Dave Bennett, Eric Dellinger, Jeff Mason, Henry Styles, Prasanna Sundararajan, Ralph Wittig	Performance and power of cache-based reconfigurable computing.	ISCA	2009	DBLP DOI BibTeX RDF	c-to-gates, c-to-hardware, co-processor accelerator, many-cache, synthesis compiler, fpga, caches
1	Daniel Hackenberg, Daniel Molka, Wolfgang E. Nagel	Comparing cache architectures and coherency protocols on x86-64 multicore SMP systems.	MICRO	2009	DBLP DOI BibTeX RDF	Nehalem, Shanghai, benchmark, multi-core, coherency
1	Banit Agrawal, Timothy Sherwood	High-bandwidth network memory system through virtual pipelines.	IEEE/ACM Trans. Netw.	2009	DBLP DOI BibTeX RDF	VPNM, bank conflicts, mean time to stall, packet reassembly, virtual pipeline, network, memory, DRAM, universal hashing, memory controller, MTS, packet buffering
1	Yutao Zhong, Xipeng Shen, Chen Ding	Program locality analysis using reuse distance.	ACM Trans. Program. Lang. Syst.	2009	DBLP DOI BibTeX RDF	stack distance, training-based analysis, reuse distance, Program locality
1	Jingfei Kong, Onur Aciiçmez, Jean-Pierre Seifert, Huiyang Zhou	Hardware-software integrated approaches to defend against software cache-based side channel attacks.	HPCA	2009	DBLP DOI BibTeX RDF
1	Pingjing Lu, Yonggang Che, Zhenghua Wang	A Framework for Effective Memory Optimization of High Performance Computing Applications.	HPCC	2009	DBLP DOI BibTeX RDF
1	Qiankun Miao, Yurong Chen, Jianguo Li, Qi Zhang, Yimin Zhang, Guoliang Chen	Parallelization and optimization of a CBVIR system on multi-core architectures.	IPDPS	2009	DBLP DOI BibTeX RDF
1	Tania Mishra, Sartaj Sahni	PETCAM-A power Efficient TCAM for forwarding tables.	ISCC	2009	DBLP DOI BibTeX RDF
1	Matthew A. Watkins, Sally A. McKee, Lambert Schaelicke	Revisiting Cache Block Superloading.	HiPEAC	2009	DBLP DOI BibTeX RDF
1	Toshihiro Hanawa, Mitsuhisa Sato, Jinpil Lee, Takayuki Imada, Hideaki Kimura, Taisuke Boku	Evaluation of Multicore Processors for Embedded Systems by Parallel Benchmark Program Using OpenMP.	IWOMP	2009	DBLP DOI BibTeX RDF
1	Naoyuki Sato, Yoko Yamaguchi	Computational Model-Based Prediction of Human Episodic Memory Performance Based on Eye Movements.	IEICE Transactions	2008	DBLP DOI BibTeX RDF
1	Stéphane Eranian	What can performance counters do for memory subsystem analysis?	MSPC	2008	DBLP DOI BibTeX RDF	PMU, Linux, performance monitoring, performance counters
1	Subhash Saini, Dennis C. Jespersen, Dale Talcott, M. Jahed Djomehri, Timothy Sandstrom	Application-based early performance evaluation of SGI altix 4700 systems for SGI systems.	Conf. Computing Frontiers	2008	DBLP DOI BibTeX RDF	sgi altix 4700, performance analysis, benchmarking, supercomputing
1	Yuri Dotsenko, Naga K. Govindaraju, Peter-Pike J. Sloan, Charles Boyd, John Manferdelli	Fast scan algorithms on graphics processors.	ICS	2008	DBLP DOI BibTeX RDF	all-prefix-sum, segmented scan, parallel algorithm, GPU, GPGPU, scan, HPC, many-core
1	Shirish Tatikonda, Srinivasan Parthasarathy	An adaptive memory conscious approach for mining frequent trees: implications for multi-core architectures.	PPOPP	2008	DBLP DOI BibTeX RDF	CMP architectures, frequent tree mining
1	Yungang Bao, Mingyu Chen, Yuan Ruan, Li Liu, Jianping Fan 0002, Qingbo Yuan, Bo Song, Jianwei Xu	HMTT: a platform independent full-system memory trace monitoring system.	SIGMETRICS	2008	DBLP DOI BibTeX RDF	DIMM, HMTT, memory trace, real system
1	Yaoping Ruan, Vivek S. Pai, Erich M. Nahum, John M. Tracey	Do commodity SMT processors need more OS research?	Operating Systems Review	2008	DBLP DOI BibTeX RDF
1	Seetharami Seelam, I-Hsin Chung, Guojing Cong, Hui-Fang Wen, David J. Klepacki	Workload Performance Characterization of DARPA HPCS Benchmarks.	HPCC	2008	DBLP DOI BibTeX RDF
1	Ji Wu, Yong Po Liu, Xiao-xia Jia, Chao Liu 0002	Mining Open Source Component Behavior and Performance for Reuse Evaluation.	ICYCS	2008	DBLP DOI BibTeX RDF
1	Weiliang Chen, Rod Adams, Lee Calcraft, Volker Steuber, Neil Davey	Connectivity graphs and the performance of sparse associative memory models.	IJCNN	2008	DBLP DOI BibTeX RDF
1	Subhash Saini, Dennis C. Jespersen, Dale Talcott, M. Jahed Djomehri, Timothy Sandstrom	Performance comparison of SGI Altix 4700 and SGI Altix 3700 Bx2.	IPDPS	2008	DBLP DOI BibTeX RDF
1	Qi Zhang, Yurong Chen, Yimin Zhang, Yinlong Xu	SIFT implementation and optimization for multi-core systems.	IPDPS	2008	DBLP DOI BibTeX RDF
1	Ali Emre Pusane, Alberto Jiménez Feltström, Arvind Sridharan, Michael Lentmaier, Kamil Sh. Zigangirov, Daniel J. Costello Jr.	Implementation aspects of LDPC convolutional codes.	IEEE Transactions on Communications	2008	DBLP DOI BibTeX RDF
1	Chung-Ming Chen, Chung-Ho Chen	Configurable VLSI Architecture for Deblocking Filter in H.264/AVC.	IEEE Trans. VLSI Syst.	2008	DBLP DOI BibTeX RDF
1	H'sien J. Wong, Jie Cai, Alistair P. Rendell, Peter E. Strazdins	Micro-benchmarks for Cluster OpenMP Implementations: Memory Consistency Costs.	IWOMP	2008	DBLP DOI BibTeX RDF
1	Aleksander Kolcz, Abdur Chowdhury	Lexicon randomization for near-duplicate detection with I-Match.	The Journal of Supercomputing	2008	DBLP DOI BibTeX RDF	Information retrieval efficiency, Spam detection
1	Ming-Yung Ko, Chung-Ching Shen, Shuvra S. Bhattacharyya	Memory-constrained Block Processing for DSP Software Optimization.	Signal Processing Systems	2008	DBLP DOI BibTeX RDF	block processing, block diagram compiler, activation overhead, embedded systems, memory management, vectorization, dataflow, context switch
1	Sandro Bartolini, Pierfrancesco Foglia, Cosimo Antonio Prete	MEmory performance: DEaling with applications, systems and architecture.	SIGARCH Computer Architecture News	2007	DBLP DOI BibTeX RDF
1	Ahmed A. Moustafa, Anthony S. Maida	Using TD learning to simulate working memory performance in a model of the prefrontal cortex and basal ganglia.	Cognitive Systems Research	2007	DBLP DOI BibTeX RDF
1	Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis	A Memory Hierarchical Layer Assigning and Prefetching Technique to Overcome the Memory Performance/Energy Bottleneck	CoRR	2007	DBLP BibTeX RDF
1	Lu Peng, Jih-Kwon Peir, Tribuvan K. Prakash, Yen-Kuang Chen, David M. Koppelman	Memory Performance and Scalability of Intel's and AMD's Dual-Core Processors: A Case Study.	IPCCC	2007	DBLP DOI BibTeX RDF
1	Zhen Fang, Lixin Zhang 0002, John B. Carter, Ali Ibrahim, Michael Parker	Active memory operations.	ICS	2007	DBLP DOI BibTeX RDF	distributed shared memory, cache coherence, stream processing, DRAM, memory performance, thread synchronization
1	Bingsheng He, Yinan Li, Qiong Luo, Dongqing Yang	A general framework for improving query processing performance on multi-level memory hierarchies.	DaMoN	2007	DBLP DOI BibTeX RDF
1	Isabelle Etcheverry, Patrice Terrier, Jean Claude Marquié	Examining task demands in web interaction and age differences through episodic memory.	ECCE	2007	DBLP DOI BibTeX RDF	internet, aging, information search, episodic memory
1	Júlio C. B. de Mattos, Luigi Carro	Object and method exploration for embedded systems applications.	SBCCI	2007	DBLP DOI BibTeX RDF	object-oriented, design space exploration, embedded software
1	Kris Venstermans, Lieven Eeckhout, Koen De Bosschere	Java object header elimination for reduced memory consumption in 64-bit virtual machines.	TACO	2007	DBLP DOI BibTeX RDF	64-bit implementation, Java object model, implicit typing, typed virtual addressing, Virtual machine
1	Ibrahim Hur, Calvin Lin	Memory scheduling for modern microprocessors.	ACM Trans. Comput. Syst.	2007	DBLP DOI BibTeX RDF	adaptive history-based scheduling, memory scheduling, Memory system performance
1	Liqun Cheng, John B. Carter, Donglai Dai	An Adaptive Cache Coherence Protocol Optimized for Producer-Consumer Sharing.	HPCA	2007	DBLP DOI BibTeX RDF
1	Qi Zhang, Yurong Chen, Jianguo Li, Yimin Zhang, Yinlong Xu	Parallelization and Performance Analysis of Video Feature Extractions on Multi-Core Based Systems.	ICPP	2007	DBLP DOI BibTeX RDF
1	Matthew A. Watkins, Sally A. McKee, Lambert Schaelicke	A Phase-Adaptive Approach to Increasing Cache Performance.	PACT	2007	DBLP DOI BibTeX RDF
1	Najeem Lawal, Mattias O'Nils, Benny Thörnberg	C++ based System Synthesis of Real-Time Video Processing Systems targeting FPGA Implementation.	IPDPS	2007	DBLP DOI BibTeX RDF
1	Nevio Benvenuto, Giambattista Carnevale, Stefano Tomasin	Joint Power Control and Receiver Optimization of CDMA Transceivers Using Successive Interference Cancellation.	IEEE Transactions on Communications	2007	DBLP DOI BibTeX RDF
1	Dong Wang, Xiaowen Chen, Shuming Chen, Xing Fang, Shuwei Sun	FCC-SDP: A Fast Close-Coupled Shared Data Pool for Multi-core DSPs.	Asia-Pacific Computer Systems Architecture Conference	2007	DBLP DOI BibTeX RDF