Search results for "methods and tools"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	G. Henri ter Hofte, Kasper Løvborg Jensen, Petteri Nurmi, Jon Froehlich	Mobile Living Labs 09: Methods and Tools for Evaluation in the Wild: http: //mll09.novay.nl.	Mobile HCI	2009	DBLP DOI BibTeX RDF	in-situ evaluation, mobile, user experience, tools, field study, methods, living labs
2	Yelena Nakhimovsky, Dean Eckles, Jens Riegelsberger	Overcoming challenges in mobile UX research methods and tools.	CHI Extended Abstracts	2009	DBLP DOI BibTeX RDF	mobile research, research methods, research tools
2	Marco Brambilla, Stefano Ceri, Irene Celino, Dario Cerizza, Emanuele Della Valle, Federico Michele Facca, Andrea Turati, Christina Tziviskou	Experiences in the Design of Semantic Services Using Web Engineering Methods and Tools.	J. Data Semantics	2008	DBLP DOI BibTeX RDF
2	Burak Turhan, Ayse Basar Bener	A Multivariate Analysis of Static Code Attributes for Defect Prediction.	QSIC	2007	DBLP DOI BibTeX RDF	Naïve Bayes, Topics: Software Quality, Methods and Tools, Software Metrics, Defect prediction
2	Lech Józwiak, Aleksander Slusarczyk, Dominik Gawlowski	Multi-objective Optimal FSM State Assignment.	DSD	2006	DBLP DOI BibTeX RDF
2	Gerardo Canfora, Luigi Troiano	The importance of dealing with uncertainty in the evaluation of software engineering methods and tools.	SEKE	2002	DBLP DOI BibTeX RDF	evaluation, fuzzy logic, decision support systems, decision making, aggregation
2	Alan R. Hevner, Richard C. Linger	Methods and Tools for Information Systems Development - Introduction. (PDF / PS)	HICSS	1999	DBLP DOI BibTeX RDF
2	Balbir Barn, Alan W. Brown	Methods and Tools for Component Based Development.	TOOLS	1998	DBLP DOI BibTeX RDF
2	Piero Dassovich, Anna Giannetti	Re-engineering a distributed IR system through a disciplined, task-centered approach based on evaluation and metrics.	AVI	1998	DBLP DOI BibTeX RDF	MUSiC methods and tools, evaluation and metrics, re-engineering of legacy systems, information retrieval, interaction design, usability testing, task analysis
2	Stan Jarzabek, Irene Woon	Towards a precise description of reverse engineering methods and tools.	CSMR	1997	DBLP DOI BibTeX RDF	reverse engineering methods, reverse engineering techniques, design abstractions, incomplete program documentation, reverse engineering tools, source language, formal mapping, source language design model, use object recovery scenarios, reverse engineering, program understanding, explicit knowledge, automatic recovery
2	Ulrich Rembold, Rüdiger Dillmann (eds.)	Methods and Tools for Computer Integrated Manufacturing, Advanced CREST Course on Computer Integrated Manufacturing (CIM 83), Karlsruhe, Germany, September 5-16, 1983	Methods and Tools for Computer Integrated Manufacturing	1984	DBLP BibTeX RDF
2	Günter Spur, Frank-Lothar Krause, W. Turowski	N/C-Technology.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Günter Spur, Frank-Lothar Krause, L. Sidarous	Programming of Robots Using Graphical Techniques.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Günter Spur, Frank-Lothar Krause, W. Grottke	Integrated Aspects of Technological Planning.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Günter Spur, Frank-Lothar Krause, H.-M. Anger	Working Techniques of Computer-Aided Process Planning.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Günter Spur, Frank-Lothar Krause, H.-M. Anger	Systems for Computer Aided Process Planning Including Quality Control.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Günter Spur, Frank-Lothar Krause, W. Grottke	Planning of Assembly Sequences.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Maria L. Gini, Giuseppina C. Gini	Towards Automatic Error Recovery in Robot Programs.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Günter Spur, Frank-Lothar Krause, L. Sidarous	Development of APT and EXAPT.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Günter Spur, Frank-Lothar Krause, W. Turowski	N/C-Programming on the Shop Floor Using Graphical Simulation Techniques.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Ferdinand F. Leimkuhler	Economic Analysis of Computer Integrated Manufacturing Systems.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Hans Grabowski, Reiner Anderl	CAD-Systems and their Interface with CAM.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	August-Wilhelm Scheer	Production Control and Information Systems.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Ulrich Rembold, Wolfgang K. Epple	Present State and Future Trends in the Development of Programming Languages for Manufacturing.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Günter Spur, Frank-Lothar Krause, W. Grottke	Graphical Simulation of Manufacturing Processes in Process Planning.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Guy Doumeingts	Methodology to Design Computer Integrated Manufacturing and Control of Manufacturing Units.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Marco Cividini, Giuseppe Villa, Maria L. Gini	Programming a Vision System.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Ramesh Srinivasan, C. Richard Liu	Evolutionary Trends in Generative Process Planning.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Rüdiger Dillmann	Modular Computer Controls for Manufacturing Equipment.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	A. H. Redford	Design for Assembly.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Günter Spur, Frank-Lothar Krause, W. Turowski	The Capsy Process Planning System.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Paul Levi	Quality Assurance and Machine Vision for Inspection.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Günter Spur, Frank-Lothar Krause, W. Turowski	Methodology of Process Planning.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
2	Giuseppina C. Gini, Maria L. Gini	Programming Languages for Manipulation and Vision in Industrial Robots.	Methods and Tools for Computer Integrated Manufacturing	1983	DBLP DOI BibTeX RDF
1	N. Vargas Hernandez, G. Okudan Kremer, L. C. Schmidt, P. R. Acosta Herrera	Development of an expert system to aid engineers in the selection of design for environment methods and tools.	Expert Syst. Appl.	2012	DBLP DOI BibTeX RDF
1	Ante Vilenica, Jan Sudeikat	Methods and Tools for Engineering Self-Organizing Software Systems.	ECEASST	2011	DBLP BibTeX RDF
1	O. G. Sharov, A. N. Afanas'ev	Methods and tools for translation of graphical diagrams.	Programming and Computer Software	2011	DBLP DOI BibTeX RDF
1	B. M. Li, S. Q. (Shane) Xie, X. Xu	Recent development of knowledge-based systems, methods and tools for One-of-a-Kind Production.	Knowl.-Based Syst.	2011	DBLP DOI BibTeX RDF
1	Jens-Uwe Garbas, Béatrice Pesquet-Popescu, André Kaup	Methods and Tools for Wavelet-Based Scalable Multiview Video Coding.	IEEE Trans. Circuits Syst. Video Techn.	2011	DBLP DOI BibTeX RDF
1	Mykola Dyvak, Andriy Pukas, Myroslav Komar	Methods and tools for reducing the risk of damage the reverse laryngeal nerve during the surgical operation on a thyroid.	IDAACS	2011	DBLP DOI BibTeX RDF
1	Mudar Almadi, Diaa Moamar, Vladimir Ryabtsev	New methods and tools for design of tests memory.	EWDTS	2011	DBLP DOI BibTeX RDF
1	Géry Casiez, Nicolas Roussel	No more bricolage!: methods and tools to characterize, replicate and compare pointing transfer functions.	UIST	2011	DBLP DOI BibTeX RDF
1		14th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2011, August 31 - September 2, 2011, Oulu, Finland	DSD	2011	DBLP BibTeX RDF
1	Jean-Paul Blanquart, Eric Armengaud, Philippe Baufreton, Quentin Bourrouilh, Gerhard Griessnig, Martin Krammer, Odile Laurent, Joseph Machrouh, Thomas Peikenkamp, Cecile Schindler, Tormod Wien	Towards Cross-Domains Model-Based Safety Process, Methods and Tools for Critical Embedded Systems: The CESAR Approach.	SAFECOMP	2011	DBLP DOI BibTeX RDF
1	Joseph Sifakis	Methods and tools for component-based system design.	DATE	2011	DBLP BibTeX RDF
1	Alberto Bonanno, Alberto Bocca, Marco Sabatini	Energy analysis methods and tools for modelling and Optimizing monitoring tyre systems.	DATE	2011	DBLP BibTeX RDF
1	Lyudmila F. Nozhenkova, Anna V. Korobko, Tatyana G. Penkova	Methods and tools of on-line analytical data processing for Siberian region government.	MIPRO	2011	DBLP BibTeX RDF
1	Aleksandar Klaic, Nikola Hadjina	Methods and tools for the development of information security policy - A comparative literature review.	MIPRO	2011	DBLP BibTeX RDF
1	Bhuricha Deen Sethanandha	Improving open source software patch contribution process: methods and tools.	ICSE	2011	DBLP DOI BibTeX RDF
1	Tomasz Blaszczyk	Do project managers need an operations research support indeed? (A survey on polish project managers attitude towards operations research methods and tools).	IEEM	2011	DBLP DOI BibTeX RDF
1	Michal Bryk, Lech Józwiak, Wieslaw Kuzmicz	Rapid and Accurate Leakage Power Estimation for Nano-CMOS Circuits.	DSD	2011	DBLP DOI BibTeX RDF
1	Maryam Kamali, Luigia Petre, Kaisa Sere, Masoud Daneshtalab	Formal Modeling of Multicast Communication in 3D NoCs.	DSD	2011	DBLP DOI BibTeX RDF
1	Takieddine Majdoub, Sébastien LeNours, Olivier Pasquier, Fabienne Nouvel	Transaction Level Modeling of a Networked Embedded System Based on a Power Line Communication Protocol.	DSD	2011	DBLP DOI BibTeX RDF
1	Alessandro Bardine, Pierfrancesco Foglia, Francesco Panicucci, Marco Solinas, Julio Sahuquillo	Energy Behaviour of NUCA Caches in CMPs.	DSD	2011	DBLP DOI BibTeX RDF
1	Fataneh Jafari, Mahdi Mosaffa, Siamak Mohammadi	Designing Robust Asynchronous Circuits Based on FinFET Technology.	DSD	2011	DBLP DOI BibTeX RDF
1	Muhammad Awais, Ashwani Singh, Emmanuel Boutillon, Guido Masera	A Novel Architecture for Scalable, High Throughput, Multi-standard LDPC Decoder.	DSD	2011	DBLP DOI BibTeX RDF
1	Farid Lahrach, Abderrahim Doumar, Eric Châtelet	Fault Tolerance of Multiple Logic Faults in SRAM-Based FPGA Systems.	DSD	2011	DBLP DOI BibTeX RDF
1	Nima Aghaee, Zebo Peng, Petru Eles	Adaptive Temperature-Aware SoC Test Scheduling Considering Process Variation.	DSD	2011	DBLP DOI BibTeX RDF
1	Apostolos P. Fournaris, Odysseas G. Koufopavlou	Efficient CRT RSA with SCA Countermeasures.	DSD	2011	DBLP DOI BibTeX RDF
1	Yohei Nakata, Yukihiro Takeuchi, Hiroshi Kawaguchi, Masahiko Yoshimoto	A Process-Variation-Adaptive Network-on-Chip with Variable-Cycle Routers.	DSD	2011	DBLP DOI BibTeX RDF
1	Alfio Lombardo, Carla Panarello, Diego Reforgiato Recupero, Enrico Santagati, Giovanni Schembra	A Module for Packet Hijacking in NetFPGA Platform.	DSD	2011	DBLP DOI BibTeX RDF
1	Richard Ruzicka, Vaclav Simek	Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles.	DSD	2011	DBLP DOI BibTeX RDF
1	Alireza Rohani, Hans G. Kerkhoff	A Technique for Accelerating Injection of Transient Faults in Complex SoCs.	DSD	2011	DBLP DOI BibTeX RDF
1	George Provelengios, Nikolaos S. Voros, Paris Kitsos	Low Power FPGA Implementations of JH and Fugue Hash Functions.	DSD	2011	DBLP DOI BibTeX RDF
1	A. N. Nagamani, S. Nishchai	Quaternary High Performance Arithmetic Logic Unit Design.	DSD	2011	DBLP DOI BibTeX RDF
1	Harmke de Groot, Maryam Ashouei, Julien Penders, Valer Pop, Maja Vidojkovic, Bert Gyselinckx, Refet Firat Yazicioglu	Human++: Key Challenges and Trade-offs in Embedded System Design for Personal Health Care.	DSD	2011	DBLP DOI BibTeX RDF
1	Pedro Miguens Matutino, Ricardo Chaves, Leonel Sousa	Binary-to-RNS Conversion Units for moduli {2^n ± 3}.	DSD	2011	DBLP DOI BibTeX RDF
1	Martin Straka, Jan Kastil, Zdenek Kotásek	SEU Simulation Framework for Xilinx FPGA: First Step towards Testing Fault Tolerant Systems.	DSD	2011	DBLP DOI BibTeX RDF
1	Xin Xin, Jens-Peter Kaps, Kris Gaj	A Configurable Ring-Oscillator-Based PUF for Xilinx FPGAs.	DSD	2011	DBLP DOI BibTeX RDF
1	Ali Abbasinasab, Mehdi Mohammadi, Siamak Mohammadi, Svetlana N. Yanushkevich, Michael Smith	Mutant Fault Injection in Functional Properties of a Model to Improve Coverage Metrics.	DSD	2011	DBLP DOI BibTeX RDF
1	Simon Yuan, Li Hsien Yoong, Partha S. Roop	Compiling Esterel for Multi-core Execution.	DSD	2011	DBLP DOI BibTeX RDF
1	Kris Gaj	Cryptographic Contests: Toward Fair and Comprehensive Benchmarking of Cryptographic Algorithms in Hardware (Abstract).	DSD	2011	DBLP DOI BibTeX RDF
1	Paris Kitsos, Nicolas Sklavos, Athanassios N. Skodras	An FPGA Implementation of the ZUC Stream Cipher.	DSD	2011	DBLP DOI BibTeX RDF
1	Lina Sawalha, Sonya Wolff, Monte P. Tull, Ronald D. Barnes	Phase-Guided Scheduling on Single-ISA Heterogeneous Multicore Processors.	DSD	2011	DBLP DOI BibTeX RDF
1	Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen	LastZ: An Ultra Optimized 3D Networks-on-Chip Architecture.	DSD	2011	DBLP DOI BibTeX RDF
1	Paolo Maistri, Régis Leveugle	10-Gigabit Throughput and Low Area for a Hardware Implementation of the Advanced Encryption Standard.	DSD	2011	DBLP DOI BibTeX RDF
1	Marco Gerards, Christiaan Baaij, Jan Kuper, Matthijs Kooijman	Higher-Order Abstraction in Hardware Descriptions with C?aSH.	DSD	2011	DBLP DOI BibTeX RDF
1	Václav Dvorák, Petr Mikusek	On the Cascade Implementation of Multiple-Output Sparse Logic Functions.	DSD	2011	DBLP DOI BibTeX RDF
1	Rohit Datta, Gerhard Fettweis, Zsolt Kollar, Péter Horváth 0002	FBMC and GFDM Interference Cancellation Schemes for Flexible Digital Radio PHY Design.	DSD	2011	DBLP DOI BibTeX RDF
1	Alice M. Tokarnia, Pedro C. F. Pepe, Leandro D. Pagotto	Path-Based Dynamic Voltage and Frequency Scaling Algorithms for Multiprocessor Embedded Applications with Soft Delay Deadlines.	DSD	2011	DBLP DOI BibTeX RDF
1	Tao Xie, Wolfgang Müller 0003, Florian Letombe	HDL-Mutation Based Simulation Data Generation by Propagation Guided Search.	DSD	2011	DBLP DOI BibTeX RDF
1	Fahimeh Jafari, Shuo Li, Ahmed Hemani	Optimal Selection of Function Implementation in a Hierarchical Configware Synthesis Method for a Coarse Grain Reconfigurable Architecture.	DSD	2011	DBLP DOI BibTeX RDF
1	Jiri Balcarek, Petr Fiser, Jan Schmidt	Techniques for SAT-Based Constrained Test Pattern Generation.	DSD	2011	DBLP DOI BibTeX RDF
1	Choong Geun Lee, Vasily G. Moshnyaga, Koji Hashimoto	Embedded System for Camera-Based TV Power Reduction.	DSD	2011	DBLP DOI BibTeX RDF
1	Khalid Latif 0002, Amir-Mohammad Rahmani, Kameswar Rao Vaddina, Tiberiu Seceleanu, Pasi Liljeberg, Hannu Tenhunen	Enhancing Performance Sustainability of Fault Tolerant Routing Algorithms in NoC-Based Architectures.	DSD	2011	DBLP DOI BibTeX RDF
1	Tevfik Zafer Ozcan, Cagla Cakir, Mert Cetin, Ilker Hamzaoglu	An Overlapped Block Motion Compensation Hardware for Frame Rate Conversion.	DSD	2011	DBLP DOI BibTeX RDF
1	Ahmet Aris, Siddika Berna Örs, Gökay Saldamli	Architectures for Fast Modular Multiplication.	DSD	2011	DBLP DOI BibTeX RDF
1	Antti Kamppi, Lauri Matilainen, Joni-Matti Määttä, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen	Kactus2: Environment for Embedded Product Development Using IP-XACT and MCAPI.	DSD	2011	DBLP DOI BibTeX RDF
1	Johannes Grinschgl, Armin Krieg, Christian Steger, Reinhold Weiss, Holger Bock, Josef Haid	Modular Fault Injector for Multiple Fault Dependability and Security Evaluations.	DSD	2011	DBLP DOI BibTeX RDF
1	Muhammad Aqeel Wahlah, Kees Goossens	PUMA: Placement Unification with Mapping and Guaranteed Throughput Allocation on an FPGA Using a Hardwired NoC.	DSD	2011	DBLP DOI BibTeX RDF
1	Tobias Vejda, Johann Großschädl, Dan Page	A Unified Multiply/Accumulate Unit for Pairing-Based Cryptography over Prime, Binary and Ternary Fields.	DSD	2011	DBLP DOI BibTeX RDF
1	Karthik Chandrasekar 0001, Benny Akesson, Kees Goossens	Improved Power Modeling of DDR SDRAMs.	DSD	2011	DBLP DOI BibTeX RDF
1	Jiaoyan Chen, Dilip P. Vasudevan, Emanuel M. Popovici, Michel P. Schellekens	Design of a Low Power, Sub-Threshold, Asynchronous Arithmetic Logic Unit Using a Bidirectional Adder.	DSD	2011	DBLP DOI BibTeX RDF
1	Mehdi Dehbashi, André Sülflow, Görschwin Fey	Automated Design Debugging in a Testbench-Based Verification Environment.	DSD	2011	DBLP DOI BibTeX RDF
1	Mansour Shafaei, Ahmad Patooghy, Seyed Ghassem Miremadi	Numeral-Based Crosstalk Avoidance Coding to Reliable NoC Design.	DSD	2011	DBLP DOI BibTeX RDF
1	Junfeng Chu, Mohammed Benaissa	A Novel Architecture of Implementing Error Detecting AES Using PRNS.	DSD	2011	DBLP DOI BibTeX RDF
1	Jean-Michel Chabloz, Ahmed Hemani	Low-Latency and Low-Overhead Mesochronous and Plesiochronous Synchronizers.	DSD	2011	DBLP DOI BibTeX RDF
1	Anton Tsertov, Raimund Ubar, Artur Jutman, Sergei Devadze	SoC and Board Modeling for Processor-Centric Board Testing.	DSD	2011	DBLP DOI BibTeX RDF
1	Ittetsu Taniguchi, Mitsuya Uchida, Hiroyuki Tomiyama, Masahiro Fukui, Praveen Raghavan, Francky Catthoor	An Energy Aware Design Space Exploration for VLIW AGU Model with Fine Grained Power Gating.	DSD	2011	DBLP DOI BibTeX RDF
1	Ignacio Algredo-Badillo, Claudia Feregrino Uribe, René Cumplido, Miguel Morales-Sandoval	Novel Hardware Architecture for Implementing the Inner Loop of the SHA-2 Algorithms.	DSD	2011	DBLP DOI BibTeX RDF