Search results for "microsystems"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Mohamad Sawan	Intracortical wireless microsystems for biosensing and neurostimulation.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	bioengineering, implantable devices, biosensors, microsystems, electrical stimulators
3	Khalil Najafi	Low-power micromachined microsystems (invited talk).	ISLPED	2000	DBLP DOI BibTeX RDF	micromachining, power sources, low-power, MEMS, energy harvesting, microsystems
2	Marcel Tichem, Dafina Tanase	A DFA Framework for Hybrid Microsystems.	IPAS	2008	DBLP DOI BibTeX RDF
2	Kerstin Schöttler, Annika Raatz, Jürgen Hesselbach	Precision Assembly of Active Microsystems with a Size-Adapted Assembly System.	IPAS	2008	DBLP DOI BibTeX RDF	precision assembly, assembly system, sensor guidance
2	Jinseok Kim, Jungyul Park, Junghoon Lee, Euisung Yoon, Jong-Oh Park, Sukho Park	Biohybrid microsystems actuated by cardiomyocytes: Microcantilever, microrobot, and micropump.	ICRA	2008	DBLP DOI BibTeX RDF
2	Christian Falconi, Arnaldo D'Amico, Giuseppe Scotti, Alessandro Trifiletti	Dual op amp, LDO regulator with power supply gain suppression for CMOS smart sensors and microsystems.	ISCAS	2008	DBLP DOI BibTeX RDF
2	Mohamad Sawan	Signal Processing Based Implantable Microsystems for Intracortical Therapeutic Purposes.	SiPS	2006	DBLP DOI BibTeX RDF
2	Mian Dong, Chun Zhang, Songping Mai, Zhihua Wang, Dongmei Li	A Wideband Frequency-Shift Keying Demodulator for Wireless Neural Stimulation Microsystems.	VLSI Design	2006	DBLP DOI BibTeX RDF
2	D. Barrettino	Design considerations and recent advances in CMOS-based microsystems for point-of-care clinical diagnostics.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Nizamettin Aydin, Tughrul Arslan, David R. S. Cumming	A direct-sequence spread-spectrum communication system for integrated sensor microsystems.	IEEE Transactions on Information Technology in Biomedicine	2005	DBLP DOI BibTeX RDF
2	Diego Ruben Barrettino, Barry Lutz, Maria Elena Martin, Sarah McQuaide, Deirdre R. Meldrum	CMOS readout and control architecture for single-cell real-time microsystems.	ISCAS	2005	DBLP DOI BibTeX RDF
2	Steven P. Levitan, Jose A. Martinez, Timothy P. Kurzweg, Abhijit Davare, Mark Kahrs, Michael Bails, Donald M. Chiarulli	System simulation of mixed-signal multi-domain microsystems with piecewise linear models.	IEEE Trans. on CAD of Integrated Circuits and Systems	2003	DBLP DOI BibTeX RDF
2	Michael S. McCorquodale, Fadi H. Gebara, Keith L. Kraver, Eric D. Marsman, Robert M. Senger, Richard B. Brown	A Top-Down Microsystems Design Methodology and Associated Challenges .	DATE	2003	DBLP DOI BibTeX RDF
2	Salvatore Baglio, Salvatore Castorina, Luigi Fortuna, Nicolò Savalli	Photo-thermoelectric power generation for autonomous microsystems.	ISCAS	2003	DBLP DOI BibTeX RDF
2	David Harris, David Diaz	TestosterICs: A Low-Cost Functional Chip Tester.	MSE	2003	DBLP DOI BibTeX RDF
2	Tianhao Zhang, Krishnendu Chakrabarty, Richard B. Fair	Design of reconfigurable composite microsystems based on hardware/software codesign principles.	IEEE Trans. on CAD of Integrated Circuits and Systems	2002	DBLP DOI BibTeX RDF
2	Andreas G. Andreou, David H. Goldberg, Eugenio Culurciello, Milutin Stanacevic, Gert Cauwenberghs, Laurence Riddle	Heterogeneous integration of biomimetic acoustic microsystems.	ISCAS	2001	DBLP DOI BibTeX RDF
2	S. K. Tewksbury	Challenges Facing Practical DFT for MEMS. (PDF / PS)	DFT	2001	DBLP DOI BibTeX RDF	Microelectromechanical systems, microsystems technologies, fault tolerance, defect tolerance
2	Jalal Al-Muhtadi, Manish Anand, M. Dennis Mickunas, Roy H. Campbell	Secure Smart Homes using Jini and UIUC SESAME.	ACSAC	2000	DBLP DOI BibTeX RDF	secure smart homes, dynamically configurable consumer devices, distributed security mechanism, Tiny SESAME, distributed devices, Java, Java, access control, distributed processing, public key cryptography, public key cryptography, handheld devices, authorisation, Jini, component-based software, home automation, Kerberos, access rights, Sun Microsystems, smart devices
2	Bruce A. Draper, Walid A. Najjar, A. P. Wim Böhm, Jeffrey Hammes, Robert Rinker, Charlie Ross, Monica Chawathe, José Bins	Compiling and Optimizing Image Processing Algorithms for FPGAs.	CAMP	2000	DBLP DOI BibTeX RDF	SA-C, language features, SA-C algorithms, performance numbers, image processing routines, Annapolis Microsystems WildForce board, Xilinx 4036XL FPGAs, FPGAs, VHDL, optimizing compiler, high-level language, data flow graphs, data flow graphs, image processing algorithms
2	Marcelo Lubaszewski, Érika F. Cota, Bernard Courtois	Microsystems Testing: an Approach and Open Problems.	DATE	1998	DBLP DOI BibTeX RDF	Microsystem Testing, Analog Fault Model, CAT
2	Jean-Michel Karam, Bernard Courtois, Hicham Boutamine	CAD Tools for Bridging Microsystems and Foundries.	IEEE Design & Test of Computers	1997	DBLP DOI BibTeX RDF
2	Jean-Michel Karam, Bernard Courtois, Hicham Boutamine, P. Drake, András Poppe, Vladimir Székely, Márta Rencz, Klaus Hofmann, Manfred Glesner	CAD and Foundries for Microsystems.	DAC	1997	DBLP DOI BibTeX RDF
2	M. Lang, D. David, Manfred Glesner	Automatic transfer of parametric FEM models into CAD-layout formats for top-down design of microsystems.	ED&TC	1997	DBLP DOI BibTeX RDF
2	B. Romanowicz, M. Laudon, P. Lerch, P. Renaud, Hans Peter Amann, A. Boegli, Vincent Moser, Fausto Pellandini	Modeling and simulation of electromechanical transducers in microsystems using an analog hardware description language.	ED&TC	1997	DBLP DOI BibTeX RDF
2	Robert Probst, Peter Kopacek	Latest Developments in Robotics.	EUROCAST	1997	DBLP DOI BibTeX RDF	sensors, service robots, industrial robots, intelligent robots, microsystems
2	Erdmuthe Meyer zu Bexten, Claudio Moraga	A User-Interface for a Microsystems High-Level Simulator.	EUROCAST	1995	DBLP DOI BibTeX RDF
2	Branka Medved Rogina, Bozidar Vojnovic	Metastability evaluation method by propagation delay distribution measurement.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	propagation delay distribution measurement, edge-triggered flip-flops, input signals time relationship, output signal timing characteristics, analytical representation, propagation delay density distribution function, fault events, integrated propagation delay density distribution function, flip-flop normal propagation delay, resolution time constant, automatic data acquisition, complex architecture microsystems, MTBF, latch devices, custom CMOS, VLSI, VLSI, fault diagnosis, logic testing, delays, logic design, asynchronous circuits, flip-flops, data acquisition, failure analysis, reliability analysis, graphical representation, metastability, PLD, asynchronous logic, integrated circuit reliability, statistical measurement
2	C. Truzzi, Eric Beyne, E. Ringoot, J. Peeters	Signal propagation in high-speed MCM circuits. (PDF / PS)	ICCD	1995	DBLP DOI BibTeX RDF	thin film circuits, signal propagation, high-speed MCM circuits, thin-film multichip module substrate, timing analyses, lossy interconnection lines, timing, circuit analysis computing, circuit simulations, CMOS integrated circuits, CMOS integrated circuits, multichip modules, receivers, drivers, microsystems, substrates
1	Tadatomo Suga, Jenn-Ming Song, Yi-Shao Lai	Guest Editorial - Low Temperature Processing for Microelectronics and Microsystems Packaging.	Microelectronics Reliability	2012	DBLP DOI BibTeX RDF
1	Hakan Bilen, Muhammet A. Hocaoglu, Mustafa Unel, Asif Sabanovic	Developing robust vision modules for microsystems applications.	Mach. Vis. Appl.	2012	DBLP DOI BibTeX RDF
1	Tao Sun, Woo-Tae Park, Min-Yuan Cheng, Jing-Zhi An, Rui-Feng Xue, Kwan-Ling Tan, Minkyu Je	Implantable Polyimide Cable for Multichannel High-Data-Rate Neural Recording Microsystems.	IEEE Trans. Biomed. Engineering	2012	DBLP DOI BibTeX RDF
1	Fatih Say, Cüneyt F. Bazlamaçci	A reconfigurable computing platform for real time embedded applications.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Girma S. Tewolde, Darrin M. Hanna, Richard E. Haskell	A modular and efficient hardware architecture for particle swarm optimization algorithm.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Nuno Sebastião, Nuno Roma, Paulo F. Flores	Hardware accelerator architecture for simultaneous short-read DNA sequences alignment with enhanced traceback phase.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	María José Canet, Javier Valls, Vicenc Almenar, José Marín-Roig	FPGA implementation of an OFDM-based WLAN receiver.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Gyu Sang Choi, Ingyu Lee, Mankyu Sung, Choongjae Im	A hybrid SSD with PRAM and NAND Flash memory.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Yusuf Adibelli, Mustafa Parlak, Ilker Hamzaoglu	Computation and power reduction techniques for H.264 intra prediction.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Rabie Ben Atitallah, Éric Piel, Smaïl Niar, Philippe Marquet, Jean-Luc Dekeyser	A fast MPSoC virtual prototyping for intensive signal processing applications.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Prodromos Chatziagorakis, Georgios Ch. Sirakoulis, John N. Lygouras	Design automation of cellular neural networks for data fusion applications.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Merve Peyic, Hakan Baba, Erdem Guleyuboglu, Ilker Hamzaoglu, Mehmet Keskinoz	A low power multi-rate decoder hardware for IEEE 802.11n LDPC codes.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Zheng Ding, Feng Zhao, Wei Shu, Min-You Wu	Face detection system for SVGA source with hecto-scale frame rate on FPGA board.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Po-Yueh Chen, Chao-Chin Wu, Ying-Jie Jiang	Bitmask-based code compression methods for balancing power consumption and code size for hard real-time embedded systems.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Tobias Schumacher, Christian Plessl, Marco Platzner	IMORC: An infrastructure and architecture template for implementing high-performance reconfigurable FPGA accelerators.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Paolo Zicari, Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo	Low-cost FPGA stereo vision system for real time disparity maps calculation.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Omesh Mutukuda, Andy Ye, Gul Khan	Utilizing multi-bit connections to improve the area efficiency of unidirectional routing resources for routing multi-bit signals on FPGAs.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Juan Carlos Pichel, Francisco F. Rivera, Marcos Fernández, Aurelio Rodriguez	Optimization of sparse matrix-vector multiplication using reordering techniques on GPUs.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Anirban Sengupta, Reza Sedaghat, Pallabi Sarkar	Rapid exploration of integrated scheduling and module selection in high level synthesis for application specific processor design.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Dongdong Chen, Seok-Bum Ko	A dynamic non-uniform segmentation method for first-order polynomial function evaluation.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Ruymán Reyes, Francisco de Sande	Optimization strategies in different CUDA architectures using llCoMP.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Robert Czerwinski, Dariusz Kania	Area and speed oriented synthesis of FSMs for PAL-based CPLDs.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Antony W. Savich, Medhat Moussa, Shawki Areibi	A scalable pipelined architecture for real-time computation of MLP-BP neural networks.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Jose Rodrigo Sanjurjo, Margarita Amor, Montserrat Bóo, Ramon Doallo	High-performance Monte Carlo radiosity on GPU based on scene partitioning.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Kishor Sarawadekar, Harihar Bharat Indana, Deep Bera, Swapna Banerjee	VLSI-DSP based real time solution of DSC-SRI for an ultrasound system.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Grigorios Mingas, Emmanouil Tsardoulias, Loukas Petrou	An FPGA implementation of the SMG-SLAM algorithm.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Shahin Sanayei Lotfabadi, Andy Ye, Sridhar Krishnan	Measuring the power efficiency of subthreshold FPGAs for implementing portable biomedical applications.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Ramon Doallo, Margarita Amor, Basilio B. Fraguela	Special issue editorial: Exploitation of hardware accelerators.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Grigorios Chrysos, Apostolos Dollas, Nikolaos G. Bourbakis	An embedded software-reconfigurable color segmentation architecture for image processing systems.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Uwe Meyer-Bäse, Guillermo Botella Juan, Soumak Mookherjee, Encarnación Castillo, Antonio García	Energy optimization of Application-Specific Instruction-Set Processors by using hardware accelerators in semicustom ICs technology.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	M. Tamagnone, M. Martina, Guido Masera	An application specific instruction set processor based implementation for signal detection in multiple antenna systems.	Microprocessors and Microsystems - Embedded Hardware Design	2012	DBLP DOI BibTeX RDF
1	Seetharam Narasimhan, Hillel J. Chiel, Swarup Bhunia	Ultra-Low-Power and Robust Digital-Signal-Processing Hardware for Implantable Neural Interface Microsystems.	IEEE Trans. Biomed. Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Qais Al-Gayem, Hongyuan Liu, Andrew Richardson, Nick Burd	Test Strategies for Electrode Degradation in Bio-Fluidic Microsystems.	J. Electronic Testing	2011	DBLP DOI BibTeX RDF
1	Jean-Frédéric Christmann, Edith Beigné, Cyril Condemine, Pascal Vivet, Jérôme Willemin, Nicolas Leblond, Christian Piguet	Bringing Robustness and Power Efficiency to Autonomous Energy-Harvesting Microsystems.	IEEE Design & Test of Computers	2011	DBLP DOI BibTeX RDF	power management, design and test, energy harvesting, microsystem, asynchronous controller
1	Tung-Chien Chen, Yun-Yu Chen, Tsung-Chuan Ma, Liang-Gee Chen	Design and implementation of cubic spline interpolation for spike sorting microsystems.	ICASSP	2011	DBLP DOI BibTeX RDF
1	Chelho Chung, Young-Han Kim, Tae-Hun Ki, Kyusung Bae, Jongbae Kim	Fully integrated ultra-low-power 900 MHz RF transceiver for batteryless wireless microsystems.	ICECS	2011	DBLP DOI BibTeX RDF
1	Ming-che Lai, Lei Gao, Sheng Ma, Nong Xiao, Zhiying Wang	A practical low-latency router architecture with wing channel for on-chip network.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Andrea Marongiu, Paolo Burgio, Luca Benini	Supporting OpenMP on a multi-cluster embedded MPSoC.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	John A. Kalomiros, John N. Lygouras	Design and hardware implementation of a stereo-matching system based on dynamic programming.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Anirban Sengupta, Reza Sedaghat, Zhipeng Zeng	Multi-objective efficient design space exploration and architectural synthesis of an application specific processor (ASP).	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Matthias Bo Stuart, Jens Sparsø	Analytical derivation of traffic patterns in cache-coherent shared-memory systems.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Mario R. Casu, Massimo Ruo Roch, Sergio Tota, Maurizio Zamboni	A NoC-based hybrid message-passing/shared-memory approach to CMP design.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Lei Zhang, Meikang Qiu, Edwin Hsing-Mean Sha, Qingfeng Zhuge	Variable assignment and instruction scheduling for processor with multi-module memory.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Gyu Sang Choi, Byung-Won On	Study of the performance impact of a cache buffer in solid-state disks.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Claudia Rusu, Lorena Anghel, Dimiter Avresky	Adaptive inter-layer message routing in 3D networks-on-chip.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Gustavo Rau de Almeida Callou, Paulo Romero Martins Maciel, Eduardo Tavares, Ermeson Andrade, Bruno Costa e Silva Nogueira, Carlos Araújo, Paulo Roberto Freire Cunha	Energy consumption and execution time estimation of embedded system applications.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro	Finding the optimal tradeoff between area and delay in multiple constant multiplications.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Rishad A. Shafik, Bashir M. Al-Hashimi	Reliability analysis of on-chip communication architectures: An MPEG-2 video decoder case study.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Zdenka Babic, Aleksej Avramovic, Patricio Bulic	An iterative logarithmic multiplier.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Rabah Sadoun, Adel Belouchrani, El-Bey Bourennane, Ahmed Zerguerras	An FPGA based soft multiprocessor for DNS/DNSSEC authoritative server.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Abdulhadi Shoufan, Nico Huber, H. Gregor Molter	A novel cryptoprocessor architecture for chained Merkle signature scheme.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Wenguo Liu 0001, Alan F. T. Winfield	Open-hardware e-puck Linux extension board for experimental swarm robotics research.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Hongbin Sun, Pengju Ren, Nanning Zheng, Tong Zhang, Tao Li	Architecting high-performance energy-efficient soft error resilient cache under 3D integration technology.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Marcel D. van de Burgwal, Kenneth C. Rovers, Koen C. H. Blom, André B. J. Kokkeler, Gerard J. M. Smit	Mobile satellite reception with a virtual satellite dish based on a reconfigurable multi-processor architecture.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Giovanni Danese, Mauro Giachero, Francesco Leporati, Nelson Nazzicari	An embedded multi-core biometric identification system.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Giang Nguyen Huong, Yeoul Na, Seon Wook Kim	Applying frame layout to hardware design in FPGA for seamless support of cross calls in CPU-FPGA coupling architecture.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Xianwen Yang, Zheng Li, An Wang, Shengjun Wen	Design research of the DES against power analysis attacks based on FPGA.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	José L. Risco-Martín, J. Manuel Colmenar, David Atienza, José Ignacio Hidalgo	Simulation of high-performance memory allocators.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Man Ho Kim, Suk Lee, Kyung Chang Lee	A fuzzy predictive redundancy system for fault-tolerance of x-by-wire systems.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Amir Hasanbegovic, Snorre Aunet	Low-power subthreshold to above threshold level shifters in 90 nm and 65 nm process.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Muhammad E. S. Elrabaa, Abdelhafid Bouhraoua	A hardwired NoC infrastructure for embedded systems on FPGAs.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Malek Naoues, Dominique Noguet, Laurent Alaus, Yves Louët	A common operator for FFT and FEC decoding.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Yixuan Zhang, Randy Wayne Morris Jr., Avinash Karanth Kodi	Design of a performance enhanced and power reduced dual-crossbar Network-on-Chip (NoC) architecture.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Ji Gu, Hui Guo, Patrick Li	An on-chip instruction cache design with one-bit tag for low-power embedded systems.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Nicolas Huber, M. S. Hromalik-Pouchet, Tobia D. Carozzi, M. P. Gough, A. M. Buckley	Parallel processing speed increase of the one-bit auto-correlation function in hardware.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Wei Song 0002, Doug Edwards	Asynchronous spatial division multiplexing router.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Martti Forsell	Performance comparison of some shared memory organizations for 2D mesh-like NOCs.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Jung-Wook Park, Seung-Ho Park, Charles C. Weems, Shin-Dug Kim	A hybrid flash translation layer design for SLC-MLC flash memory based multibank solid state disk.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Anita Tino, Gul N. Khan	Designing power and performance optimal application-specific Network-on-Chip architectures.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Ana Bosque, Víctor Viñals, Pablo Ibáñez, José M. Llabería	Filtering directory lookups in CMPs.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Antonio Armato, L. Fanucci, Enzo Pasquale Scilingo, Danilo De Rossi	Low-error digital hardware implementation of artificial neuron activation functions and their derivative.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF