Search results for "multi-core architectures"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	JongSoo Park, William J. Dally	Buffer-space efficient and deadlock-free scheduling of stream applications on multi-core architectures.	SPAA	2010	DBLP DOI BibTeX RDF	compiler and tools for concurrent programming, green computing and power-efficient architectures, multi-core architectures, stream programming
3	Pedro Chaparro, José González, Grigorios Magklis, Qiong Cai, Antonio González	Understanding the Thermal Implications of Multi-Core Architectures.	IEEE Trans. Parallel Distrib. Syst.	2007	DBLP DOI BibTeX RDF	Activity Migration, Dynamic Voltage, Multi-Core Architectures, Frequency Scaling, Dynamic Thermal Management
2	Enric Musoll	Trading off higher execution latency for increased reliability in tile-based massive multi-core architectures.	ISQED	2009	DBLP DOI BibTeX RDF
2	Diego Rossinelli, Michael Bergdorf, Babak Hejazialhosseini, Petros Koumoutsakos	Wavelet-Based Adaptive Solvers on Multi-core Architectures for the Simulation of Complex Systems.	Euro-Par	2009	DBLP DOI BibTeX RDF
2	Qiankun Miao, Yurong Chen, Jianguo Li, Qi Zhang, Yimin Zhang, Guoliang Chen	Parallelization and optimization of a CBVIR system on multi-core architectures.	IPDPS	2009	DBLP DOI BibTeX RDF
2	Luke J. Gosink, Kesheng Wu, E. Wes Bethel, John D. Owens, Kenneth I. Joy	Data Parallel Bin-Based Indexing for Answering Queries on Multi-core Architectures.	SSDBM	2009	DBLP DOI BibTeX RDF
2	Junchang Wang, Haipeng Cheng, Bei Hua, Xinan Tang	Practice of parallelizing network applications on multi-core architectures.	ICS	2009	DBLP DOI BibTeX RDF	application-level protocol processing, deep content inspection, lock-free data structures, multi-core parallelization, pipelining implementation, tcp/ip protocol processing
2	Magnus Själander, Andrei Terechko, Marc Duranton	A Look-Ahead Task Management Unit for Embedded Multi-Core Architectures.	DSD	2008	DBLP DOI BibTeX RDF
2	Gerard J. M. Smit, André B. J. Kokkeler, Pascal T. Wolkotte, Marcel D. van de Burgwal	Multi-core architectures and streaming applications.	SLIP	2008	DBLP DOI BibTeX RDF	NoC design, multi-core SoC design, system design, streaming applications
2	Ganesh Narayanaswamy, Pavan Balaji, Wu-chun Feng	Impact of Network Sharing in Multi-Core Architectures.	ICCCN	2008	DBLP DOI BibTeX RDF
2	Xin Yang, Duanqing Xu, Lei Zhao	Ray Tracing Dynamic Scenes using fast KD-tree Base on Multi-Core Architectures.	CSSE	2008	DBLP DOI BibTeX RDF
2	Josep M. Pérez, Rosa M. Badia, Jesús Labarta	A dependency-aware task-based programming environment for multi-core architectures.	CLUSTER	2008	DBLP DOI BibTeX RDF
2	Gregorio Quintana-Ortí, Enrique S. Quintana-Ortí, Ernie Chan, Robert A. van de Geijn, Field G. Van Zee	Scheduling of QR Factorization Algorithms on SMP and Multi-Core Architectures.	PDP	2008	DBLP DOI BibTeX RDF	linear algebra libraries, high-performance, dynamic scheduling, out-of-order execution, QR factorization
2	Ying Yi, Wei Han, Adam Major, Ahmet T. Erdogan, Tughrul Arslan	Exploiting loop-level parallelism on multi-core architectures for the wimax physical layer.	SoCC	2008	DBLP DOI BibTeX RDF
2	Easwaran Raman, Guilherme Ottoni, Arun Raman, Matthew J. Bridges, David I. August	Parallel-stage decoupled software pipelining.	CGO	2008	DBLP DOI BibTeX RDF	doall, dswp, tlp, automatic parallelization, multi-core architectures, pipelined parallelism
2	Tong Li, Dan P. Baumberger, David A. Koufaty, Scott Hahn	Efficient operating system scheduling for performance-asymmetric multi-core architectures.	SC	2007	DBLP DOI BibTeX RDF
2	Alban Douillet, Guang R. Gao	Software-Pipelining on Multi-Core Architectures.	PACT	2007	DBLP DOI BibTeX RDF
2	Abdullah Kayi, Yiyi Yao, Tarek A. El-Ghazawi, Gregory B. Newby	Experimental Evaluation of Emerging Multi-core Architectures.	IPDPS	2007	DBLP DOI BibTeX RDF
2	Ilya Ganusov, Martin Burtscher	Efficient emulation of hardware prefetchers via event-driven helper threading.	PACT	2006	DBLP DOI BibTeX RDF	prefetching, multi-core architectures, helper threading
2	Rakesh Kumar, Dean M. Tullsen, Norman P. Jouppi	Core architecture optimization for heterogeneous chip multiprocessors.	PACT	2006	DBLP DOI BibTeX RDF	computer architecture, multi-core architectures, heterogeneous chip multiprocessors
1	Francesca Perla, Paolo Zanetti	Performance Analysis of an Hybrid MPI/OpenMP ALM Software for Life Insurance Policies on Multi-core Architectures.	IWOMP	2012	DBLP DOI BibTeX RDF
1	Shah Mohammad Faizur Rahman, Jichi Guo, Akshatha Bhat, Carlos Garcia, Majedul Haque Sujon, Qing Yi, Chunhua Liao, Daniel J. Quinlan	Studying the impact of application-level optimizations on the power consumption of multi-core architectures.	Conf. Computing Frontiers	2012	DBLP DOI BibTeX RDF
1	Marisha Rawlins, Ann Gordon-Ross	An application classification guided cache tuning heuristic for multi-core architectures.	ASP-DAC	2012	DBLP DOI BibTeX RDF
1	Fazal Hameed, Lars Bauer, Jörg Henkel	Dynamic cache management in multi-core architectures through run-time adaptation.	DATE	2012	DBLP BibTeX RDF
1	Diego Rossinelli, Babak Hejazialhosseini, Michael Bergdorf, Petros Koumoutsakos	Wavelet-adaptive solvers on multi-core architectures for the simulation of complex systems.	Concurrency and Computation: Practice and Experience	2011	DBLP DOI BibTeX RDF
1	Amit Pande, Joseph Zambreno	Efficient mapping and acceleration of AES on custom multi-core architectures.	Concurrency and Computation: Practice and Experience	2011	DBLP DOI BibTeX RDF
1	Matthias Petschow, Paolo Bientinesi	MR3-SMP: A symmetric tridiagonal eigensolver for multi-core architectures.	Parallel Computing	2011	DBLP DOI BibTeX RDF
1	Carsten Trinitis, Tilman Küstner, Josef Weidendorfer, Jasmin Smajic	Sparse matrix operations on several multi-core architectures.	The Journal of Supercomputing	2011	DBLP DOI BibTeX RDF
1	Kyungsu Kang, Jungsoo Kim, Sungjoo Yoo, Chong-Min Kyung	Runtime Power Management of 3-D Multi-Core Architectures Under Peak Power and Temperature Constraints.	IEEE Trans. on CAD of Integrated Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Alejandro Duran, Eduard Ayguadé, Rosa M. Badia, Jesús Labarta, Luis Martinell, Xavier Martorell, Judit Planas	Ompss: a Proposal for Programming Heterogeneous Multi-Core Architectures.	Parallel Processing Letters	2011	DBLP DOI BibTeX RDF
1	Svetislav Momcilovic, Leonel Sousa	Modeling and Evaluating Non-shared Memory CELL/BE Type Multi-core Architectures for Local Image and Video Processing.	Signal Processing Systems	2011	DBLP DOI BibTeX RDF
1	Thomas Ebi, Janmartin Jahn, Jörg Henkel	Agent-Based Thermal Management for Multi-core Architectures.	Organic Computing	2011	DBLP DOI BibTeX RDF
1	Yuping Zhang, Xianbin Xu, Yuanhua Yang, Shuibing He, Zimian Hao	Communication-aware task scheduling for multi-core architectures with segmented buses.	BMEI	2011	DBLP DOI BibTeX RDF
1	Miao Luo, Jithin Jose, Sayantan Sur, Dhabaleswar K. Panda	Multi-threaded UPC runtime with network endpoints: Design alternatives and evaluation on multi-core architectures.	HiPC	2011	DBLP DOI BibTeX RDF
1	A. S. Radhamani, E. Baburaj	Research on Power Optimization Techniques for Multi Core Architectures.	ACC	2011	DBLP DOI BibTeX RDF
1	Richard Membarth, Frank Hannig, Jürgen Teich, Mario Körner, Wieland Eckert	Frameworks for Multi-core Architectures: A Comprehensive Evaluation Using 2D/3D Image Registration.	ARCS	2011	DBLP DOI BibTeX RDF
1	César A. F. De Rose, Paulo Fernandes, Antonio M. de Lima, Afonso Sales, Thais Webber	Exploiting Multi-core Architectures in Clusters for Enhancing the Performance of the Parallel Bootstrap Simulation Algorithm.	IPDPS Workshops	2011	DBLP DOI BibTeX RDF
1	Luca Biferale, Mauro Sbragaglia, Andrea Scagliarini, Filippo Mantovani, Marcello Pivanti, Sebastiano Fabio Schifano, Raffaele Tripiccione, Fabio Pozzati, Federico Toschi	Lattice Boltzmann method simulations on massively parallel multi-core architectures.	SpringSim (HPC)	2011	DBLP BibTeX RDF
1	Kai Zhang, Junchang Wang, Bei Hua, Xinan Tang	Building High-Performance Application Protocol Parsers on Multi-core Architectures.	ICPADS	2011	DBLP DOI BibTeX RDF
1	Madhavan Manivannan, Ben H. H. Juurlink, Per Stenström	Implications of Merging Phases on Scalability of Multi-core Architectures.	ICPP	2011	DBLP DOI BibTeX RDF	Redcution operations, Chip Multiprocessor, Amdahl's Law
1	Thomas Müller, Carsten Trinitis, Jasmin Smajic	Cache Efficiency and Scalability on Multi-core Architectures.	PaCT	2011	DBLP DOI BibTeX RDF
1	Navid Khoshavi, Hamid R. Zarandi, Mohammad Maghsoudloo	Control-flow error detection using combining basic and program-level checking in commodity multi-core architectures.	SIES	2011	DBLP DOI BibTeX RDF
1	Madhavan Manivannan, Ben H. H. Juurlink, Per Stenström	Poster: implications of merging phases on scalability of multi-core architectures.	ICS	2011	DBLP DOI BibTeX RDF
1	Sandy Brand, Rafael Bidarra	Parallel Ripple Search - Scalable and Efficient Pathfinding for Multi-core Architectures.	MIG	2011	DBLP DOI BibTeX RDF
1	Andrew A. Kennings, Chirag Ravishankar	Parallel FPGA technology mapping using multi-core architectures.	CCECE	2011	DBLP DOI BibTeX RDF
1	Janmartin Jahn, Mohammad Abdullah Al Faruque, Jörg Henkel	CARAT: Context-aware runtime adaptive task migration for multi core architectures.	DATE	2011	DBLP BibTeX RDF
1	Jeong-Gun Lee, Wook Shin, Suk-Jin Kim, Eun-Gu Jung	A Performance/Energy Analysis and Optimization of Multi-Core Architectures with Voltage Scaling Techniques.	IEICE Transactions	2010	DBLP BibTeX RDF
1	David W. Holmes, John R. Williams, Peter Tilke	An events based algorithm for distributing concurrent tasks on multi-core architectures.	Computer Physics Communications	2010	DBLP DOI BibTeX RDF
1	Gudula Rünger, Michael Schwind	Fast recursive matrix multiplication for multi-core architectures.	Procedia CS	2010	DBLP DOI BibTeX RDF
1	Pengliu Tan, Jian Shu, Zhenhua Wu	A Hybrid Real-Time Scheduling Approach on Multi-Core Architectures.	JSW	2010	DBLP DOI BibTeX RDF
1	Andre J. Aberer, Nicholas D. Pattengale, Alexandros Stamatakis	Parallelized phylogenetic post-analysis on multi-core architectures.	J. Comput. Science	2010	DBLP DOI BibTeX RDF
1	Samer Arandi, Paraskevas Evripidou	Programming multi-core architectures using Data-Flow techniques.	ICSAMOS	2010	DBLP DOI BibTeX RDF
1	Haibo Lin, Chao Li, Qian Wang, Yi Zhao, Ninghe Pan, Xiaotong Zhuang, Ling Shao	Automated Tuning in Parallel Sorting on Multi-core Architectures.	Euro-Par	2010	DBLP DOI BibTeX RDF
1	M. Aater Suleman, Onur Mutlu, José A. Joao, Khubaib, Yale N. Patt	Data marshaling for multi-core architectures.	ISCA	2010	DBLP DOI BibTeX RDF	staged execution, pipelining, cmp, critical sections
1	Denis R. Ogura, Edson T. Midorikawa	Characterization of Scientific and Transactional Applications under Multi-core Architectures on Cloud Computing Environment.	CSE	2010	DBLP DOI BibTeX RDF
1	Cristina Silvano, William Fornaciari, Gianluca Palermo, Vittorio Zaccaria, Fabrizio Castro, Marcos Martínez, Sara Bocchio, Roberto Zafalon, Prabhat Avasare, Geert Vanmeerbeeck, Chantal Ykman-Couvreur, Maryse Wouters, Carlos Kavka, Luka Onesti, Alessandro Turco, Umberto Bondi, Giovanni Mariani, Hector Posadas, Eugenio Villar, Chris Wu, Dongrui Fan, Zhang Hao, Shibin Tang	MULTICUBE: Multi-objective Design Space Exploration of Multi-core Architectures.	ISVLSI	2010	DBLP DOI BibTeX RDF
1	Simone Secchi, Paolo Meloni, Luigi Raffo	Exploiting FPGAs for technology-aware system-level evaluation of multi-core architectures.	ISPASS	2010	DBLP DOI BibTeX RDF
1	Jia Zhao, Basab Datta, Wayne P. Burleson, Russell Tessier	Thermal-aware voltage droop compensation for multi-core architectures.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	monitor network-on-chip, thermal monitor, voltage emergency
1	David Cuesta, José Luis Ayala, José Ignacio Hidalgo, Massimo Poncino, Andrea Acquaviva, Enrico Macii	Thermal-aware floorplanning exploration for 3D multi-core architectures.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	3D, floorplanning, MPSoC, temperature
1	Nagarajan Venkateswaran, Karthikeyan P. Saravanan, Nachiappan C. Nachiappan, Aravind Vasudevan, Balaji Subramaniam, Ravindhiran Mukundrajan	Custom Built Heterogeneous Multi-core Architectures (CUBEMACH): Breaking the conventions.	IPDPS Workshops	2010	DBLP DOI BibTeX RDF
1	Yan Cui, Weiyi Wu, Yingxin Wang, Xufeng Guo, Yu Chen, Yuanchun Shi	A Discrete Event Simulation Model for Understanding Kernel Lock Thrashing on Multi-core Architectures.	ICPADS	2010	DBLP DOI BibTeX RDF
1	Terry Nelms, Mustaque Ahamad	Packet scheduling for deep packet inspection on multi-core architectures.	ANCS	2010	DBLP DOI BibTeX RDF
1	Michael T. Garba, Horacio González-Vélez, Daniel L. Roach	Parallel Computational Modelling of Inelastic Neutron Scattering in Multi-node and Multi-core Architectures.	HPCC	2010	DBLP DOI BibTeX RDF
1	Joppe W. Bos, Deian Stefan	Performance Analysis of the SHA-3 Candidates on Exotic Multi-core Architectures.	CHES	2010	DBLP DOI BibTeX RDF
1	Philipp A. Hartmann, Kim Grüttner, Achim Rettberg, Ina Podolski	Distributed Resource-Aware Scheduling for Multi-core Architectures with SystemC.	DIPES/BICC	2010	DBLP DOI BibTeX RDF
1	Ross McIlroy, Joe Sventek	Hera-JVM: a runtime system for heterogeneous multi-core architectures.	OOPSLA	2010	DBLP DOI BibTeX RDF
1	Abdelhafid Mazouz, Sid Ahmed Ali Touati, Denis Barthou	Study of Variations of Native Program Execution Times on Multi-Core Architectures.	CISIS	2010	DBLP DOI BibTeX RDF	Statistical Performance Evaluation, Measurement, Experimentation
1	David A. Koufaty, Dheeraj Reddy, Scott Hahn	Bias scheduling in heterogeneous multi-core architectures.	EuroSys	2010	DBLP DOI BibTeX RDF	scheduling, heterogeneous architectures
1	Felipe Lopes Madruga, Henrique Cota de Freitas, Philippe Olivier Alexandre Navaux	Parallel Shared-Memory Workloads Performance on Asymmetric Multi-core Architectures.	PDP	2010	DBLP DOI BibTeX RDF	Heterogeneous Multi-processor, Performance Evaluation, Multi-core, Memory Hierarchy
1	Alexandros Stamatakis, Zsolt Komornik, Simon A. Berger	Evolutionary placement of short sequence reads on multi-core architectures.	AICCSA	2010	DBLP DOI BibTeX RDF
1	Tong Li, Paul Brett, Rob C. Knauerhase, David A. Koufaty, Dheeraj Reddy, Scott Hahn	Operating system support for overlapping-ISA heterogeneous multi-core architectures.	HPCA	2010	DBLP DOI BibTeX RDF
1	Jiangjiang Liu, Jianyong Zhang, Nihar R. Mahapatra	Interconnect system compression analysis for multi-core architectures.	SoCC	2010	DBLP DOI BibTeX RDF
1	Jiangmiao Liao, Hu Chen, Yixia Yuan, Jianqing Xi	Parallel Batch B+-tree Insertion on Multi-core Architectures.	FCST	2010	DBLP DOI BibTeX RDF	batch insert, multi-core, index structures, parallel database, B+-tree
1	Jih-Ching Chiu, Yu-Liang Chou, Ding-Siang Su	A hyperscalar multi-core architecture.	Conf. Computing Frontiers	2010	DBLP DOI BibTeX RDF	cmps, dynamic multi-core chips, reconfigurable multi-core architectures, chip multiprocessors
1	Amir Hormati, Yoonseo Choi, Mark Woh, Manjunath Kudlur, Rodric M. Rabbah, Trevor N. Mudge, Scott A. Mahlke	MacroSS: macro-SIMDization of streaming applications.	ASPLOS	2010	DBLP DOI BibTeX RDF	optimization, compiler, streaming, SIMD architecture
1	Arquimedes Canedo, Takeo Yoshizawa, Hideaki Komatsu	Automatic parallelization of simulink applications.	CGO	2010	DBLP DOI BibTeX RDF	coarse grain dataflow, equation-level parallelism, compilers, multi-core, automatic parallelization, simulink, strands
1	Young-Jin Yoon, Nicola Concer, Michele Petracca, Luca P. Carloni	Virtual channels vs. multiple physical networks: a comparative analysis.	DAC	2010	DBLP DOI BibTeX RDF	channel slicing, network-on-chip, virtual channel
1	João Barreto, Aleksandar Dragojevic, Paulo Ferreira, Rachid Guerraoui, Michal Kapalka	Leveraging parallel nesting in transactional memory.	PPOPP	2010	DBLP DOI BibTeX RDF	nested parallel programs, transactional memory, work-stealing, fork-join
1	Yi-Hung Wei, Chuan-Yue Yang, Tei-Wei Kuo, Shih-Hao Hung, Yuan-Hua Chu	Energy-efficient real-time scheduling of multimedia tasks on multi-core processors.	SAC	2010	DBLP DOI BibTeX RDF	multimedia tasks scheduling, H.264, multiprocessor scheduling, energy-efficient scheduling
1	Enric Musoll	Leakage-saving opportunities in mesh-based massive multi-core architectures.	SIGARCH Computer Architecture News	2009	DBLP DOI BibTeX RDF
1	Jan Treibig, Georg Hager, Gerhard Wellein	Multi-core architectures: Complexities of performance prediction and the impact of cache topology	CoRR	2009	DBLP BibTeX RDF
1	Abdullah Kayi, Tarek A. El-Ghazawi, Gregory B. Newby	Performance issues in emerging homogeneous multi-core architectures.	Simulation Modelling Practice and Theory	2009	DBLP DOI BibTeX RDF
1	Paolo Bientinesi, Francisco D. Igual, Daniel Kressner, Enrique S. Quintana-Ortí	Reduction to Condensed Forms for Symmetric Eigenvalue Problems on Multi-core Architectures.	PPAM	2009	DBLP DOI BibTeX RDF
1	Jeong-Gun Lee, Eun-Gu Jung, Wook Shin	An Asymptotic Performance/Energy Analysis and Optimization of Multi-core Architectures.	ICDCN	2009	DBLP DOI BibTeX RDF
1	Akira Hatanaka, Nader Bagherzadeh	Scheduling Techniques for Multi-Core Architectures.	ITNG	2009	DBLP DOI BibTeX RDF
1	Vipin Sachdeva, Douglas M. Freimuth, Chris Mueller	Evaluating the Jaccard-Tanimoto Index on Multi-core Architectures.	ICCS	2009	DBLP DOI BibTeX RDF
1	Avinash Karanth Kodi, Randy Morris, Ahmed Louri, Xiang Zhang	On-Chip photonic interconnects for scalable multi-core architectures.	NOCS	2009	DBLP DOI BibTeX RDF
1	Reinhard Wilhelm	The PROMPT design principles for predictable multi-core architectures.	SCOPES	2009	DBLP BibTeX RDF
1	M. Aater Suleman, Onur Mutlu, Moinuddin K. Qureshi, Yale N. Patt	Accelerating critical section execution with asymmetric multi-core architectures.	ASPLOS	2009	DBLP DOI BibTeX RDF	heterogeneous cores, parallel programming, cmp, multi-core, locks, critical sections
1	Dengbiao Tu, Guangming Tan	Characterizing Betweenness Centrality Algorithm on Multi-core Architectures.	ISPA	2009	DBLP DOI BibTeX RDF
1	Patrick P. C. Lee, Tian Bu, Girish P. Chandranmenon	A lock-free, cache-efficient shared ring buffer for multi-core architectures.	ANCS	2009	DBLP DOI BibTeX RDF
1	Elizabeth Whitaker Lynch, George F. Riley	Hardware Supported Time Synchronization in Multi-core Architectures.	PADS	2009	DBLP DOI BibTeX RDF	multi-core synchronization
1	Carsten Trinitis, Tilman Küstner, Josef Weidendorfer, Jasmin Smajic	Sparse Matrix Operations on Multi-core Architectures.	PaCT	2009	DBLP DOI BibTeX RDF	Multi-core, performance optimization, sparse matrices, cache optimization, pinning
1	Wei Han, Ying Yi, Xin Zhao, Mark Muir, Tughrul Arslan, Ahmet T. Erdogan	Heterogeneous multi-core architectures with dynamically reconfigurable processors for wireless communication.	SASP	2009	DBLP DOI BibTeX RDF
1	Maxime Pelcat, Pierrick Menuet, Slaheddine Aridhi, Jean-François Nezan	Scalable compile-time scheduler for multi-core architectures.	DATE	2009	DBLP BibTeX RDF
1	Ying Yi, Wei Han, Xin Zhao, Ahmet T. Erdogan, Tughrul Arslan	An ILP formulation for task mapping and scheduling on multi-core architectures.	DATE	2009	DBLP BibTeX RDF
1	Emilio J. Padrón, Margarita Amor, Montserrat Bóo, Ramon Doallo	High Performance Global Illumination on Multi-core Architectures.	PDP	2009	DBLP DOI BibTeX RDF
1	Frank Huber, Johann Christoph Freytag	Query Processing on Multi-Core Architectures.	Grundlagen von Datenbanken	2009	DBLP BibTeX RDF
1	Nikola Vujic, Lluc Alvarez, Marc González Tallada, Xavier Martorell, Eduard Ayguadé	Adaptive and Speculative Memory Consistency Support for Multi-core Architectures with On-Chip Local Memories.	LCPC	2009	DBLP DOI BibTeX RDF
1	Wei Han, Ying Yi, Xin Zhao, Mark Muir, Tughrul Arslan, Ahmet T. Erdogan	Heterogeneous multi-core architectures with dynamically reconfigurable processors for WiMAX transmitter.	SoCC	2009	DBLP DOI BibTeX RDF