Search results for "multi-threshold"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Raghid Shreih, Maitham Shams	Implementation of asynchronous pipeline circuits in multi-threshold CMOS technologies.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	c-element, gasp, low power, pipeline, asynchronous, multi-threshold
3	Kimiyoshi Usami, Naoyuki Kawabe, Masayuki Koizumi, Katsuhiro Seta, Toshiyuki Furusawa	Automated selective multi-threshold design for ultra-low standby applications.	ISLPED	2002	DBLP DOI BibTeX RDF	standby leakage current, automated design, multi-threshold
3	H.-J. Wang, C.-C. Kuo	A Multi-Threshold Wavelet Coder ( MTWC ) For High Fidelity Image Compression. (PDF / PS)	ICIP	1997	DBLP DOI BibTeX RDF	image compression, embedded coding, wavelet coding, multi-threshold
2	Maciej Nikodem, Marek A. Bawiec, Janusz Biernat	Synthesis of Generalised Threshold Gates and Multi Threshold Threshold Gates.	ICSEng	2011	DBLP DOI BibTeX RDF	Generalised Threshold Gate, Multi Threshold Threshold Gate, synthesis, nanotechnologies, resonant tunnelling diodes
2	Ahmad Al Zahrani, Andrew Bailey, Guoyuan Fu, Jia Di	Glitch-free design for multi-threshold CMOS NCL circuits.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	asynchronous circuit, mtcmos, glitch, threshold gate, null convention logic
2	Nan Jiang, Zhaozhi Zhang, Xiaomin Ma, Jian Wang, Yixian Yang	Analysis of nonseparable property of multi-valued multi-threshold neuron.	IJCNN	2008	DBLP DOI BibTeX RDF
2	Hiroaki Inayoshi, Takio Kurita	Binarizing Training Samples with Multi-threshold for Viola-Jones Face Detector.	ICONIP	2007	DBLP DOI BibTeX RDF
2	Zhiyu Liu, Volkan Kursun	Charge Recycling Between Virtual Power and Ground Lines for Low Energy MTCMOS.	ISQED	2007	DBLP DOI BibTeX RDF	Multi-threshold voltage CMOS, gated power, gated ground, sleep switch, subthreshold leakage, charge recycling
2	Che Soong Kim, Valentina I. Klimenok, Alexander Birukov, Alexander N. Dudin	Optimal multi-threshold control by the BMAP/SM/1 retrial system.	Annals OR	2006	DBLP DOI BibTeX RDF	Batch Markovian arrival process, Controlled operation modes, Cost criterion, Optimal control
2	Harmander Deogun, Dennis Sylvester, Kevin J. Nowka	Fine grained multi-threshold CMOS for enhanced leakage reduction.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Takeshi Kitahara, Naoyuki Kawabe, Fumihiro Minami, Katsuhiro Seta, Toshiyuki Furusawa	Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction.	DATE	2005	DBLP DOI BibTeX RDF
2	Xiaobo Zhou, Stephen T. C. Wong	Dynamic sub-cellular behavior study in high content imaging using a multi-threshold approach.	ISCAS	2005	DBLP DOI BibTeX RDF
2	Stephen V. Kosonocky, Michael Immediato, Peter E. Cottrell, Terence B. Hook, Randy W. Mann, Jeff Brown	Enchanced multi-threshold (MTCMOS) circuits using variable well bias.	ISLPED	2001	DBLP DOI BibTeX RDF	leakage control, low power digital circuit design, variable well bias, MTCMOS, multi-threshold
2	Xiaoyi Jiang, Daniel Mojon	Blood Vessel Detection in Retinal Images by Shape-Based Multi-threshold Probing.	DAGM-Symposium	2001	DBLP DOI BibTeX RDF
2	Carlo Blundo, Annalisa De Bonis, Barbara Masucci, Douglas R. Stinson	Dynamic Multi-threshold Metering Schemes.	Selected Areas in Cryptography	2000	DBLP DOI BibTeX RDF	Metering Schemes, Security, Cryptography, Entropy
2	James Kao, Anantha Chandrakasan, Dimitri Antoniadis	Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology.	DAC	1997	DBLP DOI BibTeX RDF
1	Ehsan Pakbaznia, Massoud Pedram	Design of a Tri-Modal Multi-Threshold CMOS Switch With Application to Data Retentive Power Gating.	IEEE Trans. VLSI Syst.	2012	DBLP DOI BibTeX RDF
1	Feng Wei	Algorithm for waiting time distribution of a discrete-time multiserver queue with deterministic service times and multi-threshold service policy.	Procedia CS	2011	DBLP DOI BibTeX RDF
1	Sherif A. Tawfik, Volkan Kursun	Multi-Threshold Voltage FinFET Sequential Circuits.	IEEE Trans. VLSI Syst.	2011	DBLP DOI BibTeX RDF
1	Nor Hanisah Zainal Abidin, Siti Norul Huda Sheikh Abdullah, Shahnorbanun Sahran, Farshid PirahanSiah	License plate recognition with multi-threshold based on entropy.	ICEEI	2011	DBLP DOI BibTeX RDF
1	Kedar Karmarkar, Spyros Tragoudas	Error correction encoding for multi-threshold capture mechanism.	IOLTS	2011	DBLP DOI BibTeX RDF
1	Babak Abbasi Bastami, Ebrahim Saberinia	A low complexity multi-threshold centralized detection strategy for cooperative spectrum sensing.	PIMRC	2011	DBLP DOI BibTeX RDF
1	Chih-Yu Hsu, Chih-Hung Yang, Hui-Ching Wang	Multi-Threshold Level Set Model for Image Segmentation.	EURASIP J. Adv. Sig. Proc.	2010	DBLP DOI BibTeX RDF
1	Erik Cuevas, Daniel Zaldivar, Marco A. Pérez Cisneros	A novel multi-threshold segmentation approach based on differential evolution optimization.	Expert Syst. Appl.	2010	DBLP DOI BibTeX RDF
1	Hailong Jiao, Volkan Kursun	Tri-mode Operation for Noise Reduction and Data Preservation in Low-Leakage Multi-Threshold CMOS Circuits.	VLSI-SoC (Selected Papers)	2010	DBLP DOI BibTeX RDF
1	Nianzu Liu, Guanglin Xu, Yongchang Liu	Multi-threshold Ranking Model Based on Naive Bayes for Community-Ranked Article Submission Sites.	GrC	2010	DBLP DOI BibTeX RDF
1	Jin-Hao Li, Hsuan-Jung Su, Yu-Lun Tsai	A multi-threshold scheme for feedback load reduction in multiuser MIMO broadcast channel.	PIMRC	2010	DBLP DOI BibTeX RDF
1	Ali Gamal Hafez, Tahir Abbas Khan, Tohru Kohda	Earthquake onset detection using spectro-ratio on multi-threshold time-frequency sub-band.	Digital Signal Processing	2009	DBLP DOI BibTeX RDF
1	Shiho Hagiwara, Takashi Sato, Kazuya Masu	Analytical Estimation of Path-Delay Variation for Multi-Threshold CMOS Circuits.	IEICE Transactions	2009	DBLP BibTeX RDF
1	Jun-Zhao Sun	Multi-Threshold Based Data Gathering Algorithms for Wireless Sensor Networks.	JNW	2009	DBLP DOI BibTeX RDF
1	Behnam Amelifard, Farzan Fallah, Massoud Pedram	Low-Power Fanout Optimization Using Multi Threshold Voltages and Multi Channel Lengths.	IEEE Trans. on CAD of Integrated Circuits and Systems	2009	DBLP DOI BibTeX RDF
1	Sherif A. Tawfik, Volkan Kursun	Low Power and High Speed Multi Threshold Voltage Interface Circuits.	IEEE Trans. VLSI Syst.	2009	DBLP DOI BibTeX RDF
1	Zongju Peng, Gangyi Jiang, Mei Yu	A fast multiview video coding algorithm based dynamic multi-threshold.	ICME	2009	DBLP DOI BibTeX RDF
1	Shuhan Wei, Ranran Zhang, Pengyi Hao, Youdong Ding	Blotch Detection Based on Texture Matching and Adaptive Multi-threshold.	ICIG	2009	DBLP DOI BibTeX RDF	Blotch detection, Simplified rank-ordered difference, Iterative algorithm, Adaptive threshold
1	Ruey-Ming Chao, Hsien-Chu Wu, Zi-Chun Chen	Image segmentation by automatic histogram thresholding.	Int. Conf. Interaction Sciences	2009	DBLP DOI BibTeX RDF	bi-level threshold, image histogram, image segmentation, automatic threshold, multi-threshold
1	Yong-Dong Xu, Guang-Ri Quan, Zhi-Ming Xu, Ya-Dong Wang	Research on Text Hierarchical Topic Identification Algorithm Based on the Dynamic Diverse Thresholds Clustering.	IALP	2009	DBLP DOI BibTeX RDF	Text topic identification, Hierarchical topic, Multi-threshold identification, Text clustering
1	Dong-Min Woo, Dong-Chul Park	Stereo line matching based on the combination of geometric and intensity data.	ISCIS	2009	DBLP DOI BibTeX RDF
1	Rajeev Alur, Aldric Degorre, Oded Maler, Gera Weiss	On Omega-Languages Defined by Mean-Payoff Conditions.	FOSSACS	2009	DBLP DOI BibTeX RDF
1	Andrew Bailey, Ahmad Al Zahrani, Guoyuan Fu, Jia Di, Scott C. Smith	Multi-Threshold Asynchronous Circuit Design for Ultra-Low Power.	J. Low Power Electronics	2008	DBLP DOI BibTeX RDF
1	Sachin Idgunji, David Flynn	Design and Analysis of a Low Power Multi-Threshold CMOS Based ARM926 System.	J. Low Power Electronics	2008	DBLP DOI BibTeX RDF
1	Héctor Pettenghi, Maria J. Avedillo, José M. Quintana	Using multi-threshold threshold gates in RTD-based logic design: A case study.	Microelectronics Journal	2008	DBLP DOI BibTeX RDF
1	Andrea Calimera, Enrico Macii, Massimo Poncino, R. Iris Bahar	Temperature-insensitive synthesis using multi-vt libraries.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	multi-threshold voltage, temperature-aware, logic synthesis
1	Sonia Chernova, Manuela M. Veloso	Multi-thresholded approach to demonstration selection for interactive robot learning.	HRI	2008	DBLP DOI BibTeX RDF	learning from demonstration, human-robot interaction
1	Bor-Jiunn Hwang, I-Shyan Hwang, Ching-Yao Shen	Performance evaluation of multi-guard channel schemes in broadband mobile networks.	Mobility Conference	2008	DBLP DOI BibTeX RDF	broadband mobile networks, multi-guard channel, multirate services, priority based CAC schemes
1	Yexin Zheng, Chao Huang	Reconfigurable RTD-based circuit elements of complete logic functionality.	ASP-DAC	2008	DBLP DOI BibTeX RDF
1	Marco Casini, Andrea Garulli, Antonio Vicino	Optimal input design for identification of systems with quantized measurements.	CDC	2008	DBLP DOI BibTeX RDF
1	Vibhav Kapnadak, Murat Senel, Edward J. Coyle	Distributed incumbent estimation for cognitive wireless networks.	CISS	2008	DBLP DOI BibTeX RDF
1	Huijie Zhang, Dantong Ouyang, Heping Lin, Jingbo Zhang	A Terrain Model Simplification Method Based on Adaptive Threshold Selection.	CSSE	2008	DBLP DOI BibTeX RDF
1	Ehsan Pakbaznia, Massoud Pedram	Coarse-Grain MTCMOS Sleep Transistor Sizing Using Delay Budgeting.	DATE	2008	DBLP DOI BibTeX RDF
1	Sherif A. Tawfik, Volkan Kursun	Work-function engineering for reduced power and higher integration density: An alternative to sizing for stability in FinFET memory circuits.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Tianxiao Ye, Yap-Peng Tan, Ping Xue	Efficient all-zero block detection algorithm for H.264 integer transform.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Yan Yi, Zhang Hangping, Zhou Bin	A New Learning Algorithm for Neural Networks with Integer Weights and Quantized Non-linear Activation Functions.	IFIP AI	2008	DBLP DOI BibTeX RDF
1	Eleazar Eskin	Increasing Power in Association Studies by Using Linkage Disequilibrium Structure and Molecular Function as Prior Information.	RECOMB	2008	DBLP DOI BibTeX RDF
1	Takeshi Kitahara, Naoyuki Kawabe, Fumihiro Minami, Katsuhiro Seta, Toshiyuki Furusawa	Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction	CoRR	2007	DBLP BibTeX RDF
1	Jeegar Tilak Shah, Marius Evers, Jeff Trull, Alper Halbutogullari	Circuit optimization for leakage power reduction using multi-threshold voltages for high performance microprocessors.	ISPD	2007	DBLP DOI BibTeX RDF	multi-VTH, optimization, timing, low-power design, microprocessor, EDA, leakage power, sizing
1	Wei Wu, Tingcun Wei, Xiaoya Fan, Fulong Chen	DAC Circuit with Multi-threshold Voltage for TFT-LCD Driver IC.	CAD/Graphics	2007	DBLP DOI BibTeX RDF
1	Chanseok Hwang, Peng Rong, Massoud Pedram	Sleep transistor distribution in row-based MTCMOS designs.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	leakage minimization, placement, MTCMOS
1	Ehsan Pakbaznia, Farzan Fallah, Massoud Pedram	Sizing and placement of charge recycling transistors in MTCMOS circuits.	ICCAD	2007	DBLP DOI BibTeX RDF
1	Volkan Kursun, Sherif A. Tawfik, Zhiyu Liu	Leakage-Aware Design of Nanometer SoC.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Zhiyu Liu, Volkan Kursun	Charge Recycling MTCMOS for Low Energy Active/Sleep Mode Transitions.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Chi-Chang Lu, Jyun-Yi Wu, Tsung-Sum Lee	A 1.5V 10-b 30-MS/s CMOS Pipelined Analog-to-Digital Converter.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Sherif A. Tawfik, Volkan Kursun	Multi-Vth Level Conversion Circuits for Multi-VDD Systems.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Ricardo Cunha, Henri Boudinov, Luigi Carro	Quaternary Look-Up Tables Using Voltage-Mode CMOS Logic Design.	ISMVL	2007	DBLP DOI BibTeX RDF
1	Feng Zhao, Jiulun Fan	Image Segmentation by Multi-level Thresholding Based on C-Means Clustering Algorithms and Fuzzy Entropy.	ICFIE	2007	DBLP DOI BibTeX RDF	Hard C-means clustering algorithm, Fuzzy C-means clustering algorithm, Image segmentation, Post-processing, Fuzzy entropy
1	Ying Weng, Jianmin Jiang	Camera Motion Analysis Towards Semantic-Based Video Retrieval in Compressed Domain.	SAMT	2007	DBLP DOI BibTeX RDF	Camera motion analysis, MPEG compressed domain, semantic-based video retrieval
1	Thomas Kalinowski	Optimization of Multi-Threshold Circuits.	Electronic Notes in Discrete Mathematics	2006	DBLP DOI BibTeX RDF
1	Stephany Edosa Ogbonmwan, Wei Wayne Li	Multi-threshold bandwidth reservation scheme of an integrated voice/data wireless network.	Computer Communications	2006	DBLP DOI BibTeX RDF
1	Hassan Hassan, Mohab Anis, Mohamed I. Elmasry	Low-power multi-threshold MCML: Analysis, design, and variability.	Microelectronics Journal	2006	DBLP DOI BibTeX RDF
1	Roger Zimmermann, Cyrus Shahabi, Kun Fu, Mehrdad Jahangiri	A multi-threshold online smoothing technique for variable rate multimedia streams.	Multimedia Tools Appl.	2006	DBLP DOI BibTeX RDF	Continuous media delivery, Video on demand, Smoothing, Continuous media servers
1	Ehsan Pakbaznia, Farzan Fallah, Massoud Pedram	Charge recycling in MTCMOS circuits: concept and analysis.	DAC	2006	DBLP DOI BibTeX RDF	low power design, MTCMOS, charge recycling
1	Yu Wang 0002, Yongpan Liu, Rong Luo, Huazhong Yang, Hui Wang 0004	Two-phase fine-grain sleep transistor insertion technique in leakage critical circuits.	ISLPED	2006	DBLP DOI BibTeX RDF	leakage current reduction, two-phase fine-grain sleep transistor insertion, mixed integer linear programming
1	Ricardo C. Goncalves da Silva, Henri Boudinov, Luigi Carro	A cell library for low power high performance CMOS voltage-mode quaternary logic.	SBCCI	2006	DBLP DOI BibTeX RDF	quaternary logic design, voltage-mode, multi-valued logic
1	Mohammad Hosseinabady, Pejman Lotfi-Kamran, Giorgio Di Natale, Stefano Di Carlo, Alfredo Benso, Paolo Prinetto	Single-Event Upset Analysis and Protection in High Speed Circuits.	European Test Symposium	2006	DBLP DOI BibTeX RDF
1	Chanseok Hwang, Chang Woo Kang, Massoud Pedram	Gate Sizing and Replication to Minimize the Effects of Virtual Ground Parasitic Resistances in MTCMOS Designs.	ISQED	2006	DBLP DOI BibTeX RDF
1	Yu Wang 0002, Hai Lin, Huazhong Yang, Rong Luo, Hui Wang 0004	Simultaneous Fine-grain Sleep Transistor Placement and Sizing for Leakage Optimization.	ISQED	2006	DBLP DOI BibTeX RDF
1	Ricardo C. Goncalves da Silva, Henri Boudinov, Luigi Carro	A low power high performance CMOS voltage-mode quaternary full adder.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
1	Chang Hao-li, Shi Zhong-ke, Fu Qing-hua	The Study of the Detection and Tracking of Moving Pedestrian Using Monocular-Vision.	International Conference on Computational Science	2006	DBLP DOI BibTeX RDF
1	Kayvan Mosharaf, Jerome Talim, Ioannis Lambadaris	A multi-threshold wavelength allocation scheme for fairness management in WDM ring networks.	BROADNETS	2005	DBLP BibTeX RDF
1	Tsuang-Wei Chang, TingTing Hwang, Sheng-Yu Hsu	Functionality directed clustering for low power MTCMOS design.	ASP-DAC	2005	DBLP DOI BibTeX RDF
1	Hassan Hassan, Mohab Anis, Mohamed I. Elmasry	A leakage-aware CAD flow for MTCMOS FPGA architectures (abstract only).	FPGA	2005	DBLP DOI BibTeX RDF
1	Andrea Lodi 0002, Luca Ciccarelli, Roberto Giansante	Combining low-leakage techniques for FPGA routing design.	FPGA	2005	DBLP DOI BibTeX RDF	low leakage, FPGA, power
1	Srivathsan Krishnamohan, Nihar R. Mahapatra	Increasing the energy efficiency of pipelined circuits via slack redistribution.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	slack passing, time borrowing, low-power design
1	Hassan Hassan, Mohab Anis, Mohamed I. Elmasry	LAP: a logic activity packing methodology for leakage power-tolerant FPGAs.	ISLPED	2005	DBLP DOI BibTeX RDF	activity profile, basic logic elements (BLEs), configurable logic blocks (CLBs), sleep transistor (ST), sub-threshold leakage power, FPGA, packing
1	Maria J. Avedillo, José M. Quintana, Héctor Pettenghi	Logic Models Supporting the Design of MOBILE-based RTD Circuits.	ASAP	2005	DBLP DOI BibTeX RDF
1	Dong Min, Li Xiangpeng, Wang Li	Image segmentation based on rough membership function.	GrC	2005	DBLP DOI BibTeX RDF
1	S. Kamae, Takahiro Irita, A. Tsukimori, S. Tarnaki, Toshihiro Hattori, Shinichi Yoshioka	SH-mobile - low power application processor for cellular [3G cellular phones].	ISCAS	2005	DBLP DOI BibTeX RDF
1	Puneet Gupta, Andrew B. Kahng, Puneet Sharma	A Practical Transistor-Level Dual Threshold Voltage Assignment Methodology.	ISQED	2005	DBLP DOI BibTeX RDF
1	Ramaprasath Vilangudipitchai, Poras T. Balsara	Power Switch Network Design for MTCMOS.	VLSI Design	2005	DBLP DOI BibTeX RDF
1	Xiaobo Zhou, Kuang-Yu Liu, Pamela Bradley, Norbert Perrimon, Stephen T. C. Wong	Towards Automated Cellular Image Segmentation for RNAi Genome-Wide Screening.	MICCAI	2005	DBLP DOI BibTeX RDF
1	Puneet Gupta, Andrew B. Kahng, Puneet Sharma, Dennis Sylvester	Selective gate-length biasing for cost-effective runtime leakage control.	DAC	2004	DBLP DOI BibTeX RDF	power, layout, manufacturability, leakage, OPC, lithography
1	A. Amirabadi, Javid Jaffari, Ali Afzali-Kusha, Mehrdad Nourani, Ali Khaki-Firooz	Leakage current reduction by new technique in standby mode.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	subthreshold current, low power, leakage current, digital integrated circuits, static power
1	Vishal Khandelwal, Ankur Srivastava	Leakage control through fine-grained placement and sizing of sleep transistors.	ICCAD	2004	DBLP DOI BibTeX RDF
1	Frank Sill, Frank Grassert, Dirk Timmermann	Low power gate-level design with mixed-Vth (MVT) techniques.	SBCCI	2004	DBLP DOI BibTeX RDF	MVT, leakage currents, threshold voltage
1	Valeriu Beiu	A Novel Highly Reliable Low-Power Nano Architecture When von Neumann Augments.	ASAP	2004	DBLP DOI BibTeX RDF
1	Soo Jin Park, Byoung Hee Yoon, Kwang Sub Yoon, Heung Soo Kim	Design of Quaternary Logic Gate Using Double Pass-Transistor Logic with Neuron MOS Down Literal Circuit.	ISMVL	2004	DBLP DOI BibTeX RDF
1	L. T. Clark, M. Morrow, W. Brown	Reverse-body bias and supply collapse for low effective standby power.	IEEE Trans. VLSI Syst.	2004	DBLP DOI BibTeX RDF
1	Jean Michel Daga, Caroline Papaix, Marylene Combe, Emmanuel Racape, Vincent Sialelli	Embedded EEPROM Speed Optimization Using System Power Supply Resources.	PATMOS	2004	DBLP DOI BibTeX RDF
1	Ilham Hassoune, Amaury Nève, Jean-Didier Legat, Denis Flandre	Investigation of Low-Power Low-Voltage Circuit Techniques for a Hybrid Full-Adder Cell.	PATMOS	2004	DBLP DOI BibTeX RDF
1	Hamid Beigy, Mohammad Reza Meybodi	Multi-threshold Guard Channel Policy for Next Generation Wireless Networks.	ISCIS	2003	DBLP DOI BibTeX RDF
1	Frank Honoré, Benton H. Calhoun, Anantha Chandrakasan	Power-aware architectures and circuits for FPGA-based signal processing.	FPGA	2003	DBLP DOI BibTeX RDF