Search results for "multi-valued decision diagrams"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Robert Mateescu, Radu Marinescu 0002, Rina Dechter	AND/OR Multi-valued Decision Diagrams for Constraint Optimization.	CP	2007	DBLP DOI BibTeX RDF
2	Dragan Jankovic, Radomir S. Stankovic, Rolf Drechsler	Reduction of Sizes of Multi-Valued Decision Diagrams by Copy Propertie.	ISMVL	2004	DBLP DOI BibTeX RDF
2	Craig M. Files, Rolf Drechsler, Marek A. Perkowski	Functional Decomposition of MVL Functions Using Multi-Valued Decision Diagrams. (PDF / PS)	ISMVL	1997	DBLP DOI BibTeX RDF	learning samples, minterms, machine learning, learning (artificial intelligence), minimization, functional decomposition, multi-valued logic, multi-valued decision diagrams, problem complexity, MVL functions
2	Tsutomu Sasao, Jon T. Butler	A Method to Represent Multiple-Output Switching Functions by Using Multi-Valued Decision Diagrams. (PDF / PS)	ISMVL	1996	DBLP DOI BibTeX RDF	multiple-output switching functions, multi-terminal, multivalued logic, decision tables, computation time, switching functions, switching functions, multi-valued decision diagrams
2	Rolf Drechsler	Verification of Multi-Valued Logic Networks. (PDF / PS)	ISMVL	1996	DBLP DOI BibTeX RDF	multi-valued logic networks verification, ordered multi-valued decision diagrams, two-valued circuits, formal verification, heuristics, logic testing, directed graphs, directed acyclic graph, multivalued logic circuits, functional equivalence
2	Patrick C. McGeer, Kenneth L. McMillan, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli, Patrick Scaglia	Fast discrete function evaluation using decision diagrams.	ICCAD	1995	DBLP DOI BibTeX RDF	address lookups, cycle-based logic simulation, decision-diagram based function evaluation, fast discrete function evaluation, latch ports, orders-of-magnitude potential speedup, output ports, logic design, memory hierarchy, logic CAD, decision theory, circuit analysis computing, memory bandwidth, table lookup, digital circuits, logic simulators, logic function, function evaluation, multi-valued decision diagrams
1	Johannes Ulrich Herrmann, Sieteng Soh, Geoff A. W. West, Suresh Rai	Using Multi-valued Decision Diagrams to Solve the Expected Hop Count Problem.	AINA Workshops	2009	DBLP DOI BibTeX RDF	expected hop count, imperfect nodes, imperfect links, network reliability, multi-value decision diagram
1	Andy Jinqing Yu, Gianfranco Ciardo, Gerald Lüttgen	Decision-diagram-based techniques for bounded reachability checking of asynchronous systems.	STTT	2009	DBLP DOI BibTeX RDF	Edge-valued decision diagrams, Petri net, Formal verification, BDDs, Reachability analysis, Bounded model checking, Asynchronous design, ADDs
1	Robert Mateescu, Rina Dechter, Radu Marinescu 0002	AND/OR Multi-Valued Decision Diagrams (AOMDDs) for Graphical Models.	J. Artif. Intell. Res. (JAIR)	2008	DBLP DOI BibTeX RDF
1	Robert Mateescu, Rina Dechter	AND/OR Multi-valued Decision Diagrams for Constraint Networks.	Concurrency, Graphs and Models	2008	DBLP DOI BibTeX RDF
1	Václav Dvorák	Embedded Firmware Development with Multi-way Branching.	ICONS	2008	DBLP DOI BibTeX RDF	Embedded firmware, iterative disjunctive decomposition, multi-valued functions, decision diagrams, space complexity
1	Tarik Hadzic, Esben Rune Hansen, Barry O'Sullivan	Layer Compression in Decision Diagrams.	ICTAI	2008	DBLP DOI BibTeX RDF
1	Shinobu Nagayama, Tsutomu Sasao	Representations of Two-Variable Elementary Functions Using EVMDDs and their Applications to Function Generators.	ISMVL	2008	DBLP DOI BibTeX RDF	EVMDD, EVBDD, two-variable elementary functions, l-restricted Mp-monotone increasing functions, function generators
1	Robert Mateescu, Rina Dechter	AND/OR Multi-Valued Decision Diagrams (AOMDDs) for Weighted Graphical Models.	UAI	2007	DBLP BibTeX RDF
1	Gianfranco Ciardo	Data Representation and Efficient Solution: A Decision Diagram Approach.	SFM	2007	DBLP DOI BibTeX RDF	edge-valued decision diagrams, binary decision diagrams, symbolic model checking, Kronecker algebra, multi-valued decision diagrams, state-space generation
1	Shinobu Nagayama, Tsutomu Sasao	Representations of Elementary Functions Using Edge-Valued MDDs.	ISMVL	2007	DBLP DOI BibTeX RDF
1	Jinzhao Wu, Lin Zhao	Multi-Valued Model Checking via Groebner Basis Approach.	TASE	2007	DBLP DOI BibTeX RDF
1	Aurélien Naldi, Denis Thieffry, Claudine Chaouiya	Decision Diagrams for the Representation and Analysis of Logical Models of Genetic Networks.	CMSB	2007	DBLP DOI BibTeX RDF	regulatory circuits, stable states, decision diagrams, logical modelling, Regulatory networks
1	Gianfranco Ciardo, Gerald Lüttgen, Andrew S. Miner	Exploiting interleaving semantics in symbolic state-space generation.	Formal Methods in System Design	2007	DBLP DOI BibTeX RDF	Symbolic state-space exploration, Decision diagrams, Kronecker algebra, Interleaving semantics
1	Robert Mateescu, Rina Dechter	Compiling Constraint Networks into AND/OR Multi-valued Decision Diagrams (AOMDDs).	CP	2006	DBLP DOI BibTeX RDF
1	Bertrand Folco, Vivian Brégier, Laurent Fesquet, Marc Renaudin	Technology Mapping for Area Optimized Quasi Delay Insensitive Circuits.	VLSI-SoC	2005	DBLP DOI BibTeX RDF
1	Shinobu Nagayama, Tsutomu Sasao	On the Minimization of Average Path Lengths for Heterogeneous MDDs.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Andrew S. Miner, David Parker	Symbolic Representations and Analysis of Large Probabilistic Systems.	Validation of Stochastic Systems	2004	DBLP DOI BibTeX RDF
1	Shinobu Nagayama, Tsutomu Sasao	Compact Representations of Logic Functions using Heterogeneous MDDs. (PDF / PS)	ISMVL	2003	DBLP DOI BibTeX RDF
1	Gianfranco Ciardo, Robert M. Marmorstein, Radu Siminiceanu	Saturation Unbound.	TACAS	2003	DBLP DOI BibTeX RDF
1	Rolf Drechsler	Evaluation of Static Variable Ordering Heuristics for MDD Construction. (PDF / PS)	ISMVL	2002	DBLP DOI BibTeX RDF	verification, heuristic, MDD, formal, variable ordering
1	Shinobu Nagayama, Tsutomu Sasao, Yukihiro Iguchi, Munehiro Matsuura	Representations of Logic Functions Using QRMDDs. (PDF / PS)	ISMVL	2002	DBLP DOI BibTeX RDF
1	Gianfranco Ciardo, Gerald Lüttgen, Radu Siminiceanu	Saturation: An Efficient Iteration Strategy for Symbolic State-Space Generation.	TACAS	2001	DBLP DOI BibTeX RDF
1	Rolf Drechsler, Mitchell A. Thornton, David Wessels	MDD-Based Synthesis of Multi-Valued Logic Networks. (PDF / PS)	ISMVL	2000	DBLP DOI BibTeX RDF
1	Frank Schmiedle, Wolfgang Günther, Rolf Drechsler	Dynamic Re-Encoding During MDD Minimization. (PDF / PS)	ISMVL	2000	DBLP DOI BibTeX RDF	variable grouping, MDD, BDD, sifting
1	Gianfranco Ciardo, Gerald Lüttgen, Radu Siminiceanu	Efficient Symbolic State-Space Construction for Asynchronous Systems.	ICATPN	2000	DBLP DOI BibTeX RDF
1	Frank Schmiedle, Rolf Drechsler, Bernd Becker	Exact channel routing using symbolic representation.	ISCAS	1999	DBLP DOI BibTeX RDF
1	Andrew S. Miner, Gianfranco Ciardo	Efficient Reachability Set Generation and Storage Using Decision Diagrams.	ICATPN	1999	DBLP DOI BibTeX RDF
1	Wilsin Gosti, Alberto L. Sangiovanni-Vincentelli, Tiziano Villa, Alexander Saldanha	An Exact Input Encoding Algorithm for BDDs Representing FSMs.	Great Lakes Symposium on VLSI	1998	DBLP DOI BibTeX RDF	input encoding, finite state machines, binary decision diagrams, multi-valued decision diagrams