Search results for "noise immunity"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Jiwei Fan, Xin Zhou, Liyu Yang, Alex Chien-Lin Huang	A low power high noise immunity boost DC-DC converter using the differential difference amplifiers.	ISLPED	2009	DBLP DOI BibTeX RDF	boost converter, differential difference amplifier, duty ripple voltage, noise immunity
2	Swaroop Ghosh, Swarup Bhunia, Kaushik Roy	Low-Power and testable circuit synthesis using Shannon decomposition.	ACM Trans. Design Autom. Electr. Syst.	2007	DBLP DOI BibTeX RDF	Shannon expansion, dynamic supply gating, test coverage, Design-for-test, IDDQ, noise immunity, test power
2	Noriyuki Miura, Tadahiro Kuroda	A 1Tb/s 3W Inductive-Coupling Transceiver Chip.	ASP-DAC	2007	DBLP DOI BibTeX RDF	150 ps, inductive-coupling transceiver chip, data transceivers, clock transceivers, biphase modulation, improved noise immunity, 1 Gbit/s, 1 Tbit/s, 1 GHz, 3 W, CMOS, BER, time division multiplexing
2	Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky	Designing Nanoscale Logic Circuits Based on Markov Random Fields.	J. Electronic Testing	2007	DBLP DOI BibTeX RDF	reliability, redundancy, Markov random fields, noise immunity, probabilistic computing
2	Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky	Designing logic circuits for probabilistic computation in the presence of noise.	DAC	2005	DBLP DOI BibTeX RDF	nanodevices, reliability, Markov random fields, emerging technologies, noise immunity, probabilistic computing, subthreshold operation
2	Farshad Moradi, Hamid Mahmoodi-Meimand, Ali Peiravi	A high speed and leakage-tolerant domino logic for high fan-in gates.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	high speed, noise immunity, deep submicron, fan-in, domino
2	Sheng-Zhi Du, Zeng-Qiang Chen, Zhu-Zhi Yuan	Evolutionary Pseudo-Relaxation Learning Algorithm for Bidirectional Associative Memory.	J. Comput. Sci. Technol.	2005	DBLP DOI BibTeX RDF	pseudo-relaxation method, digital pattern, genetic algorithm, neural network, associative memory, noise immunity
2	Li Ding 0002, Pinaki Mazumder	On circuit techniques to improve noise immunity of CMOS dynamic logic.	IEEE Trans. VLSI Syst.	2004	DBLP DOI BibTeX RDF
2	Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava	High level techniques for power-grid noise immunity.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	high-level noise-immune optimization
2	Yonghee Im, Kaushik Roy	LALM: A Logic-Aware Layout Methodology to Enhance the Noise Immunity of Domino Circuits.	ISVLSI	2003	DBLP DOI BibTeX RDF
2	Rajesh Kumar 0006	Interconnect and noise immunity design for the Pentium 4 processor.	DAC	2003	DBLP DOI BibTeX RDF
2	Yonghee Im, Kaushik Roy	A logic-aware layout methodology to enhance the noise immunity of domino circuits.	ISCAS	2003	DBLP DOI BibTeX RDF
2	M. Takahashi, Boon-Keat Tan, H. Iwamura, T. Matsuoka, K. Taniguchi	A study of robustness and coupling-noise immunity on simultaneous data transfer CDMA bus interface.	ISCAS	2002	DBLP DOI BibTeX RDF
2	Fabian Vargas, Rubem Dutra Ribeiro Fagundes, Daniel Barros Jr.	Experimental Results of a Recovery Block Scheme to Handle Noise in Speech Recognition Systems.	Asian Test Symposium	2002	DBLP DOI BibTeX RDF	Speech-Recognition Systems (SRS), Recovery Blocks Scheme, Digital Signal Processing (DSP), On-Line Testing, Performance Degradation, Noise Immunity
2	Enrique Castillo, Oscar Fontenla-Romero, Bertha Guijarro-Berdiñas, Amparo Alonso-Betanzos	A Measure of Noise Immunity for Functional Networks.	IWANN	2001	DBLP DOI BibTeX RDF
2	José Luis Bernier, Jorge González, Antonio Cañas, Julio Ortega	Assessing the Noise Immunity of Radial Basis Function Neural Networks.	IWANN	2001	DBLP DOI BibTeX RDF
2	Radu M. Secareanu, Ivan S. Kourtev, Juan Becerra, Thomas E. Watrobski, Christopher Morton, William Staub, Thomas Tellier, Eby G. Friedman	Noise Immunity of Digital Circuits in Mixed-Signal Smart Power Systems.	Great Lakes Symposium on VLSI	1999	DBLP DOI BibTeX RDF
2	Alexander Taubin, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno	Behavioral Transformations to Increase Noise Immunity in Asynchronous Specifications.	ASYNC	1999	DBLP DOI BibTeX RDF
2	Adnan Kabbani, A. J. Al-Khalili	Dynamic CMOS noise immunity estimation in submicron regime.	ISCAS	1999	DBLP DOI BibTeX RDF
2	Jason M. Nash, John N. Carter, Mark S. Nixon	The Velocity Hough Transform: A New Technique for Dynamic Feature Extraction. (PDF / PS)	ICIP	1997	DBLP DOI BibTeX RDF	velocity Hough transform, dynamic feature extraction, temporal image sequences, moving parametric shapes, time variant structure, arterial wall data, cross-sectional ultrasound images, performance, feature extraction, motion, identification, noise immunity, partial occlusion
2	S. Sandeep Pradhan, Kannan Ramchandran	Efficient layered video delivery over multicarrier systems using optimized embedded modulation. (PDF / PS)	ICIP	1997	DBLP DOI BibTeX RDF	efficient layered video delivery, multicarrier systems, optimized embedded modulation, multi-carrier modulation systems, layered framework, multiresolution framework, importance layers, BER requirements, embedded multi-carrier modulation, EMCM, table-lookup based power allocation algorithm, multicarrier constellation design, deliverable throughput bitrates, resolution layers, TDM-based MCM designs, embedded wavelet image coder, 3 dB, visual communication, noise immunity, MCM, image transmission
2	Zheng Tang, T. Yamaguchi, Koichi Tashima, Okihiko Ishizuka, Koichi Tanno	Multiple-Valued Immune Network Model and Its Simulations. (PDF / PS)	ISMVL	1997	DBLP DOI BibTeX RDF	multiple-valued immune network model, biological immune response network, B cells, T cells, experimentally testable predictions, letter recognition application, memory pattern, memory capacity, simulations, multivalued logic circuits, noise immunity
2	Vincenzo Catania, Marco Russo	Analog gates for a VLSI fuzzy processor.	VLSI Design	1995	DBLP DOI BibTeX RDF	VLSI fuzzy processor, synchronous fuzzy circuits, high noise immunity, fuzzy gates, VLSI, fuzzy logic, CMOS logic circuits, CMOS technology, logic gates, analogue processing circuits
2	Ben-Kwei Jang, Roland T. Chin	One-Pass Parallel Thinning: Analysis, Properties, and Quantitative Evaluation.	IEEE Trans. Pattern Anal. Mach. Intell.	1992	DBLP DOI BibTeX RDF	one-pass parallel thinning, unit-width convergence, pipeline processing model, skeletal connectivity, parallel algorithms, image recognition, shape analysis, pipeline processing, convergence of numerical methods, noise immunity, medial axis approximation
2	Ben-Kwei Jang, Roland T. Chin	Analysis of Thinning Algorithms Using Mathematical Morphology.	IEEE Trans. Pattern Anal. Mach. Intell.	1990	DBLP DOI BibTeX RDF	digital skeletons, skeletal bias, convergence, computerised picture processing, mathematical morphology, noise immunity, thinning algorithms
1	Liyun Su, Qian Yang, Yuli Zhang, Jiaojun Li	Noise Immunity of Duffing Oscillator And Its Applications in Weak UWB Signal Detection.	JNW	2012	DBLP DOI BibTeX RDF
1	Junhyeok Yang, Seungchul Jung, Young-Jin Woo, Jinyong Jeon, Sungwoo Lee, Changbyung Park, Hyunsik Kim, Seung-Tak Ryu, Gyu-Hyeong Cho	A novel readout IC with high noise immunity for charge-based touch screen panels.	CICC	2010	DBLP DOI BibTeX RDF
1	Massimo Alioto	Closed-form analysis of DC noise immunity in subthreshold CMOS logic circuits.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Mohammad Reza Kakoee, Ashoka Visweswara Sathanur, Antonio Pullini, Jos Huisken, Luca Benini	Automatic synthesis of near-threshold circuits with fine-grained performance tunability.	ISLPED	2010	DBLP DOI BibTeX RDF	near threshold, sub-threshold performance, variability compensation, low power, ultra low power, dual VDD, sub-threshold
1	Xiaoqing Wang, Jintao Wang, Zhaocheng Wang, Zhixing Yang, Jian Song	Improved DFT-based channel estimation for OFDM systems over multipath channels.	IWCMC	2010	DBLP DOI BibTeX RDF	CE, DFT, wavelet decomposition, multipath channel
1	Gwo-Long Lin	Robust Translational Motion of Single-Row SPCE by the Parallel Binocular.	CSE	2009	DBLP DOI BibTeX RDF
1	Bao Liu	Robust differential asynchronous nanoelectronic circuits.	ISQED	2009	DBLP DOI BibTeX RDF
1	Fabio Frustaci, Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo	A New Dynamic Logic Circuit Design for an Effective Trade-Off between Noise-Immunity, Performance and Energy Dissipation.	PATMOS	2008	DBLP DOI BibTeX RDF
1	Luca Scalia, Ilenia Tinnirello, Domenico Giustiniano	Side Effects of Ambient Noise Immunity Techniques on Outdoor IEEE 802.11 Deployments.	GLOBECOM	2008	DBLP DOI BibTeX RDF
1	C. R. Venugopal, Prasanth Soraiyur, Jagannath Rao	Evaluation of the PTSI Crosstalk Noise Analysis Tool and Development of an Automated Spice Correlation Suite to Enable Accuracy Validation.	ISQED	2008	DBLP DOI BibTeX RDF	Noise Propagation, Noise Immunity Curve, Crosstalk
1	Zhang Yingying, Lai Jiancheng, Wang Chunyong, Li Zhenhua	Considerations for Improving the Performance of Surface Plasmon Resonance Biosensors.	BMEI	2008	DBLP DOI BibTeX RDF	SPR biosensor, beam divergence, noise limitation, biomolecular interaction analysis
1	Zhi-bing Wang, Rui-hua Lu	A New Algorithm for Image Segmentation Based on Fast Fuzzy C-Means Clustering.	CSSE	2008	DBLP DOI BibTeX RDF
1	Jose Oliveira, José Alberto Fonseca, Paulo Bartolomeu, Luis C. Costa	Evaluating severe noise interference in IEEE 802.15.4 based location systems.	ETFA	2008	DBLP DOI BibTeX RDF
1	Nikos Petrellis, Fotios Gioulekas, Michael K. Birbas, John C. Kikidis, Alexios N. Birbas	Use of interleaving and error correction to infrared patterns for the improvement of position estimation systems.	ETFA	2008	DBLP DOI BibTeX RDF
1	Dieter Brückmann	Design and realization of continuous-time wave digital filters.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Sherif A. Tawfik, Volkan Kursun	Characterization of New Static Independent-Gate-Biased FinFET Latches and Flip-Flops under Process Variations.	ISQED	2008	DBLP DOI BibTeX RDF
1	Dennis R. Morgan	Wideband Equalization Using Multiple Antennas.	WCNC	2008	DBLP DOI BibTeX RDF
1	I-Chyn Wey, You-Gang Chen, An-Yeu Wu	Design and Analysis of Isolated Noise-Tolerant (INT) Technique in Dynamic CMOS Circuits.	IEEE Trans. VLSI Syst.	2008	DBLP DOI BibTeX RDF
1	Jose Morales, Oscar Castillo, Jose Soria	Stability on Type-1 and Type-2 Fuzzy Logic Systems.	Soft Computing for Hybrid Intelligent Systems	2008	DBLP DOI BibTeX RDF	Fuzzy Lyapunov Synthesis, Fuzzy Systems, Control Systems, Systems Stability, Imprecise Data
1	M. Hajiarbabi, J. Askari, S. Sadri, M. Saraee	The Evaluation of Camera Motion, Defocusing and Noise Immunity for Linear Appearance Based Methods in Face Recognition.	World Congress on Engineering	2007	DBLP BibTeX RDF
1	Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky	Interactive presentation: Techniques for designing noise-tolerant multi-level combinational circuits.	DATE	2007	DBLP DOI BibTeX RDF
1	Jens Petter Abrahamsen, Tor Sverre Lande	Soft-well digital circuit design.	SBCCI	2007	DBLP DOI BibTeX RDF	well biasing, reliability, low power design
1	Xiaoyin Xu, Majid Ahmadi	A Human Face Recognition System Using Neural Classifiers.	CGIV	2007	DBLP DOI BibTeX RDF
1	Hang Chang, Kumari L. Andarawewa, Ju Han, Mary Helen Barcellos-Hoff, Bahram Parvin	Perceptual Grouping of Membrane Signals in Cell-Based Assays.	ISBI	2007	DBLP DOI BibTeX RDF
1	Ju Han, Hang Chang, Qing Yang, Mary Helen Barcellos-Hoff, Bahram Parvin	Segmentation of Mammosphere Structures from Volumetric Data.	ISBI	2007	DBLP DOI BibTeX RDF
1	Volkan Kursun, Sherif A. Tawfik, Zhiyu Liu	Leakage-Aware Design of Nanometer SoC.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Jaydeep P. Kulkarni, Kaushik Roy	A High Performance, Scalable Multiplexed Keeper Technique.	ISQED	2007	DBLP DOI BibTeX RDF
1	Chaitanya Sathe, Santanu Mahapatra	Modeling and Analysis of Noise Margin in SET Logic.	VLSI Design	2007	DBLP DOI BibTeX RDF
1	Jason D. Bakos, Donald M. Chiarulli, Steven P. Levitan	Lightweight Error Correction Coding for System-Level Interconnects.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	Interconnections (subsystems), coding and information theory, error control codes, interconnection architectures, code design, coding tools and techniques
1	Gang Zheng, Chia-Jiu Wang, Terrence E. Boult	Application of Projective Invariants in Hand Geometry Biometrics.	IEEE Transactions on Information Forensics and Security	2007	DBLP DOI BibTeX RDF
1	Bahram Parvin, Qing Yang, Ju Han, Hang Chang, Bjorn Rydberg, Mary Helen Barcellos-Hoff	Iterative Voting for Inference of Structural Saliency and Characterization of Subcellular Events.	IEEE Transactions on Image Processing	2007	DBLP DOI BibTeX RDF
1	Xuexia Wang, Zhilu Wu, Yaqin Zhao, Guanghui Ren	Modified ART2A-DWNN for Automatic Digital Modulation Recognition.	ISNN	2007	DBLP DOI BibTeX RDF
1	Mohamed Abbas, Makoto Ikeda, Kunihiro Asada	Noise Immunity Investigation of Low Power Design Schemes.	IEICE Transactions	2006	DBLP DOI BibTeX RDF
1	Nahmsuk Oh, Li Ding 0002, Alireza Kasnavi	Fast Sequential Cell Noise Immunity Characterization Using Meta-stable Point of Feedback Loop.	ISQED	2006	DBLP DOI BibTeX RDF
1	Pål Anders Floor, Tor A. Ramstad	Noise Immunity for 1: N and M: 1 Nonlinear Mappings for Source-Channel Coding.	DCC	2006	DBLP DOI BibTeX RDF
1	Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky	Optimizing noise-immune nanoscale circuits using principles of Markov random fields.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	Markov random fields, error correcting codes, emerging technologies, noise immunity, circuit optimization, subthreshold operation
1	Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky	MRF Reinforcer: A Probabilistic Element for Space Redundancy in Nanoscale Circuits.	IEEE Micro	2006	DBLP DOI BibTeX RDF	Reliability, redundancy, Markov random fields, noise immunity, probabilistic computing
1	Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky	Designing MRF based error correcting circuits for memory elements.	DATE	2006	DBLP DOI BibTeX RDF
1	S. M. Rezaul Hasan, Nazmul Ula	A Novel Current Feed-back Sub-Nano-Siemen Transconductance Circuit Suitable for Large Time-Constant Bio-medical Applications.	APCCAS	2006	DBLP DOI BibTeX RDF
1	Chua-Chin Wang, Gang-Neng Sung, Ming-Kai Chang, Ying-Yu Shen	Engery-Efficient Double-Edge Triggered Flip-Flop Design.	APCCAS	2006	DBLP DOI BibTeX RDF
1	A. Amirabadi, A. Chehelcheraghi, S. H. Rasouli, A. Seyedi, Ali Afzali-Kusha	Low power and high performance clock delayed domino logic using saturated keeper.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Chunjie Duan, Kanupriya Gulati, Sunil P. Khatri	Memory-based crosstalk canceling CODECs for on-chip buses.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Bo Fu, Paul Ampadu	Techniques for robust energy efficient subthreshold domino CMOS circuits.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Sangho Shin, Kwyro Lee, Sung-Mo Kang	Low-power 2.4GHz CMOS frequency synthesizer with differentially controlled MOS varactors.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Houman Zarrabi, Haydar Saaied, Asim J. Al-Khalili, Yvon Savaria	Zero skew differential clock distribution network.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Ali Bastani, Charles A. Zukowski	A Low-Leakage High-Speed Monotonic Static CMOS 64b Adder in a Dual Gate Oxide 65-nm CMOS Technology.	ISQED	2006	DBLP DOI BibTeX RDF
1	Zhiyu Liu, Volkan Kursun	Robust Dynamic Node Low Voltage Swing Domino Logic with Multiple Threshold Voltages.	ISQED	2006	DBLP DOI BibTeX RDF	Low Voltage Swing, Gate Oxide Leakage, Domino Logic, Subthreshold Leakage, Dual Threshold Voltage
1	Zhiyu Liu, Volkan Kursun	High Speed Low Swing Dynamic Circuits with Multiple Supply and Threshold Voltages.	ISVLSI	2006	DBLP DOI BibTeX RDF
1	Stéphane Badel, Ilhan Hatirnaz, Yusuf Leblebici, Elizabeth J. Brauer	Implementation of Structured ASIC Fabric Using Via-Programmable Differential MCML Cells.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
1	Ashok Narasimhan, Bhooma Srinivasaraghavan, Ramalingam Sridhar	A Low-Power Asymmetric Source Driver Level Converter Based Current-Mode Signaling Scheme for Global Interconnects.	VLSI Design	2006	DBLP DOI BibTeX RDF
1	Vikas Chaudhary, Lawrence T. Clark	Low-power high-performance nand match line content addressable memories.	IEEE Trans. VLSI Syst.	2006	DBLP DOI BibTeX RDF
1	Masud H. Chowdhury, Yehea I. Ismail	Realistic scalability of noise in dynamic circuits.	IEEE Trans. VLSI Syst.	2006	DBLP DOI BibTeX RDF
1	Byung-Do Yang, Lee-Sup Kim	A low-power ROM using single charge-sharing capacitor and hierarchical bit line.	IEEE Trans. VLSI Syst.	2006	DBLP DOI BibTeX RDF
1	Hongwei Dai, Yu Yang, Yanqiu Che, Zheng Tang	Clonal Selection Theory Based Artificial Immune System and Its Application.	ICONIP	2006	DBLP DOI BibTeX RDF
1	Ju Han, Hang Chang, Qing Yang, Mary Helen Barcellos-Hoff, Bahram Parvin	3D Segmentation of Mammospheres for Localization Studies.	ISVC	2006	DBLP DOI BibTeX RDF
1	Yinghua Li, Alex Kondratyev, Robert K. Brayton	Gaining Predictability and Noise Immunity in Global Interconnects.	ACSD	2005	DBLP DOI BibTeX RDF
1	Walid Elgharbawy, Pradeep Golconda, Magdy A. Bayoumi	Noise-tolerant high fan-in dynamic CMOS circuit design.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	high fan-in domino, CMOS, noise-tolerant, subthreshold leakage, dynamic circuits
1	A. Amirabadi, Y. Mortazavi, Nariman Moezzi Madani, Ali Afzali-Kusha, Mehrdad Nourani	Domino logic with an efficient variable threshold voltage keeper.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Chung-Hsien Hua, Wei Hwang, Chih-Kai Chen	Noise-tolerant XOR-based conditional keeper for high fan-in dynamic circuits.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Zeynep Toprak Deniz, Yusuf Leblebici	Low-power current mode logic for improved DPA-resistance in embedded systems.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Sreeram Chandrasekar, Gaurav Kumar Varshney, V. Visvanathan	A Comprehensive Methodology for Noise Characterization of ASIC Cell Libraries.	ISQED	2005	DBLP DOI BibTeX RDF
1	Alex Gyure, Alireza Kasnavi, Sam C. Lo, Peivand F. Tehrani, William Shu, Mahmoud Shahram, Joddy W. Wang, Jindrich Zejda	Noise Library Characterization for Large Capacity Static Noise Analysis Tools.	ISQED	2005	DBLP DOI BibTeX RDF
1	Sreeram Chandrasekar, V. Visvanathan, Gaurav Kumar Varshney	Application of DC Transfer Characteristics in the Elimination of Redundant Vectors for Transient Noise Characterization of Static CMOS Circuits.	VLSI Design	2005	DBLP DOI BibTeX RDF
1	Ashok Narasimhan, Manish Kasotiya, Ramalingam Sridhar	A Low-Swing Differential Signaling Scheme for On-Chip Global Interconnects.	VLSI Design	2005	DBLP DOI BibTeX RDF
1	Robert J. Price, Anthony E. Zukas	Application of Latent Semantic Indexing to Processing of Noisy Text.	ISI	2005	DBLP DOI BibTeX RDF
1	Li Ding 0002, Pinaki Mazumder	A novel technique to improve noise immunity of CMOS dynamic logic circuits.	DAC	2004	DBLP DOI BibTeX RDF	domino logic style, negative differential resistance, noise-tolerant design, digital integrated circuits, dynamic circuits
1	Volkan Kursun, Eby G. Friedman	Forward body biased keeper for enhanced noise immunity in domino logic circuits.	ISCAS	2004	DBLP BibTeX RDF
1	Fernando Mendoza-Hernandez, Mónico Linares Aranda, Víctor H. Champac Vilela	The noise immunity of dynamic digital circuits with technology scaling.	ISCAS	2004	DBLP BibTeX RDF
1	Fabian Vargas, Rubem Dutra Ribeiro Fagundes, Daniel Barros Jr., Diogo B. Brum, Eduardo Luis Rhod	Merging a DSP-Oriented Signal Integrity Technique and SW-Based Fault Handling Mechanisms to Ensure Reliable DSP Systems.	J. Electronic Testing	2004	DBLP DOI BibTeX RDF	digital signal processing (DSP) systems, electromagnetic interference (EMI), speech recognition system (SRS), on-line testing, noise immunity
1	Alireza Kasnavi, Joddy W. Wang, Mahmoud Shahram, Jindrich Zejda	Analytical modeling of crosstalk noise waveforms using Weibull function.	ICCAD	2004	DBLP DOI BibTeX RDF
1	Qing Yang, Bahram Parvin	Perceptual Organization of Radial Symmetries.	CVPR	2004	DBLP DOI BibTeX RDF
1	Chunjie Duan, Sunil P. Khatri	Exploiting Crosstalk to Speed up On-Chip Buse.	DATE	2004	DBLP DOI BibTeX RDF
1	Mohamed Abbas, Makoto Ikeda, Kunihiro Asada	Noise Effects on Performance of Low Power Design Schemes in Deep Submicron Regime.	DFT	2004	DBLP DOI BibTeX RDF
1	Meghna Singh, Mrinal K. Mandal, Anup Basu	Robust KLT Tracking with Gaussian and Laplacian of Gaussian Weighting Functions.	ICPR	2004	DBLP DOI BibTeX RDF
1	Qing Yang, Bahram Parvin, Mary Helen Barcellos-Hoff	Localization of Saliency through Iterative Voting.	ICPR	2004	DBLP DOI BibTeX RDF