Search results for "operational amplifier"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Mustafa Altun, Hakan Kuntman	High CMRR current mode operational amplifier with a novel class AB input stage.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	current-mode operational amplifier, current-mode circuits
3	Zhiyuan Li, Fengchang Lai, Mingyan Yu	Low-noise high-precision operational amplifier using vertical NPN transistor in CMOS technology.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	V-NPN transistor, deep n-well CMOS process, high-precision, input bias current cancellation, operational amplifier, low-noise
3	Hesam Amir Aslanzadeh, Saeid Mehrmanesh, Mohammad B. Vahidfar, Amin Quasem Safarian, Reza Lotfi	A 1-V 1-mW high-speed class AB operational amplifier for high-speed low power pipelined A/D converters using "Slew Boost" technique.	ISLPED	2003	DBLP DOI BibTeX RDF	CMOS analog circuit, Slew Boost technique, class AB, low power, high speed, operational amplifier, pipelined analog to digital converter, ultra low voltage
3	Soon-Jyh Chang, Chung-Len Lee, Jwu E. Chen	Functional test pattern generation for CMOS operational amplifier.	VTS	1997	DBLP DOI BibTeX RDF	functional test pattern generation, CMOS operational amplifier, programmable gain/loss mixed signal circuit, op amp testing, IC testing, CMOS analogue integrated circuits
3	Sudhir Aggarwal	An Enhanced Macromodel for a CMOS Operational Amplifier for HDL Implementation.	VLSI Design	1996	DBLP DOI BibTeX RDF	VHDL-Analog, Non-linear model, Analog IC's, Operational Amplifier, Macromodel
3	Hassan Ihs, Christian Dufaza	Tolerance DC bands of CMOS operational amplifier.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	tolerance DC bands, CMOS operational amplifier, DC node voltages, data tolerance bands, foundry process fluctuations, DC branch current, OA, supply voltage, catastrophic defects, transistor connections, optimization, fault diagnosis, integrated circuit testing, fault detection, fault model, fault simulation, circuit optimisation, operational amplifiers, integrated circuit modelling, transistor size, CMOS analogue integrated circuits, design parameters
2	Heimo Uhrmann, Franz Schlögl, Kurt Schweiger, Horst Zimmermann	A 1GHz-GBW operational amplifier for DVB-H receivers in 65nm CMOS.	DDECS	2009	DBLP DOI BibTeX RDF
2	David Kubanek, Kamil Vrba	Second-Order State-Variable Filter with Current Operational Amplifiers.	ICONS	2008	DBLP DOI BibTeX RDF	Current operational amplifier, Current mode, Active filter
2	Zhiyuan Li, Mingyan Yu, Jianguo Ma	A Novel Input Stage Based on DTMOS for Low-Voltage Low-Noise Operational Amplifier.	APCCAS	2006	DBLP DOI BibTeX RDF
2	Zhiyuan Li, Mingyan Yu, Jianguo Ma	A Rail-to-Rail I/O Operational Amplifier with 0.5% gm Fluctuation Using Double P-channel Differential Input Pairs.	VLSI Design	2006	DBLP DOI BibTeX RDF
2	Roopak Suri, C. M. Markan	Threshold Trimming Based Design of a CMOS Programmable Operational Amplifier.	VLSI Design	2006	DBLP DOI BibTeX RDF
2	Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal, J. A. Galan	A free but efficient class AB two-stage operational amplifier.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Z. Huang, Yvon Savaria, Mohamad Sawan, R. Meinga	High-voltage operational amplifier based on dual floating-gate transistors.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Murari Kejariwal, Prasad Ammisetti, John Melanson	Built-in self-test mode in a multi-path feedforward compensated operational amplifier.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Hong-Yi Huang, Bo-Ruei Wang, Jen-Chieh Liu	High-gain and high-bandwidth rail-to-rail operational amplifier with slew rate boost circuit.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Joongho Choi, Jinup Lim, Cheng-Chew Lim	A low-voltage operational amplifier with high slew-rate for sigma-delta modulators.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Shaolei Quan, Qiang Qiang, Chin-Long Wey	Design of a CMOS Operational Amplifier for Extreme-Voltage Stress Test.	Asian Test Symposium	2005	DBLP DOI BibTeX RDF
2	Eduardo Romero, Gabriela Peretti, Carlos A. Marqués	An Operational Amplifier Model for Test Planning at Behavioral Level.	VLSI Design	2005	DBLP DOI BibTeX RDF
2	Salvatore Pennisi	High-performance CMOS current feedback operational amplifier.	ISCAS	2005	DBLP DOI BibTeX RDF
2	Vadim Ivanov, Igor M. Filanovsky	A 110 dB CMRR/PSRR/gain CMOS operational amplifier.	ISCAS	2005	DBLP DOI BibTeX RDF
2	Mikko Loikkanen, Juha Kostamovaara	High current CMOS operational amplifier.	ISCAS	2005	DBLP DOI BibTeX RDF
2	Shaolei Quan, Meng-Yao Liu, Chin-Long Wey	Design of a CMOS Operational Amplifier Amenable to Extreme Voltage Stress.	DFT	2005	DBLP DOI BibTeX RDF
2	Behrouz Nowrouzian, Arthur T. G. Fuller, M. N. S. Swamy	Design of arbitrary-order minimal operational-amplifier BIBO stable Bode-type variable-amplitude active-RC equalizers.	ISCAS	2004	DBLP DOI BibTeX RDF
2	Eduardo Romero, Gabriela Peretti, Carlos A. Marqués	Oscillation Test Strategy: A Case Study.	J. Electronic Testing	2004	DBLP DOI BibTeX RDF	oscillation test strategy, testing, design for test, operational amplifier
2	Pablo Aguirre, Fernando Silveira	Design of a Reusable Rail-to-Rail Operational Amplifier.	SBCCI	2003	DBLP DOI BibTeX RDF
2	Franz Schlögl, Horst Zimmermann	120nm CMOS Operational Amplifier with Pseudo-Cascodes and Positive Feedback.	IWSOC	2003	DBLP DOI BibTeX RDF
2	Haibin Huang, Ezz I. El-Masry	A fast settling CMOS operational amplifier.	ISCAS	2003	DBLP DOI BibTeX RDF
2	V. C. Vincence, Carlos Galup-Montoro, Márcio C. Schneider	A low-voltage CMOS class-AB operational amplifier.	ISCAS	2002	DBLP DOI BibTeX RDF
2	L. S. Y. Wong	1.8 V low voltage pseudo-differential input operational amplifier.	ISCAS	2002	DBLP DOI BibTeX RDF
2	A. Hossein Nejad-Malayeri, T. Manku	A 270 MHz, 1.8 V fully differential CMOS operational amplifier for switched capacitor channel select filters in wide-band wireless applications.	ISCAS	2001	DBLP DOI BibTeX RDF
2	John R. Koza, Forrest H. Bennett III, David Andre, Martin A. Keane	Evolution using genetic programming of a low-distortion, 96 decibel operational amplifier.	SAC	1997	DBLP DOI BibTeX RDF	analog circuit synthesis, automated circuit design, genetic programming, operational amplifier
2	George A. Hadgis, P. R. Mukund	A novel CMOS monolithic analog multiplier with wide input dynamic range.	VLSI Design	1995	DBLP DOI BibTeX RDF	analogue multipliers, circuit feedback, CMOS monolithic analog multiplier, input dynamic range, voltage-controlled variable linear resistor, feedback network, PSpice simulation results, circuit analysis computing, linearity, SPICE, operational amplifiers, operational amplifier, CMOS analogue integrated circuits
2	Ashok Balivada, Yatin Vasant Hoskote, Jacob A. Abraham	Verification of transient response of linear analog circuits.	VTS	1995	DBLP DOI BibTeX RDF	linear network analysis, circuit behavior, operational amplifier macro circuits, input waveforms, extracted state equations, Z-domain, digital representation, finite state machines, active networks, transfer functions, transfer function, transient analysis, operational amplifiers, frequency-domain analysis, formal techniques, state-space methods, analogue circuits, transient response, transient response, linear analog circuits, equivalent circuits
1	Ayden Maralani, Michael S. Mazzola	The Design of an Operational Amplifier Using Silicon Carbide JFETs.	IEEE Trans. on Circuits and Systems	2012	DBLP DOI BibTeX RDF
1	Rahul Singh, Yves Audet, Yves Gagnon, Yvon Savaria, Étienne Boulais, Michel Meunier	A Laser-Trimmed Rail-to-Rail Precision CMOS Operational Amplifier.	IEEE Trans. on Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Yuan Jun, Tachibana Masayoshi	A BIST scheme for operational amplifier by checking the stable output of transient response.	ECCTD	2011	DBLP DOI BibTeX RDF
1	Yoshinori Kusuda	A 5.9nV/√Hz chopper operational amplifier with 0.78μV maximum offset and 28.3nV/°C offset drift.	ISSCC	2011	DBLP DOI BibTeX RDF
1	Martijn F. Snoeij, Mikhail V. Ivanov	A 36V JFET-input bipolar operational amplifier with 1μV/°C maximum offset drift and -126dB total harmonic distortion.	ISSCC	2011	DBLP DOI BibTeX RDF
1	Aldo Pena-Perez, Edoardo Bonizzoni, Franco Maloberti	A low-power third-order ΔΣ modulator using a single operational amplifier.	ISCAS	2011	DBLP DOI BibTeX RDF
1	Soliman A. Mahmoud	Low Power Low-Pass Filter with Programmable cutoff Frequency Based on a Tunable UNITY Gain Frequency Operational amplifier.	Journal of Circuits, Systems, and Computers	2010	DBLP DOI BibTeX RDF
1	Yi-Chuan Tarn, Po-Chih Ku, Hsieh-Hung Hsieh, Liang-Hung Lu	An Amorphous-Silicon Operational Amplifier and Its Application to a 4-Bit Digital-to-Analog Converter.	J. Solid-State Circuits	2010	DBLP DOI BibTeX RDF
1	Massimiliano Belloni, Edoardo Bonizzoni, Andrea Fornasari, Franco Maloberti	A Micropower Chopper - CDS Operational Amplifier.	J. Solid-State Circuits	2010	DBLP DOI BibTeX RDF
1	Seungchul Jung, Young-Jin Woo, Tae-Kyu Nam, Jinyong Jeon, Gyu-Ha Cho, Gyu-Hyeong Cho	Dynamic push-pull operational amplifier for AMLCD common voltage driver using minimum current limiting circuit.	CICC	2010	DBLP DOI BibTeX RDF
1	Jili Tao, Xiaoming Chen, Yong Zhu	Constraint Multi-objective Automated Synthesis for CMOS Operational Amplifier.	LSMS/ICSEE	2010	DBLP DOI BibTeX RDF
1	Ji-Eun Jang, Yung-Kuang Miao, Yung-Pin Lee	High-bandwidth power-scalable 10-bit pipelined ADC using bandwidth-reconfigurable operational amplifier.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Sahbi Baccar, Timothée Levi, Dominique Dallet, Vladimir Shitikov, François Barbara	A behavioral and temperature measurements-based modeling of an operational amplifier using VHDL-AMS.	ICECS	2010	DBLP DOI BibTeX RDF
1	Gino Giusi, Felice Crupi, Calogero Pace, Paolo Magnone	Full Model and Characterization of Noise in Operational Amplifier.	IEEE Trans. on Circuits and Systems	2009	DBLP DOI BibTeX RDF
1	Wu Zhao, Rui Fu, Zhi-Yong Zhang, Wei-Dong Cheng	Design of a Rail-to-Rail Constant-gm CMOS Operational Amplifier.	CSIE	2009	DBLP DOI BibTeX RDF
1	Fahmi Elsayed, Mohamed F. Ibrahim, Yehya H. Ghallab, Wael M. Badawy, Brent Maundy	A new 90NM CMOS current feedback operational amplifier.	CCECE	2009	DBLP DOI BibTeX RDF
1	Mingjun Fan, Junyan Ren, Yao Guo, Yuanwen Li, Fan Ye, Ning Li	A Novel Operational Amplifier for Low-voltage Low-power SC Circuits.	ISCAS	2009	DBLP DOI BibTeX RDF
1	Ayden Maralani, Michael S. Mazzola	Design of a Silicon Carbide JFET based Operational Amplifier for Gain and CMRR Performance.	ISCAS	2009	DBLP DOI BibTeX RDF
1	G. A. V. Sai Praneeth, Anil K. Saini	A self biased operational amplifier at ultra low power supply voltage.	ICECS	2009	DBLP DOI BibTeX RDF
1	Björn Lipka, Ulrich Kleine, Christoph Scheytt, Klaus Schmalz	Design of a complementary folded-cascode operational amplifier.	SoCC	2009	DBLP DOI BibTeX RDF
1	Piotr Jantos, Damian Grzechca, Jerzy Rutkowski	Global parametric faults identification with the use of Differential Evolution.	DDECS	2009	DBLP DOI BibTeX RDF
1	Hailong You, Maofeng Yang, Dan Wang, Xinzhang Jia	Kriging Model combined with latin hypercube sampling for surrogate modeling of analog integrated circuit performance.	ISQED	2009	DBLP DOI BibTeX RDF
1	Angan Das, Ranga Vemuri	Fuzzy Logic Based Guidance to Graph Grammar Framework for Automated Analog Circuit Design.	VLSI Design	2009	DBLP DOI BibTeX RDF
1	Ming Liu, Hua Yu, Wei Wang 0003	FPAA Based on Integration of CMOS and Nanojunction Devices for Neuromorphic Applications.	NanoNet	2008	DBLP DOI BibTeX RDF	Field programmable analog arrays (FPAA), Nanojunction devices, Operational amplifier (Op-amp)
1	Angan Das, Ranga Vemuri	Topology synthesis of analog circuits based on adaptively generated building blocks.	DAC	2008	DBLP DOI BibTeX RDF	genetic algorithm, automated design, topology generation
1	Almitra Pradhan, Ranga Vemuri	A layout-aware analog synthesis procedure inclusive of dynamic module geometry selection.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	layout-aware, matrix-models, sizing
1	Trent McConaghy, Pieter Palmers, Georges G. E. Gielen, Michiel Steyaert	Automated extraction of expert knowledge in analog topology selection and sizing.	ICCAD	2008	DBLP DOI BibTeX RDF
1	Massoud Momeni, Petru Bogdan Bacinschi, Manfred Glesner	Comparison of Opamp-Based and Comparator-Based Delta-Sigma Modulation.	DATE	2008	DBLP DOI BibTeX RDF
1	Juraj Brenkus, Viera Stopjaková, Jozef Mihálov	Experimental Analog Circuit for Parametric Test Methods Efficiency Evaluation.	DDECS	2008	DBLP DOI BibTeX RDF
1	Angan Das, Ranga Vemuri	ATLAS: An adaptively formed hierarchical cell library based analog synthesis framework.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Amal Kumar Kundu, I. Kharagpur, Tathagato Rai Dastidar, Tarun Kanti Bhattacharyya, Partha Ray	A methodology for efficient design of analog circuits using an automated simulation based synthesis tool.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Edward K. F. Lee, Anthony Lam, Taihu Li	A 0.65V rail-to-rail constant gm opamp for biomedical applications.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Likun Xia, Ian M. Bell, Antony J. Wilkinson	A novel approach for automated model generation.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Blaise Mouttet	Proposal for Memristors in Signal Processing.	NanoNet	2008	DBLP DOI BibTeX RDF
1	Eduardo Romero, Gabriela Peretti, Carlos A. Marqués	An operational amplifier model for evaluating test strategies at behavioural level.	Microelectronics Journal	2007	DBLP DOI BibTeX RDF
1	Manish Kumar, M. C. Srivastava, Umesh Kumar	Lowpass - Highpass and Highpass - Bandpass Transadmittance Filter Using Operational Amplifier.	HPCNCS	2007	DBLP BibTeX RDF
1	David Kubanek, Kamil Vrba	Second-Order Multifunction Filters with Current Operational Amplifiers.	PWC	2007	DBLP DOI BibTeX RDF	current operational amplifier, current mode, active filter
1	Peter Tawdross, Andreas König	Mixtrinsic Multi-Objective Reconfiguration of Evolvable Sensor Electronics.	AHS	2007	DBLP DOI BibTeX RDF
1	Xuexin Liu, Wai-Shing Luk, Yu Song, Pushan Tang, Xuan Zeng	Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic.	ASP-DAC	2007	DBLP DOI BibTeX RDF
1	Trent McConaghy, Pieter Palmers, Georges G. E. Gielen, Michiel Steyaert	Simultaneous Multi-Topology Multi-Objective Sizing Across Thousands of Analog Circuit Topologies.	DAC	2007	DBLP DOI BibTeX RDF
1	Hayg Dabag, Dongwon Seo, Manu Mishra, Josef Hausner	Electrical Stress-free High Gain and High Swing Analog Buffer Using an Adaptive Biasing Scheme.	ISCAS	2007	DBLP DOI BibTeX RDF
1	H. Gaunholt	A numerical design approach for single amplifier, Active-RC Butterworth filter of order 5.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Jere A. M. Järvinen, Mikko Saukoski, Kari Halonen	A 12-bit Ratio-Independent Algorithmic ADC for a Capacitive Sensor Interface.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Mikko Loikkanen, Juha Kostamovaara	A Capacitor-Free CMOS Low-Dropout Regulator.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Rahul Singh, Yves Audet, Yves Gagnon, Yvon Savaria	Integrated Circuit Trimming Technique for Offset Reduction in a Precision CMOS Amplifier.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Senthil Kumar Lakshmanan, Peter Tawdross, Andreas König	Towards Generic On-the-Fly Reconfigurable Sensor Electronics for Embedded System- First Measurement Results of Reconfigurable Folded.	VLSI Design	2007	DBLP DOI BibTeX RDF
1	Almitra Pradhan, Ranga Vemuri	Regression based circuit matrix models for accurate performance estimation of analog circuits.	VLSI-SoC	2007	DBLP DOI BibTeX RDF
1	Jiri Stehlik, Daniel Becvar	Field Programmable Mixed-Signal Arrays (FPMA) Using Versatile Current/Voltage Conveyor Structures.	PWC	2007	DBLP DOI BibTeX RDF	Field Programmable Mixed-Signals Array, Programmable Universal Current Conveyor, Field Programmable Analog Array
1	Ahcène Bounceur, Salvador Mir, Emmanuel Simeu, Luís Rolíndez	Estimation of Test Metrics for the Optimisation of Analogue Circuit Testing.	J. Electronic Testing	2007	DBLP DOI BibTeX RDF	Analogue fault simulation, Catastrophic and parametric faults, Process deviations, Analogue test, Statistical modeling
1	Recai Kiliç, Fatma Yildirim	Current-Feedback Operational amplifier-Based inductorless Mixed-Mode Chua's Circuits.	I. J. Bifurcation and Chaos	2006	DBLP DOI BibTeX RDF
1	Byungsub Kim, Soumyajit Mandal, Rahul Sarpeshkar	Power-adaptive operational amplifier with positive-feedback self biasing.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Alessandro Girardi, Sergio Bampi	Power constrained design optimization of analog circuits based on physical gm/ID characteristics.	SBCCI	2006	DBLP DOI BibTeX RDF	simulated annealing, synthesis, analog design
1	Franz Schlögl, Horst Dietrich, Horst Zimmermann	Differential OPAMP with Inherent Common-Mode Control and Self-Biased Cascodes in 120nm CMOS.	APCCAS	2006	DBLP DOI BibTeX RDF
1	Lukas Fujcik, Jiri Haze, Radimir Vrba, Thibault Mougel	Modeling and design of novel architecture of multibit switched-capacitor sigma-delta converter with two-step quantization process.	ICN/ICONS/MCL	2006	DBLP DOI BibTeX RDF
1	Oktay Altun, Mark F. Bocko	Robust analog circuit design: a set theoretic approach.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Alessandro Girardi, Fernando da Rocha Paixão Cortes, Sergio Bampi	A tool for automatic design of analog circuits based on gm/ID methodology.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Edward K. Lee, Eusebiu Matei, Ravi S. Ananth	A 0.9 V rail-to-rail constant gm amplifier for implantable biomedical applications.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Jin-Fu Lin, Soon-Jyh Chang	A high speed pipelined analog-to-digital converter using modified time-shifted correlated double sampling technique.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Daniel Mueller, Guido Stehr, Helmut E. Graeb, Ulf Schlichtmann	Fast evaluation of analog circuit structures by polytopal approximations.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Tae-Hwan Oh, Sang-Min Yoo, Kyoung-Ho Moon, Jae-Whui Kim	A 3.0 V 72mW 10b 100 MSample/s Nyquist-rate CMOS pipelined ADC in 0.54 mm2.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Pere Palà-Schönwälder, Jordi Bonet-Dalmau, F. Xavier Moncunill-Geniz, Francisco del Águìla López, M. Rosa Giralt-Mas	Exploiting circuit instability to achieve wideband linear amplification.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Mohammad Ranjbar, G. R. Lahiji, Omid Oliaei	A low power third order delta-sigma modulator for digital audio applications.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Ying Wei, Alex Doboli	Library of structural analog cell macromodels for design of continuous-time reconfigurable Delta Sigma modulators.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Hashem Zare-Hoseini, Omid Shoaei, Izzet Kale	A new structure for capacitor-mismatch-insensitive multiply-by-two amplification.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Mile K. Stojcev	Vadim Ivanov, Igor Filanovsky, Operational Amplifier Speed and Accuracy Improvement: Analog Circuit Design with Structural Methodology, Kluwer Academic Publishers, Boston, 2004, Hardcover, pp 194, plus XIV, ISBN 1-4020-7772-6.	Microelectronics Reliability	2005	DBLP DOI BibTeX RDF
1	Paul L. Jespers	A design methodology for analogue CMOS circuits.	SBCCI	2005	DBLP DOI BibTeX RDF
1	Sounil Biswas, Peng Li, R. D. (Shawn) Blanton, Larry T. Pileggi	Specification Test Compaction for Analog Circuits and MEMS.	DATE	2005	DBLP DOI BibTeX RDF