Search results for "output ports"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	De-ren Zheng, Binqiang Wang, Peng Yi, Hui Li	Scheduling Cells with Multiple Output Ports for Input-Queued Switches.	ICSAP	2009	DBLP DOI BibTeX RDF	multiple output ports, scheduling, matching algorithm
2	Amr Elsaadany, Mukesh Singhal, Ming T. Liu	Performance study of buffering within switches in local area networks.	ICCCN	1995	DBLP DOI BibTeX RDF	switch performance, network transfer rates, output ports, input ports, LAN performance, multimedia, delay, throughput, local area networks, local area networks, buffering, queueing model, buffer size, performance study, output buffer, packet loss rate
2	Waleed A. Muhanna	Composite Programs: Hierarchical Construction, Circularity, and Deadlocks.	IEEE Trans. Software Eng.	1991	DBLP DOI BibTeX RDF	hierarchical construction, nonprocedural development environment, composite programs, input ports, output ports, coupling graph, cycle enumeration, atomic programs, deadly cycles, graph theory, graph theory, concurrency control, interfaces, programming environments, decomposition, programming theory, necessary and sufficient conditions, circularity, communication behavior, cyclic, communication deadlocks
1	Cheng-Wu Lin, Jai-Ming Lin, Chun-Po Huang, Soon-Jyh Chang	Performance-driven analog placement considering boundary constraint.	DAC	2010	DBLP DOI BibTeX RDF	analog placement, boundary constraint, symmetry
1	Tao Li, Zhigang Sun, Wu Jigang, Xicheng Lu	Fast enumeration of maximal valid subgraphs for custom-instruction identification.	CASES	2009	DBLP DOI BibTeX RDF	ISE identification, custom processors, maximal subgraph
1	Thomas Moscibroda, Onur Mutlu	A case for bufferless routing in on-chip networks.	ISCA	2009	DBLP DOI BibTeX RDF	routing, multi-core, memory systems, on-chip networks
1	Yelena Rykalova, Lev B. Levitin, Richard Brower	Multiprocessor networks with small buffers: theory and simulation.	SpringSim	2009	DBLP DOI BibTeX RDF	critical phenomena in networks, network saturation, latency, queueing networks, supercomputers, network performance
1	Jiazheng Zhou, Shen-En Liu, Yeh-Ching Chung	Hardware Supported Multicast in 2-D Mesh InfiniBand Networks.	CSE	2009	DBLP DOI BibTeX RDF
1	Ahmad Sinjari, Sazzadur Chowdhury	A Single-Pole-Triple-Throw (SP3T) MEMS RF switch for 24 GHz short range radar.	EIT	2009	DBLP DOI BibTeX RDF
1	Deng Pan, Yuanyuan Yang	Localized Independent Packet Scheduling for Buffered Crossbar Switches.	IEEE Trans. Computers	2009	DBLP DOI BibTeX RDF
1	Zuochang Ye, Dmitry Vasilyev, Zhenhai Zhu, Joel R. Phillips	Sparse implicit projection (SIP) for reduction of general many-terminal networks.	ICCAD	2008	DBLP DOI BibTeX RDF
1	Saad Mneimneh	Matching from the first iteration: an iterative switching algorithm for an input queued switch.	IEEE/ACM Trans. Netw.	2008	DBLP DOI BibTeX RDF	iterative switching algorithms, number of iterations, speedup, matching algorithms, input queued switch
1	Pejman Lotfi-Kamran, Masoud Daneshtalab, Caro Lucas, Zainalabedin Navabi	BARP-A Dynamic Routing Protocol for Balanced Distribution of Traffic in NoCs.	DATE	2008	DBLP DOI BibTeX RDF
1	Hong Cheng, Yaohui Jin, Yu Gao, Ying Di Yu, Weisheng Hu, Nirwan Ansari	Per-Flow Re-Sequencing in Load-Balanced Switches by Using Dynamic Mailbox Sharing.	ICC	2008	DBLP DOI BibTeX RDF
1	M. Y. Wang	Compliant Mechanisms for MEMS and Flexonics.	RAM	2008	DBLP DOI BibTeX RDF
1	Madhusudan Hosaagrahara, Harish Sethu	Max-Min Fair Scheduling in Input-Queued Switches.	IEEE Trans. Parallel Distrib. Syst.	2008	DBLP DOI BibTeX RDF	quality-of-service, fairness, Routers, input-queued switches
1	Sutthisak Inthawadee, Dobri Atanassov Batovski	Flow control in distributed gateways.	Annales des Télécommunications	2008	DBLP DOI BibTeX RDF	Networks, Flow control, Poisson processes
1	Grigoris Dimitroulakos, Michalis D. Galanis, Nikos Kostaras, Costas E. Goutis	A unified evaluation framework for coarse grained reconfigurable array architectures.	Conf. Computing Frontiers	2007	DBLP DOI BibTeX RDF	coarse-grained reconfigurable arrays, reconfigurable romputing, Modulo scheduling, architectural exploration
1	Grigoris Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis	Compiler assisted architectural exploration for coarse grained reconfigurable arrays.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	coarse-grained reconfigurable arrays, reconfigurable computing, modulo scheduling, architectural exploration
1	Koji Kobayashi, Shuichi Miyazaki, Yasuo Okabe	A tight bound on online buffer management for two-port shared-memory switches.	SPAA	2007	DBLP DOI BibTeX RDF	shared memory switches, competitive analysis, buffer management
1	Yelena Rykalova, Lev B. Levitin, Richard Brower	Performance model of a multiprocessor interconnection network: theory and simulation.	SpringSim	2007	DBLP DOI BibTeX RDF	critical phenomena in networks, network saturation, latency, queueing networks, supercomputers, network performance
1	Shengming Jiang	An addressing independent networking structure favorable for all-optical packet switching.	Computer Communication Review	2007	DBLP DOI BibTeX RDF	addressing transparency, all-optical packet switching (AOPS), hierarchical source routing, networking structure
1	Waleed Al-Assadi, Sindhu Kakarla	Testing of Asynchronous NULL Conventional Logic (NCL) Circuits in Synchronous-Based Design.	DFT	2007	DBLP DOI BibTeX RDF
1	Gaspar Mora, Pedro Javier García, Jose Flich, José Duato	RECN-IQ: A Cost-Effective Input-Queued Switch Architecture with Congestion Management.	ICPP	2007	DBLP DOI BibTeX RDF
1	Daeho Seo, Mithuna Thottethodi	Table-lookup based Crossbar Arbitration for Minimal-Routed, 2D Mesh and Torus Networks.	IPDPS	2007	DBLP DOI BibTeX RDF
1	Jose Flich, Andres Mejia, Pedro López, José Duato	Region-Based Routing: An Efficient Routing Mechanism to Tackle Unreliable Hardware in Network on Chips.	NOCS	2007	DBLP DOI BibTeX RDF
1	Yi Li, Gaoxi Xiao, Hooshang Ghafouri-Shiraz	On Traffic Allocations in Optical Packet Switches.	IEEE Journal on Selected Areas in Communications	2007	DBLP DOI BibTeX RDF
1	Alexander Kesselman, Kirill Kogan	Nonpreemptive Scheduling of Optical Switches.	IEEE Transactions on Communications	2007	DBLP DOI BibTeX RDF
1	Loganathan Lingappan, Niraj K. Jha	Satisfiability-Based Automatic Test Program Generation and Design for Testability for Microprocessors.	IEEE Trans. VLSI Syst.	2007	DBLP DOI BibTeX RDF
1	Andreas Kimsas, Steinar Bjornstad, Harald Øverby, Norvald Stol	Reservation Techniques in an OpMiGua Node.	ONDM	2007	DBLP DOI BibTeX RDF	OpMiGua, hybrid, packet loss, preemption, time-window
1	Jordi Perelló, Eduard Escalona, Salvatore Spadaro, Jaume Comellas, Gabriel Junyent	Transport Plane Resource Discovery Mechanisms for ASON/GMPLS Meshed Transport Networks.	ONDM	2007	DBLP DOI BibTeX RDF	LMP, Automatic Resource Discovery, GMPLS
1	Madhusudan Hosaagrahara, Harish Sethu	Degree-sequenced matching algorithms for input-queued switches.	Telecommunication Systems	2007	DBLP DOI BibTeX RDF	Scheduling and matching algorithms, Input-queued switches
1	Jiazheng Zhou, Xuan-Yi Lin, Yeh-Ching Chung	Hardware supported multicast in fat-tree-based InfiniBand networks.	The Journal of Supercomputing	2007	DBLP DOI BibTeX RDF	Union operation, OpenSM, Multicast, InfiniBand, Unicast, Fat-tree, Cyclic
1	Yiyu Shi, Paul Mesa, Hao Yu, Lei He	Circuit simulation based obstacle-aware Steiner routing.	DAC	2006	DBLP DOI BibTeX RDF	OARSMT, RSMT, simulation, routing
1	Heiner Giefers, Achim Rettberg	Energy aware multiple clock domain scheduling for a bit-serial, self-timed architecture.	SBCCI	2006	DBLP DOI BibTeX RDF	high-level synthesis, low power design, voltage scaling, bit-serial architecture
1	Yossi Azar, Yossi Richter	An improved algorithm for CIOQ switches.	ACM Transactions on Algorithms	2006	DBLP DOI BibTeX RDF	CIOQ, competitive, switch, Qos, on-line
1	Minjun Wang, Geoffrey Fox, Marlon E. Pierce	Thin Client Collaboration Web Services.	AICT/ICIW	2006	DBLP DOI BibTeX RDF
1	Jason D. Bakos, Charles L. Cathey, Allen Michalski	Predictive Load Balancing for Interconnected FPGAs.	FPL	2006	DBLP DOI BibTeX RDF
1	Hongyun Zheng, Yongxiang Zhao, Changjia Chen	Design and Implementation of Switches in Network Simulator (ns2).	ICICIC	2006	DBLP DOI BibTeX RDF
1	Oladayo Salami, H. Anthony Chan	The pursuit of efficient IP resource management has been.	ICN/ICONS/MCL	2006	DBLP DOI BibTeX RDF
1	Francisco Gilabert Villamón, María Engracia Gómez, Pedro López, José Duato	On the Influence of the Selection Function on the Performance of Fat-Trees.	Euro-Par	2006	DBLP DOI BibTeX RDF	selection function, interconnection networks, adaptive routing, fat-tree
1	Yossi Azar, Yoel Chaiutin	Optimal Node Routing.	STACS	2006	DBLP DOI BibTeX RDF
1	Yashar Ganjali, Abtin Keshavarzian, Devavrat Shah	Cell switching versus packet switching in input-queued switches.	IEEE/ACM Trans. Netw.	2005	DBLP DOI BibTeX RDF	cell switching, variable length packets, scheduling, packet switching
1	Rostislav (Reuven) Dobkin, Victoria Vishnyakov, Eyal Friedman, Ran Ginosar	An Asynchronous Router for Multiple Service Levels Networks on Chip.	ASYNC	2005	DBLP DOI BibTeX RDF
1	Sailesh Kumar, Jonathan S. Turner, Patrick Crowley	Addressing Queuing Bottlenecks at High Speeds.	Hot Interconnects	2005	DBLP DOI BibTeX RDF
1	Teresa Nachiondo Frinós, Jose Flich, José Duato	Efficient Reduction of HOL Blocking in Multistage Networks.	IPDPS	2005	DBLP DOI BibTeX RDF
1	Ching-Te Chiu, Chun-Chieh Chang, Shih-Min Chen, Hou-Cheng Tzeng, Ming-Chang Du, Yu-Ho Hsu, Jen-Ming Wu, Kai-Ming Feng	A 20 Gbps Scalable Load-Balanced TDM Switch with CODEC for High Speed Networking Applications.	IWSOC	2005	DBLP DOI BibTeX RDF
1	Ayman G. Fayoumi, Fahad A. Al-Zahrani, Abdulgader A. Habiballa, Anura P. Jayasumana	Performance Analysis of Multi-Fiber Synchronous Photonic Share-per-link Packet Switches.	LCN	2005	DBLP DOI BibTeX RDF
1	Jiazheng Zhou, Xuan-Yi Lin, Chun-Hsien Wu, Yeh-Ching Chung	Multicast in Fat-Tree-Based InfiniBand Networks.	NCA	2005	DBLP DOI BibTeX RDF
1	Ximin Zhang, Junding Sun, Lihua Zhou	Development of an Internet Home Automation System using Java and Dynamic DNS Service.	PDCAT	2005	DBLP DOI BibTeX RDF
1	Deng Pan, Yuanyuan Yang	FIFO-Based Multicast Scheduling Algorithm for Virtual Output Queued Packet Switches.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	virtual output queued (VOQ) switch, head of line (HOL) blocking, scheduling, Multicast, crossbar switch, multicast switch
1	Ding-Jyh Tsaur, Chi-Feng Tang, Chin-Chi Wu, Woei Lin	A Threshold-Based Matching Algorithm for Photonic Clos Network Switches.	HPCC	2005	DBLP DOI BibTeX RDF	MAC, Packet Scheduling, Clos network, optical packet switching, Photonic switch
1	Sung-Kwan Youm, Seung-Joon Seok, Seung-Jin Lee, Chul-Hee Kang	Input Register Architectures of High Speed Router for Supporting the PHB of Differentiated Services.	QoS-IP	2005	DBLP DOI BibTeX RDF
1	Luis Miguel Silveira, Joel R. Phillips	Exploiting input information in a model reduction algorithm for massively coupled parasitic networks.	DAC	2004	DBLP DOI BibTeX RDF	interconnect, model order reduction, parasitic
1	Dan Guez, Alexander Kesselman, Adi Rosén	Packet-mode policies for input-queued switches.	SPAA	2004	DBLP DOI BibTeX RDF	packet-mode scheduling, competitive analysis, input-queued switches
1	Rostislav (Reuven) Dobkin, Ran Ginosar, Christos P. Sotiriou	Data Synchronization Issues in GALS SoCs.	ASYNC	2004	DBLP DOI BibTeX RDF
1	Makoto Sugihara, Kazuaki Murakami, Yusuke Matsunaga	Practical Test Architecture Optimization for System-on-a-Chip under Floorplanning Constraints.	ISVLSI	2004	DBLP DOI BibTeX RDF
1	Saad Mneimneh	An Iterative Switching Algorithm With (Possibly) One Iteration.	NCA	2004	DBLP DOI BibTeX RDF	number of iterations, matching, Switching, speedup
1	Nian-Feng Tzeng	Multistage-Based Switching Fabrics for Scalable Routers.	IEEE Trans. Parallel Distrib. Syst.	2004	DBLP DOI BibTeX RDF	Line cards, multistage interconnects, queue speedups, recirculation connections, routing tags, scalability, routers, switching fabrics
1	Yossi Azar, Yossi Richter	An Improved Algorithm for CIOQ Switches.	ESA	2004	DBLP DOI BibTeX RDF
1	Frederick C. Furtek, Eugene Hogenauer, James Scheuermann	Interconnecting Heterogeneous Nodes in an Adaptive Computing Machine.	FPL	2004	DBLP DOI BibTeX RDF
1	Thomas Fahringer, Sabri Pllana, Alex Villazón	A-GWL: Abstract Grid Workflow Language.	International Conference on Computational Science	2004	DBLP DOI BibTeX RDF
1	Anna Baranowska, Wojciech Kabacinski	The New Packet Scheduling Algorithms for VOQ Switches.	ICT	2004	DBLP DOI BibTeX RDF
1	Emilio Leonardi, Marco Mellia, Fabio Neri, Marco Ajmone Marsan	Bounds on delays and queue lengths in input-queued cell switches.	J. ACM	2003	DBLP DOI BibTeX RDF	scheduling, Performance evaluation, delay bounds, input queued switches
1	Hakyong Kim, Kiseon Kim	Performance analysis of the multiple input-queued packet switch with the restricted rule.	IEEE/ACM Trans. Netw.	2003	DBLP DOI BibTeX RDF	Multiple input queueing (MIQ), free rule, restricted rule
1	Saad Mneimneh, Kai-Yeung Siu	On achieving throughput in an input-queued switch.	IEEE/ACM Trans. Netw.	2003	DBLP DOI BibTeX RDF	priority switching algorithms, lower bounds, throughput, speedup
1	Gagan Aggarwal, Rajeev Motwani, Devavrat Shah, An Zhu	Switch Scheduling via Randomized Edge Coloring.	FOCS	2003	DBLP DOI BibTeX RDF
1	Francisco José Alfaro, José L. Sánchez, José Duato	A New Proposal to Fill in the InfiniBand Arbitration Tables.	ICPP	2003	DBLP DOI BibTeX RDF
1	César Caballero Gaudes, Mikko Valkama, Markku Renfors	A novel frequency synthesizer concept for wireless communications.	ISCAS	2003	DBLP DOI BibTeX RDF
1	Ali Mohammad Zareh Bidoki, Nasser Yazdani, Sayed Vahid Azhari, Siavash Samadian-Barzoki	A High Speed ATM/IP Switch Fabric Using Distributed Scheduler.	ICOIN	2003	DBLP DOI BibTeX RDF
1	Ahmad Rostami, Seyed Mostafa Safavi	Performance Analysis of a VC Merger Capable of Supporting Differentiated Services in an MPLS over ATM Switch.	ICOIN	2003	DBLP DOI BibTeX RDF
1	Oleg Gusak, Neal Oliver, Khosrow Sohraby	Performance Analysis of Packet Schedulers in High-Speed Serial Switches.	ISCIS	2003	DBLP DOI BibTeX RDF
1	Evgueni Ossipov, Gunnar Karlsson	The Effect of Per-input Shapers on the Delay Bound in Networks with Aggregate Scheduling.	MIPS	2003	DBLP DOI BibTeX RDF
1	Stavros Tripakis	Automated Module Composition.	TACAS	2003	DBLP DOI BibTeX RDF
1	Shubhendu S. Mukherjee, Federico Silla, Peter J. Bannon, Joel S. Emer, Steven Lang, David Webb	A comparative study of arbitration algorithms for the Alpha 21364 pipelined router.	ASPLOS	2002	DBLP DOI BibTeX RDF
1	Vugranam C. Sreedhar	Mixin Up components.	ICSE	2002	DBLP DOI BibTeX RDF
1	Gilbert Chen, Boleslaw K. Szymanski	Reusing simulation components: cost: a component-oriented discrete event simulator.	Winter Simulation Conference	2002	DBLP DOI BibTeX RDF
1	Marco Ajmone Marsan, Andrea Bianco, Paolo Giaccone, Emilio Leonardi, Fabio Neri	Packet-mode scheduling in input-queued cell-based switches.	IEEE/ACM Trans. Netw.	2002	DBLP DOI BibTeX RDF	variable size packets, packet switching, scheduling algorithms, input queued switched
1	Igor S. Stievano, Flavio G. Canavero, Ivan A. Maio, Z. Chen, Wiren D. Becker, George A. Katopis	Macromodeling of Digital I/O Ports for System EMC Assessment .	DATE	2002	DBLP DOI BibTeX RDF
1	Shashank Gupta, Adnan Aziz	Multicast Scheduling for Switches with Multiple Input-Queues.	Hot Interconnects	2002	DBLP DOI BibTeX RDF
1	Nian-Feng Tzeng, Ravi C. Batchu	Design and Evaluation of Scalable Switching Fabrics for High-Performance Routers. (PDF / PS)	ICPP	2002	DBLP DOI BibTeX RDF
1	Nils Gura, Hans Eberle	The Least Choice First Scheduling Method for High-Speed Network Switche. (PDF / PS)	IPDPS	2002	DBLP DOI BibTeX RDF
1	Tomoyuki Nagase, Takashi Araki, Yoshio Yoshioka, Tadao Nakamura	Moderating traffic flow over conventional ATM service.	ISCC	2002	DBLP DOI BibTeX RDF
1	Tsern-Huei Lee, Ying-Che Kuo	Performance Evaluation of Combined Input Output Queued Switch with Finite Input and Output Buffers.	ICOIN	2002	DBLP DOI BibTeX RDF
1	Cheng-Shang Chang, Duan-Shin Lee, Ching-Ming Lien	Load balanced Birkhoff-von Neumann switches with resequencing.	SIGMETRICS Performance Evaluation Review	2001	DBLP DOI BibTeX RDF
1	Byeong Min, Gwan Choi	ECC: Extended Condition Coverage for Design Verification Using Excitation and Observation.	PRDC	2001	DBLP DOI BibTeX RDF
1	Sitaram Yadavalli, Sandip Kundu	On Fault-Simulation Through Embedded Memories On Large Industrial Designs.	VLSI Design	2001	DBLP DOI BibTeX RDF
1	Emad Rashid, Takashi Araki, Tadao Nakamura	An Active Network for Improving Performance of Traffic Flow over Conventional ATM Service.	ICN	2001	DBLP DOI BibTeX RDF
1	Sung-Whan Moon, Jennifer Rexford, Kang G. Shin	Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	VLSI, packet switch, Priority queue, real-time communications, link scheduling
1	Miltos D. Grammatikakis, Stefan Liesche	Priority Queues and Sorting Methods for Parallel Simulation.	IEEE Trans. Software Eng.	2000	DBLP DOI BibTeX RDF	memory lock, parallel simulation, priority queue, data race, distributed data structure, Concurrent data structure, virtual shared memory, Cray-T3E
1	Luca de Alfaro, Thomas A. Henzinger, Freddy Y. C. Mang	The Control of Synchronous Systems.	CONCUR	2000	DBLP DOI BibTeX RDF
1	James F. Peters, Andrzej Skowron, Zbigniew Suraj, Liting Han, Sheela Ramanna	Design of Rough Neurons: Rough Set Foundation and Petri Net Model.	ISMIS	2000	DBLP BibTeX RDF
1	Thai Thach Bao, Hiroaki Morino, Hitoshi Aida, Tadao Saito	Distributed Input and Deflection Routing Based Packet Switch Using Shuffle Pattern Network.	NETWORKING	2000	DBLP DOI BibTeX RDF
1	Che-Li Lin, Jingshown Wu	Large Capacity ATM Switching Fabric Using Three Dimensional Optical CDMA Technology.	ISCC	1999	DBLP DOI BibTeX RDF	Fiber-optic, ATM, CDMA, Switch
1	Mehrdad Nourani, Christos A. Papachristou	Structural Fault Testing of Embedded Cores Using Pipelining.	J. Electronic Testing	1999	DBLP DOI BibTeX RDF	bypass mode, pipelined test schedule, shortest path, structural testing, at-speed testing
1	Wladek Olesinski, Pawel Gburzynski	Multicast in Deflection Networks. (PDF / PS)	MASCOTS	1998	DBLP DOI BibTeX RDF
1	Rajeev Sivaram, Dhabaleswar K. Panda, Craig B. Stunkel	Efficient Broadcast and Multicast on Multistage Interconnection Networks Using Multiport Encoding.	IEEE Trans. Parallel Distrib. Syst.	1998	DBLP DOI BibTeX RDF	multicast, broadcast, wormhole routing, multistage interconnection networks, collective communication, interprocessor communication, Parallel computer architecture, virtual cut-through
1	Mike Parks	A Modular Element for Shared Buffer ATM Switch Fabrics.	ASAP	1997	DBLP DOI BibTeX RDF
1	Abhaya Asthana, James Sienicki, Mani B. Srivastava	Kaleido: An Environment for Composing Networked Multimedia Applications. (PDF / PS)	HPDC	1997	DBLP DOI BibTeX RDF
1	Jennifer Rexford, John Hall, Kang G. Shin	A Router Architecture for Real-Time Point-to-Point Networks.	ISCA	1996	DBLP DOI BibTeX RDF