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Results
Found 19 publication records. Showing 19 according to the selection in the facets
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Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 2 | Jian He, Layne T. Watson, Masha Sosonkina |
Algorithm 897: VTDIRECT95: Serial and parallel codes for the global optimization algorithm direct.  |
ACM Trans. Math. Softw.  |
2009 |
DBLP DOI BibTeX RDF |
parallel schemes, data structures, global optimization, checkpointing, DIRECT |
| 1 | Jan Wassenberg, Wolfgang Middelmann, Peter Sanders |
An Efficient Parallel Algorithm for Graph-Based Image Segmentation.  |
CAIP  |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Andreas Uhl, Peter Wild |
Parallel versus Serial Classifier Combination for Multibiometric Hand-Based Identification.  |
ICB  |
2009 |
DBLP DOI BibTeX RDF |
serial combination, hand biometrics, Multibiometrics |
| 1 | Rudy R. Negenborn, Bart De Schutter, J. Hellendoorn |
Multi-agent model predictive control for transportation networks: Serial versus parallel schemes.  |
Eng. Appl. of AI  |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Sayaka Akioka, Feihui Li, Konrad Malkowski, Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin |
Ring data location prediction scheme for Non-Uniform Cache Architectures.  |
ICCD  |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | David A. Bader, Kamesh Madduri |
SNAP, Small-world Network Analysis and Partitioning: An open-source parallel graph framework for the exploration of large-scale networks.  |
IPDPS  |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Fan-Min Li, Cheng-Hung Lin, An-Yeu Wu |
Unified Convolutional/Turbo Decoder Design Using Tile-Based Timing Analysis of VA/MAP Kernel.  |
IEEE Trans. VLSI Syst.  |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Celso Y. Ishida, Andre B. de Carvalho, Aurora Trinidad Ramirez Pozo, Elizabeth Ferreira Gouvea Goldbarg, Marco César Goldbarg |
Exploring Multi-objective PSO and GRASP-PR for Rule Induction.  |
EvoCOP  |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Francisco Almeida, Juan A. Gómez, José M. Badía |
Performance analysis for clusters of symmetric multiprocessors.  |
PDP  |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Tarik Saidani, Lionel Lacassagne, Samir Bouaziz, Taj Muhammad Khan |
Parallelization Strategies for the Points of Interests Algorithm on the Cell Processor.  |
ISPA  |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Simon Ogg, Bashir M. Al-Hashimi |
Improved Data Compression for Serial Interconnected Network on Chip through Unused Significant Bit Removal.  |
VLSI Design  |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Germán Bianchini, Ana Cortés, Tomàs Margalef, Emilio Luque |
Improved Prediction Methods for Wildfires Using High Performance Computing: A Comparison.  |
International Conference on Computational Science  |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Jesús Vigo-Aguiar, Srinivasan Natesan |
A Parallel Boundary Value Technique for Singularly Perturbed Two-Point Boundary Value Problems.  |
The Journal of Supercomputing  |
2004 |
DBLP DOI BibTeX RDF |
adapted multistep methods, singular perturbation problems (SPPs), exponential fitted schemes, parallel computing |
| 1 | Zygmunt A. Garczarczyk |
Parallel Schemes of Computation for Bernstein Coefficients and Their Application.  |
PARELEC  |
2002 |
DBLP DOI BibTeX RDF |
nonlinear algebraic equations, interval analysis techniques, range evaluations, Bernstein polynomials |
| 1 | Pieter W. Hemker, Grigorii I. Shishkin, Lidia P. Shishkina |
High-Order Time-Accurate Parallel Schemes for Parabolic Singularly Perturbed Problems with Convection.  |
Computing  |
2001 |
DBLP DOI BibTeX RDF |
AMS Subject Classifications: 65N22, 35K20, 35B25, 35A40, 65N55 |
| 1 | Wen-jann Yang, Ramalingam Sridhar, Victor Demjanenko |
Parallel Intersecting Compressed Bit Vectors in a High Speed Query Server for Processing Postal Addresses.  |
HPCA  |
1996 |
DBLP DOI BibTeX RDF |
List intersection hardware, Parallel architecture, Compression, Inverted file |
| 1 | Soo-Young Lee, Kyung-Geun Lee |
Synchronous and Asynchronous Parallel Simulated Annealing with Multiple Markov Chains.  |
IEEE Trans. Parallel Distrib. Syst.  |
1996 |
DBLP DOI BibTeX RDF |
multiple Markov chains, parallel algorithm, simulated annealing, graph partitioning, Asynchronous communication, speed-up, solution quality |
| 1 | André Seznec, Jacques Lenfant |
Interleaved Parallel Schemes.  |
IEEE Trans. Parallel Distrib. Syst.  |
1994 |
DBLP DOI BibTeX RDF |
interleaved parallelschemes, vector supercomputers, vector register processors, global highly interleavedmemory, memory throughput, synchronization mode, interconnection network, parallel machines, synchronisation, vector processor systems |
| 1 | André Seznec, Jacques Lenfant |
Interleaved Parallel Schemes: Improving Memory Throughput on Supercomputers.  |
ISCA  |
1992 |
DBLP DOI BibTeX RDF |
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