Search results for "performance monitoring unit"

Found 12 publication records. Showing 12 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Dohun Kim, Jugwan Eom, Chanik Park	L4oprof: a performance-monitoring-unit-based software-profiling framework for the L4 microkernel.	Operating Systems Review	2007	DBLP DOI BibTeX RDF
1	Younghyun Kim, Sangyoung Park, Youngjin Cho, Naehyuck Chang	System-Level Online Power Estimation Using an On-Chip Bus Performance Monitoring Unit.	IEEE Trans. on CAD of Integrated Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	David K. Tam, Reza Azimi, Livio Soares, Michael Stumm	RapidMRC: approximating L2 miss rate curves on commodity systems for online optimizations.	ASPLOS	2009	DBLP DOI BibTeX RDF	miss rate curve, performance monitoring unit, shared cache management, chip multiprocessor, dynamic optimization, multicore processor, shared cache, cache management, cache partitioning, hardware performance counters, online optimization
1	Youngjin Cho, Younghyun Kim, Sangyoung Park, Naehyuck Chang	System-level power estimation using an on-chip bus performance monitoring unit.	ICCAD	2008	DBLP DOI BibTeX RDF
1	Wen-Yew Liang, Shih-Chang Chen, Yang-Lang Chang, Jyh-Perng Fang	Memory-Aware Dynamic Voltage and Frequency Prediction for Portable Devices.	RTCSA	2008	DBLP DOI BibTeX RDF
1	Karl Fürlinger, Daniel Terpstra, Haihang You, Philip Mucci, Shirley Moore	Enabling Data Structure Oriented Performance Analysis with Hardware Performance Counter Support.	Euro-Par Workshops	2008	DBLP DOI BibTeX RDF
1	David K. Tam, Reza Azimi, Michael Stumm	Thread clustering: sharing-aware scheduling on SMP-CMP-SMT multiprocessors.	EuroSys	2007	DBLP DOI BibTeX RDF	cache behavior, detecting sharing, performance monitoring unit, single-chip multiprocessors, thread placement, resource allocation, CMP, multithreading, sharing, SMP, simultaneous multithreading, SMT, shared caches, cache locality, thread scheduling, thread migration, hardware performance monitors, hardware performance counters, affinity scheduling
1	Hyun-min Kyung, Gi-Ho Park, Jong Wook Kwak, WooKyeong Jeong, Tae-Jin Kim, Sung-Bae Park	Performance monitor unit design for an AXI-based multi-core SoC platform.	SAC	2007	DBLP DOI BibTeX RDF	SOC platform, performance monitor, architecture exploration, AMBA, AXI
1	Jie Tao, Tobias Gaugler, Wolfgang Karl	A Profiling Tool for Detecting Cache-Critical Data Structures.	Euro-Par	2007	DBLP DOI BibTeX RDF
1	Gilberto Contreras, Margaret Martonosi	Power prediction for intel XScale processors using performance monitoring unit events.	ISLPED	2005	DBLP DOI BibTeX RDF	XScale, power estimation, power modeling, hardware performance counters
1	Kihwan Choi, Ramakrishna Soma, Massoud Pedram	Off-chip latency-driven dynamic voltage and frequency scaling for an MPEG decoding.	DAC	2004	DBLP DOI BibTeX RDF	MPEG decoding, voltage and frequency scaling, low power
1	Kihwan Choi, Ramakrishna Soma, Massoud Pedram	Dynamic voltage and frequency scaling based on workload decomposition.	ISLPED	2004	DBLP DOI BibTeX RDF	workload decomposition, dynamic voltage and frequency scaling