Search results for "performance penalty"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Paul Anderson	The Performance Penalty of XML for Program Intermediate Representations.	SCAM	2005	DBLP DOI BibTeX RDF
2	John M. Emmert, Charles E. Stroud, Jason A. Cheatham, Andrew M. Taylor, Pankaj Kataria, Miron Abramovici	Performance Penalty for Fault Tolerance in Roving STARs.	FPL	2000	DBLP DOI BibTeX RDF	Adaptive Computing System, Fault Tolerance, FPGA
2	Xunhua Wang, Yih Huang, Yvo Desmedt, David Rine	Enabling Secure On-Line DNS Dynamic Update.	ACSAC	2000	DBLP DOI BibTeX RDF	secure online DNS dynamic update, Internet Engineering Task Force, DNS Security Extension, zone security key, role separation principle, signature computation time, Internet, authentication, cryptography, distributed databases, RSA, transport protocols, experimental results, message authentication, threshold cryptography, telecommunication security, MD5, Domain Name System, IP addresses, performance penalty, DNSSEC
2	Kanad Ghose, Pavel Vasek	A Fast Capability Extension to a RISC Architecture.	EUROMICRO	1996	DBLP DOI BibTeX RDF	fast capability extension, RISC architecture, capability-based addressing, capability-based machines, simulated executions, security, information sharing, reduced instruction set computing, performance penalty
2	Kannan Krishna, Stephen W. Director	The linearized performance penalty (LPP) method for optimization of parametric yield and its reliability.	IEEE Trans. on CAD of Integrated Circuits and Systems	1995	DBLP DOI BibTeX RDF
2	Byoung-Joon Min, Sang-Seok Shin, Kee-Wook Rim	Design and analysis of a multiprocessor system with extended fault tolerance.	FTDCS	1995	DBLP DOI BibTeX RDF	extended fault tolerance, scalable multiprocessor system, tree-type interconnection networks, computational complexity, reliability, fault tolerant computing, multiprocessor interconnection networks, latency, multiprocessing systems, multiprocessor system, performance penalty, implementation complexity
2	Robert Haacke, B. Montgomery Pettitt	The scaling of molecular dynamics on the KSR1.	HICSS	1995	DBLP DOI BibTeX RDF	particle based simulation techniques, highly parallelizable, irreproducible trajectories, reproducible simulations, KSR1 parallel computer, parallel algorithms, concurrency, parallel machines, digital simulation, physics, molecular dynamics, physics computing, performance penalty, molecular dynamics method, ESP
2	Yu Fang, Alexander Albicki	Efficient testability enhancement for combinational circuit. (PDF / PS)	ICCD	1995	DBLP DOI BibTeX RDF	testability enhancement, combinational circuit testing, XOR Chain Structure, insertion points, random pattern resistant node source tracking, ISCAS85, performance evaluation, VLSI, VLSI, logic testing, controllability, built-in self test, combinational circuits, automatic testing, automatic testing, observability, testability analysis, benchmark circuits, hardware overhead, performance penalty
2	Bruce M. McMillin, Lionel M. Ni	Reliable Distributed Sorting Through the Application-Oriented Fault Tolerance Paradigm.	IEEE Trans. Parallel Distrib. Syst.	1992	DBLP DOI BibTeX RDF	reliable distributed sorting, noniterative convergence, application-oriented faulttolerance, fault-tolerant parallel sorting algorithm, processor/link failure, host sorting, bitonic sort/merge, parallel programming, fault tolerant computing, sorting, programming theory, parallelalgorithms, performance penalty, n-cube
2	Akhil Kumar, Michael Stonebraker	Performance Considerations for an Operating System Transaction Manager.	IEEE Trans. Software Eng.	1989	DBLP DOI BibTeX RDF	log compressing, considerations, operating system transaction manager, conventional transaction manager, OS transaction manager, lock acquisition, additional semantics, OS transaction system, modified index structure, update operations, DBMS performance, performance evaluation, performance, data structures, software reliability, database management system, database management systems, transaction processing, operating systems (computers), transaction management, performance penalty
1	Ozgur Sinanoglu	Eliminating Performance Penalty of Scan.	VLSI Design	2012	DBLP DOI BibTeX RDF
1	Luit J. Slooten, Fransisco Batle, Jesus Carrera	An experimental approach to the performance penalty of the use of classes in Fortran 95.	Advances in Engineering Software	2011	DBLP DOI BibTeX RDF
1	Boubacar Diouf, Albert Cohen, Fabrice Rastello, John Cavazos	Split Register Allocation: Linear Complexity Without the Performance Penalty.	HiPEAC	2010	DBLP DOI BibTeX RDF
1	Chengyu Song, Jianwei Zhuge, Xinhui Han, Zhiyuan Ye	Preventing drive-by download via inter-module communication monitoring.	ASIACCS	2010	DBLP DOI BibTeX RDF	inter-module communication, malicious script, intrusion detection, ActiveX, drive-by download
1	Demid Borodin, Ben H. H. Juurlink	Protective redundancy overhead reduction using instruction vulnerability factor.	Conf. Computing Frontiers	2010	DBLP DOI BibTeX RDF	instruction vulnerability, selective protection, performance, redundancy, fault detection
1	Tilo Müller, Andreas Dewald, Felix C. Freiling	AESSE: a cold-boot resistant implementation of AES.	EUROSEC	2010	DBLP DOI BibTeX RDF	cold boot attacks, streaming SIMD extensions, advanced encryption standard, Linux kernel
1	Amir Masoud Gharehbaghi, Bijan Alizadeh, Masahiro Fujita	Aggressive overclocking support using a novel timing error recovery technique on FPGAs (abstract only).	FPGA	2010	DBLP DOI BibTeX RDF	overclocking, timing error detection, timing error recovery, fpga
1	Ahmed M. Amin, Zeshan Chishti	Rank-aware cache replacement and write buffering to improve DRAM energy efficiency.	ISLPED	2010	DBLP DOI BibTeX RDF	DRAM energy efficiency, cache replacement, write buffer
1	Fabrizio Mulas, Andrea Acquaviva, Salvatore Carta, Gianni Fenu, Davide Quaglia, Franco Fummi	Network-adaptive management of computation energy in wireless sensor networks.	SAC	2010	DBLP DOI BibTeX RDF	wireless sensor networks, low-power
1	Sorin Faibish, Peter Bixby, John Forecast, Philippe Armangau, Sitaram Pawar	A new approach to file system cache writeback of application data.	SYSTOR	2010	DBLP DOI BibTeX RDF	cache writeback, dirty pages, rate flushing, watermark flushing, feedback loop, buffer cache
1	Markos Fountoulakis, Manolis Marazakis, Michail Flouris, Angelos Bilas	DARC: design and evaluation of an I/O controller for data protection.	SYSTOR	2010	DBLP DOI BibTeX RDF	block-level I/O, storage architecture, storage controllers, virtualization, error detection, versioning, data protection, I/O performance
1	Wen-Wen Hsieh, TingTing Hwang	Thermal-aware post compilation for VLIW architectures.	ASP-DAC	2009	DBLP DOI BibTeX RDF
1	Owen S. Hofmann, Christopher J. Rossbach, Emmett Witchel	Maximum benefit from a minimal HTM.	ASPLOS	2009	DBLP DOI BibTeX RDF	hardware transactional memory
1	Lars Bauer, Muhammad Shafique, Jörg Henkel	MinDeg: a performance-guided replacement policy for run-time reconfigurable accelerators.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	extensible embedded processor, reconfigurable computing, kernel, accelerator, replacement, run-time adaptation
1	Mohammad Ali Ghodrat, Tony Givargis	Efficient dynamic voltage/frequency scaling through algorithmic loop transformation.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	algorithmic loop transformation, compiler optimization for low power, dynamic voltage/frequency scaling
1	Rodrígo González-Alberquilla, Fernando Castro, Luis Piñuel, Francisco Tirado	Stack oriented data cache filtering.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	power-performance efficient design, memory hierarchy, cache memory
1	Talal Bonny, Jörg Henkel	LICT: left-uncompressed instructions compression technique to improve the decoding performance of VLIW processors.	DAC	2009	DBLP DOI BibTeX RDF	embedded systems, code compression, Huffman coding
1	Ramkumar Jayaseelan, Tulika Mitra	Dynamic thermal management via architectural adaptation.	DAC	2009	DBLP DOI BibTeX RDF	architecture adaptation, dynamic thermal management
1	Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Philip Brisk, Yusuf Leblebici, Paolo Ienne, Maurizio Skerlj	3D configuration caching for 2D FPGAs.	FPGA	2009	DBLP DOI BibTeX RDF	field programmable gate array (fpga), reconfigurable computing, 3d integration, configuration caching
1	Qiang Wang, Subodh Gupta, Jason Helge Anderson	Clock power reduction for virtex-5 FPGAs.	FPGA	2009	DBLP DOI BibTeX RDF	optimization, field-programmable gate arrays, fpgas, low-power design, power, clocking
1	Colin Blundell, Milo M. K. Martin, Thomas F. Wenisch	InvisiFence: performance-transparent memory ordering in conventional multiprocessors.	ISCA	2009	DBLP DOI BibTeX RDF	parallel programming, memory consistency
1	Stephen Roderick Hines, Yuval Peress, Peter Gavin, David B. Whalley, Gary S. Tyson	Guaranteeing instruction fetch behavior with a lookahead instruction fetch engine (LIFE).	LCTES	2009	DBLP DOI BibTeX RDF	l0/filter cache, lookahead instruction fetch engine (life), tagless hit instruction cache (th-ic)
1	Sunay Tripathi, Nicolas Droux, Thirumalai Srinivasan, Kais Belgaied	Crossbow: from hardware virtualized NICs to virtualized networks.	VISA	2009	DBLP DOI BibTeX RDF	VNICs, crossbow, vWire, performance, classification, networking, virtualization, hypervisor, zones, VMs, VLAN
1	Mu-Kai Huang, J. Morris Chang, Wei-Mei Chen	Grouping-Based Dynamic Power Management for Multi-threaded Programs in Chip-Multiprocessors.	CSE	2009	DBLP DOI BibTeX RDF
1	Nikos Deligiannis, Adrian Munteanu, Tom Clerckx, Peter Schelkens, Jan Cornelis	Modeling the Correlation Noise in Spatial Domain Distributed Video Coding.	DCC	2009	DBLP DOI BibTeX RDF
1	Min Yeol Lim, Freeman L. Rawson III, Tyler K. Bletsch, Vincent W. Freeh	PADD: Power Aware Domain Distribution.	ICDCS	2009	DBLP DOI BibTeX RDF
1	Soumyadeb Mitra, Marianne Winslett, Richard T. Snodgrass, Shashank Yaduvanshi, Sumedh Ambokar	An Architecture for Regulatory Compliant Database Management.	ICDE	2009	DBLP DOI BibTeX RDF
1	Yan Liu	A Process Modeling-Based Approach for Web Service Management.	ICWS	2009	DBLP DOI BibTeX RDF
1	Bachar Alrouh, Gheorghita Ghinea	A Performance Evaluation of Security Mechanisms for Web Services.	IAS	2009	DBLP DOI BibTeX RDF
1	Fangyong Hou, Dawu Gu, Nong Xiao, Fang Liu, Hongjun He	Performance and Consistency Improvements of Hash Tree Based Disk Storage Protection.	NAS	2009	DBLP DOI BibTeX RDF
1	Cuiping Xu, Ge Zhang, Shouqing Hao	Fast Way-Prediction Instruction Cache for Energy Efficiency and High Performance.	NAS	2009	DBLP DOI BibTeX RDF
1	Guillermo Payá Vayá, Javier Martín-Langerwerf, Sören Moch, Peter Pirsch	An Enhanced DMA Controller in SIMD Processors for Video Applications.	ARCS	2009	DBLP DOI BibTeX RDF
1	Jesús M. Pérez, Pablo Sánchez, Marcos Martinez	Real-Time Stereo Matching Using Memory-Efficient Belief Propagation for High-Definition 3D Tele-Presence Systems.	CIARP	2009	DBLP DOI BibTeX RDF	FPGA, Real-Time, Stereo-vision, Belief propagation, High-Definition
1	Andreas Könsgen, Andreas Timm-Giel, Carmelita Görg, Ronald Böhnke	Impact of the Transmission Scheme on the Performance in Wireless LANs.	MOBILIGHT	2009	DBLP DOI BibTeX RDF	Wireless LAN, MIMO, cross-layer
1	Fangyong Hou, Nong Xiao, Yuhua Tang, Hongjun He, Fang Liu	Protect Disk Integrity: Solid Security, Fine Performance and Fast Recovery.	ISA	2009	DBLP DOI BibTeX RDF	hash tree, performance, integrity, consistency, disk
1	Ekow J. Otoo, Doron Rotem, Shih-Chiang Tsao	Energy Smart Management of Scientific Data.	SSDBM	2009	DBLP DOI BibTeX RDF	Scientific workload, Performance guaranttee, Power management, File allocation, Disk storage
1	Jianxin Li, Dacheng Zhang, Jinpeng Huai, Jie Xu	Context-aware trust negotiation in peer-to-peer service collaborations.	Peer-to-Peer Networking and Applications	2009	DBLP DOI BibTeX RDF	Peer-to-peer access control, Security policy, Privacy preservation, Credential, Trust establishment
1	Anca Mariana Molnos, Sorin Cotofana, Marc J. M. Heijligers, Jos T. J. van Eijndhoven	Compositional, Dynamic Cache Management for Embedded Chip Multiprocessors.	Signal Processing Systems	2009	DBLP DOI BibTeX RDF	Predictability, Multiprocessor, Compositionality, Cache management
1	Marco Aldinucci, Marco Danelutto	Securing skeletal systems with limited performance penalty: The muskel.	Journal of Systems Architecture - Embedded Systems Design	2008	DBLP DOI BibTeX RDF
1	Jerry Hom, Ulrich Kremer	Execution context optimization for disk energy.	CASES	2008	DBLP DOI BibTeX RDF	synchronization, user study, multiprogramming, runtime adaptation
1	Qin Zhao, Ioana Cutcutache, Weng-Fai Wong	Pipa: pipelined profiling and analysis on multi-core systems.	CGO	2008	DBLP DOI BibTeX RDF	parallel cache simulation, analysis, pipelining, profiling, dynamic instrumentation, multi-core systems
1	Song Liu, Seda Ogrenci Memik, Yu Zhang, Gokhan Memik	A power and temperature aware DRAM architecture.	DAC	2008	DBLP DOI BibTeX RDF	page hit aware write buffer, power, temperature, DRAM
1	Zhen Zhang, Alain Greiner, Sami Taktak	A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip.	DAC	2008	DBLP DOI BibTeX RDF	2D-Mesh NoC, DSPIN, MP2-SoC, fault-tolerant, reconfiguration, routing algorithm
1	Maziar Goudarzi, Tohru Ishihara	Instruction cache leakage reduction by changing register operands and using asymmetric sram cells.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	asymmetric sram, leakage, instruction cache, register renaming
1	Song Liu, Seda Ogrenci Memik, Yu Zhang, Gokhan Memik	An approach for adaptive DRAM temperature and power management.	ICS	2008	DBLP DOI BibTeX RDF	power, temperature, DRAM
1	Yukiyoshi Kameyama, Oleg Kiselyov, Chung-chieh Shan	Closing the stage: from staged code to typed closures.	PEPM	2008	DBLP DOI BibTeX RDF	multistage programming, mutable state and control effects, type abstraction, closures, parametric polymorphism
1	Rui Abreu, Alberto González 0002, Peter Zoeteweij, Arjan J. C. van Gemund	Automatic software fault localization using generic program invariants.	SAC	2008	DBLP DOI BibTeX RDF	black box diagnosis, error detection, fault localization, program invariants, program spectra
1	Oliver Moser, Florian Rosenberg, Schahram Dustdar	Non-intrusive monitoring and service adaptation for WS-BPEL.	WWW	2008	DBLP DOI BibTeX RDF	message mediation, quality of service, monitoring, BPEL, service selection
1	Jiyong Park, Jaesoo Lee, Saehwa Kim, Seongsoo Hong	Quasistatic shared libraries and XIP for memory footprint reduction in MMU-less embedded systems.	ACM Trans. Embedded Comput. Syst.	2008	DBLP DOI BibTeX RDF	MMU-less, memory footprint reduction, quasi-static linking, Embedded systems, shared library
1	Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano, Daihan Wang	Run-time power gating of on-chip routers using look-ahead routing.	ASP-DAC	2008	DBLP DOI BibTeX RDF
1	Mihir R. Choudhury, Kartik Mohanram	Approximate logic circuits for low overhead, non-intrusive concurrent error detection.	DATE	2008	DBLP DOI BibTeX RDF
1	Raghavendra K, Madhu Mutyam	Process Variation Aware Issue Queue Design.	DATE	2008	DBLP DOI BibTeX RDF
1	Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana	Compositional, dynamic cache management for embedded chip multiprocessors.	DATE	2008	DBLP DOI BibTeX RDF
1	Behnam Ghavami, Mehrshad Khosraviani, Hossein Pedram	Power Optimization of Asynchronous Circuits through Simultaneous Vdd and Vth Assignment and Template Sizing.	DSD	2008	DBLP DOI BibTeX RDF
1	Meeta Sharma Gupta, Krishna K. Rangan, Michael D. Smith, Gu-Yeon Wei, David M. Brooks	DeCoR: A Delayed Commit and Rollback mechanism for handling inductive noise in processors.	HPCA	2008	DBLP DOI BibTeX RDF
1	Thi Minh Nguyet Hoang, Marie Oger, Stéphane Ragot, Marc Antonini	Embedded transform coding of audio signals by model-based bit plane coding.	ICASSP	2008	DBLP DOI BibTeX RDF
1	Juan Carlos Martinez Santos, Yunsi Fei	Leveraging speculative architectures for run-time program validation.	ICCD	2008	DBLP DOI BibTeX RDF
1	Pengfei Ma, Wenbo Wang, Xiaochuan Zhao, Kan Zheng	Joint Transmitter-Receiver Design for the Downlink Multiuser Spatial Multiplexing MIMO System.	ICC	2008	DBLP DOI BibTeX RDF
1	Matthew L. Curry, Anthony Skjellum, Lee Ward, Ron Brightwell	Accelerating Reed-Solomon coding in RAID systems with GPUs.	IPDPS	2008	DBLP DOI BibTeX RDF
1	Charbel J. Akl, Magdy A. Bayoumi	Cost-effective and low-power memory address bus encodings.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Qifei Fan, Ge Zhang, Weiwu Hu	A synchronized variable frequency clock scheme in chip multiprocessors.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Ioannis Kouretas, Charalambos Basetas, Vassilis Paliouras	Low-power logarithmic number system addition/subtraction and their impact on digital filters.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Like Chen, Runtong Zhang	A Key-dependent Cipher DSDP.	ISECS	2008	DBLP DOI BibTeX RDF	Block cipher algorithm, DSDP structure
1	Arun Raghavan, Colin Blundell, Milo M. K. Martin	Token tenure: PATCHing token counting using directory-based cache coherence.	MICRO	2008	DBLP DOI BibTeX RDF
1	Hongzhong Zheng, Jiang Lin, Zhao Zhang, Eugene Gorbatov, Howard David, Zhichun Zhu	Mini-rank: Adaptive DRAM architecture for improving memory power efficiency.	MICRO	2008	DBLP DOI BibTeX RDF
1	Stefan Valentin, Tobias Volkhausen, Furuzan Atay Onat, Halim Yanikomeroglu, Holger Karl	Decoding-based channel estimation for selective cooperation diversity protocols.	PIMRC	2008	DBLP DOI BibTeX RDF
1	Shijian Zhang, Weiwu Hu	Fetching Primary and Redundant Instructions in Turn for a Fault-Tolerant Embedded Microprocessor.	PRDC	2008	DBLP DOI BibTeX RDF
1	Chris Grier, Shuo Tang, Samuel T. King	Secure Web Browsing with the OP Web Browser.	IEEE Symposium on Security and Privacy	2008	DBLP DOI BibTeX RDF	security, browser, web security
1	Aditya Bansal, Jae-Joon Kim, Keunwoo Kim, Saibal Mukhopadhyay, Ching-Te Chuang, Kaushik Roy	Optimal Dual-VT Design in Sub-100 Nanometer PDSOI and Double-Gate Technologies.	VLSI Design	2008	DBLP DOI BibTeX RDF
1	Deepa Kannan, Aviral Shrivastava, Sarvesh Bhardwaj, Sarma B. K. Vrudhula	Power Reduction of Functional Units Considering Temperature and Process Variations.	VLSI Design	2008	DBLP DOI BibTeX RDF
1	Deepa Kannan, Aviral Shrivastava, Vipin Mohan, Sarvesh Bhardwaj, Sarma B. K. Vrudhula	Temperature and Process Variations Aware Power Gating of Functional Units.	VLSI Design	2008	DBLP DOI BibTeX RDF
1	Pengfei Ma, Xiaochuan Zhao, Mugen Peng, Wenbo Wang	Robust Linear Processing for Downlink Multiuser MIMO System with Imperfectly Known Channel.	WCNC	2008	DBLP DOI BibTeX RDF
1	Bugra Gedik, Ling Liu	Protecting Location Privacy with Personalized k-Anonymity: Architecture and Algorithms.	IEEE Trans. Mob. Comput.	2008	DBLP DOI BibTeX RDF	Location Privacy, k-anonymity, Mobile Computing Systems, Location-based Applications
1	Gesualdo Scutari, Daniel Pérez Palomar, Sergio Barbarossa	Optimal Linear Precoding Strategies for Wideband Noncooperative Systems Based on Game Theory - Part I: Nash Equilibria.	IEEE Transactions on Signal Processing	2008	DBLP DOI BibTeX RDF
1	Mohammad Alomari, Michael J. Cahill, Alan Fekete, Uwe Röhm	Serializable Executions with Snapshot Isolation: Modifying Application Code or Mixing Isolation Levels?	DASFAA	2008	DBLP DOI BibTeX RDF
1	Najwa Aaraj, Anand Raghunathan, Niraj K. Jha	Dynamic Binary Instrumentation-Based Framework for Malware Defense.	DIMVA	2008	DBLP DOI BibTeX RDF	control-data flow, execution context, dynamic binary instrumentation, virtualization, Malware
1	Adrian Lienhard, Tudor Gîrba, Oscar Nierstrasz	Practical Object-Oriented Back-in-Time Debugging.	ECOOP	2008	DBLP DOI BibTeX RDF
1	Zhikun Wang, Dan Feng, Ke Zhou, Fang Wang	PCOW: Pipelining-Based COW Snapshot Method to Decrease First Write Penalty.	GPC	2008	DBLP DOI BibTeX RDF
1	Kyoungwoo Lee, Aviral Shrivastava, Nikil Dutt, Nalini Venkatasubramanian	Data Partitioning Techniques for Partially Protected Caches to Reduce Soft Error Induced Failures.	DIPES	2008	DBLP DOI BibTeX RDF
1	Jose M. Such, Juan M. Alberola, Ana García-Fornes, Agustín Espinosa, Vicente J. Botti	Kerberos-Based Secure Multiagent Platform.	ProMAS	2008	DBLP DOI BibTeX RDF
1	Yoichi Sasaki, Kazuteru Namba, Hideo Ito	Circuit and Latch Capable of Masking Soft Errors with Schmitt Trigger.	J. Electronic Testing	2008	DBLP DOI BibTeX RDF	Masking circuit, Pass transistor, Schmitt trigger circuit, Soft error, Latch
1	Guillaume Duc, Ronan Keryell	Improving virus protection with an efficient secure architecture with memory encryption, integrity and information leakage protection.	Journal in Computer Virology	2008	DBLP DOI BibTeX RDF
1	Curt Schurgers, Anantha Chandrakasan	Traceback-Based Optimizations for Maximum a Posteriori Decoding Algorithms.	Signal Processing Systems	2008	DBLP DOI BibTeX RDF	very-large-scale integration, error correction coding, MAP estimation
1	Yen-Jen Chang, Yuan-Hong Liao, Shanq-Jang Ruan	Improve CAM power efficiency using decoupled match line scheme.	DATE	2007	DBLP DOI BibTeX RDF
1	Swaroop Ghosh, Swarup Bhunia, Kaushik Roy	Low-overhead circuit synthesis for temperature adaptation using dynamic voltage scheduling.	DATE	2007	DBLP DOI BibTeX RDF
1	Myeong-Eun Hwang, Tamer Cakici, Kaushik Roy	Interactive presentation: Process tolerant beta-ratio modulation for ultra-dynamic voltage scaling.	DATE	2007	DBLP DOI BibTeX RDF
1	Jeremy W. Sheaffer, David P. Luebke, Kevin Skadron	A hardware redundancy and recovery mechanism for reliable scientific computation on graphics processors.	Graphics Hardware	2007	DBLP DOI BibTeX RDF
1	Anil Madhavapeddy, Alex Ho, Tim Deegan, David Scott, Ripduman Sohan	Melange: creating a "functional" internet.	EuroSys	2007	DBLP DOI BibTeX RDF
1	Francis M. David, Jeffrey C. Carlyle, Roy H. Campbell	Context switch overheads for Linux on ARM platforms.	Experimental Computer Science	2007	DBLP DOI BibTeX RDF	context switch overhead, operating system
1	Kimish Patel, Wonbok Lee, Massoud Pedram	Active bank switching for temperature control of the register file in a microprocessor.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	register file, thermal model, temperature-aware design