Search results for "phase change memory"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee	Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address mapping.	ISCA	2010	DBLP DOI BibTeX RDF	dynamic address remapping, security, phase change memory, wear leveling
3	Yibo Chen, Jishen Zhao, Yuan Xie	3D-nonFAR: three-dimensional non-volatile FPGA architecture using phase change memory.	ISLPED	2010	DBLP DOI BibTeX RDF	non-volatile FPGA, phase-change memory, 3D IC
3	Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Jude A. Rivers	Scalable high performance main memory system using phase-change memory technology.	ISCA	2009	DBLP DOI BibTeX RDF	dram caching, phase change memory, wear leveling
3	Ping Zhou, Bo Zhao, Jun Yang 0002, Youtao Zhang	A durable and energy efficient main memory using phase change memory technology.	ISCA	2009	DBLP DOI BibTeX RDF	low power, phase change memory, endurance
3	Benjamin C. Lee, Engin Ipek, Onur Mutlu, Doug Burger	Architecting phase change memory as a scalable dram alternative.	ISCA	2009	DBLP DOI BibTeX RDF	dram alternative, performance, scalability, power, energy, phase change memory, pcm, endurance
3	Wei Xu, Jibang Liu, Tong Zhang	Data manipulation techniques to reduce phase change memory write energy.	ISLPED	2009	DBLP DOI BibTeX RDF	low power, phase change memory
2	Engin Ipek, Jeremy Condit, Edmund B. Nightingale, Doug Burger, Thomas Moscibroda	Dynamically replicated memory: building reliable systems from nanoscale resistive memories.	ASPLOS	2010	DBLP DOI BibTeX RDF	write endurance, phase-change memory
2	Moinuddin K. Qureshi, Michele Franceschini, Luis Alfonso Lastras-Montaño, John P. Karidis	Morphable memory system: a robust architecture for exploiting multi-level phase change memories.	ISCA	2010	DBLP DOI BibTeX RDF	morphable memory, multi-level cell, phase change memory
2	Moinuddin K. Qureshi, John P. Karidis, Michele Franceschini, Vijayalakshmi Srinivasan, Luis Lastras, Bülent Abali	Enhancing lifetime and security of PCM-based main memory with start-gap wear leveling.	MICRO	2009	DBLP DOI BibTeX RDF	phase change memory, wear leveling, endurance
2	Jeremy Condit, Edmund B. Nightingale, Christopher Frost, Engin Ipek, Benjamin C. Lee, Doug Burger, Derrick Coetzee	Better I/O through byte-addressable, persistent memory.	SOSP	2009	DBLP DOI BibTeX RDF	performance, file systems, phase change memory
2	Prasanth Mangalagiri, Karthik Sarpatwari, Aditya Yanamandra, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Osama Awadel Karim	A low-power phase change memory based hybrid cache architecture.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	PRAM, phase change memory
2	Daniel Salamon, Bruce F. Cockburn	An Electrical Simulation Model for the Chalcogenide Phase-Change Memory Cell.	MTDT	2003	DBLP DOI BibTeX RDF
1	Lei Jiang, Bo Zhao, Youtao Zhang, Jun Yang 0002, Bruce R. Childers	Improving write operations in MLC phase change memory.	HPCA	2012	DBLP DOI BibTeX RDF
1	Sang-Hyeon Lee, Moonkyung Kim, Byung-ki Cheong, Jooyeon Kim, Jo-Won Lee, Sandip Tiwari	A Single Element Phase Change Memory.	IEICE Transactions	2011	DBLP BibTeX RDF
1	Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee	Security Refresh: Protecting Phase-Change Memory against Malicious Wear Out.	IEEE Micro	2011	DBLP DOI BibTeX RDF
1	Jing Li, Chung Lam	Phase change memory.	SCIENCE CHINA Information Sciences	2011	DBLP DOI BibTeX RDF
1	Guido De Sandre, Luca Bettini, Alessandro Pirola, Lionel Marmonier, Marco Pasotti, Massimo Borghi, Paolo Mattavelli, Paola Zuliani, Luca Scotti, Gianfranco Mastracchio, Ferdinando Bedeschi, Roberto Gastaldi, Roberto Bez	A 4 Mb LV MOS-Selected Embedded Phase Change Memory in 90 nm Standard CMOS Technology.	J. Solid-State Circuits	2011	DBLP DOI BibTeX RDF
1	M. G. Mohammad	Fault model and test procedure for phase change memory.	IET Computers & Digital Techniques	2011	DBLP DOI BibTeX RDF
1	Wei Xu, Tong Zhang	A Time-Aware Fault Tolerance Scheme to Improve Reliability of Multilevel Phase-Change Memory in the Presence of Significant Resistance Drift.	IEEE Trans. VLSI Syst.	2011	DBLP DOI BibTeX RDF
1	Moinuddin K. Qureshi, Sudhanva Gurumurthi, Bipin Rajendran	Phase Change Memory: From Devices to Systems		2011	DOI RDF
1	Lei Jiang, Youtao Zhang, Jun Yang 0002	Enhancing phase change memory lifetime through fine-grained current regulation and voltage upscaling.	ISLPED	2011	DBLP BibTeX RDF
1	Alessandro Cabrini, Fabio Gallazzi, Guido Torelli	Current reference scheme for multilevel phase-change memory sensing.	ESSCIRC	2011	DBLP DOI BibTeX RDF
1	Cheng-Yuan Wen, Jeyanandh Paramesh, Larry T. Pileggi, Jing Li, SangBum Kim, Jonathan Proesel, Chung Lam	Post-silicon calibration of analog CMOS using phase-change memory cells.	ESSCIRC	2011	DBLP DOI BibTeX RDF
1	Wangyuan Zhang, Tao Li	Helmet: A resistance drift resilient architecture for multi-level cell phase change memory system.	DSN	2011	DBLP DOI BibTeX RDF
1	Shimin Chen, Phillip B. Gibbons, Suman Nath	Rethinking Database Algorithms for Phase Change Memory.	CIDR	2011	DBLP BibTeX RDF
1	Eunji Lee, Daeja Jin, Kern Koh, Hyokyung Bahn	Is Buffer Cache Still Effective for High Speed PCM (Phase Change Memory) Storage?	ICPADS	2011	DBLP DOI BibTeX RDF
1	Xiangyu Dong, Yuan Xie	AdaMS: Adaptive MLC/SLC phase-change memory design for file storage.	ASP-DAC	2011	DBLP DOI BibTeX RDF
1	Xi Zhang, Qian Hu, Dongsheng Wang, Chongmin Li, Haixia Wang	A Read-Write Aware Replacement Policy for Phase Change Memory.	APPT	2011	DBLP DOI BibTeX RDF
1	Nikolaos Papandreou, Haralampos Pozidis, Aggeliki Pantazi, Abu Sebastian, Matthew J. Breitwisch, Chung Hon Lam, Evangelos Eleftheriou	Programming algorithms for multilevel phase-change memory.	ISCAS	2011	DBLP DOI BibTeX RDF
1	Manan Suri, Veronique Sousa, Luca Perniola, Dominique Vuillaume, Barbara DeSalvo	Phase change memory for synaptic plasticity application in neuromorphic systems.	IJCNN	2011	DBLP DOI BibTeX RDF
1	Madhura Joshi, Wangyuan Zhang, Tao Li	Mercury: A fast and energy-efficient multi-level cell based Phase Change Memory system.	HPCA	2011	DBLP DOI BibTeX RDF
1	Stefanie Chiras	The pending arrival of Phase Change Memory: The implications on the memory-storage hierarchy and on future systems development.	SoCC	2011	DBLP DOI BibTeX RDF
1	Mohammad Arjomand, Amin Jadidi, Ali Shafiee, Hamid Sarbazi-Azad	A morphable phase change memory architecture considering frequent zero values.	ICCD	2011	DBLP DOI BibTeX RDF
1	Jue Wang, Xiangyu Dong, Guangyu Sun, Dimin Niu, Yuan Xie	Energy-efficient multi-level cell phase-change memory system with data encoding.	ICCD	2011	DBLP DOI BibTeX RDF
1	Soyoon Lee, Hyokyung Bahn, Sam H. Noh	Characterizing Memory Write References for Efficient Management of Hybrid PCM and DRAM Memory.	MASCOTS	2011	DBLP DOI BibTeX RDF	hybrid memory, write references, CLOCK algorithm, phase change memory
1	André Seznec	A Phase Change Memory as a Secure Main Memory.	Computer Architecture Letters	2010	DBLP DOI BibTeX RDF
1	Benjamin C. Lee, Engin Ipek, Onur Mutlu, Doug Burger	Phase change memory architecture and the quest for scalability.	Commun. ACM	2010	DBLP DOI BibTeX RDF
1	Meng-Hsueh Chiang, Yi-Bo Liao, Jun-Tin Lin, Wei-Chou Hsu, Chu Yu, Pei-Chia Chiang, Y.-Y. Hsu, W.-H. Liu, Shyh-Shyuan Sheu, Keng-Li Su, Ming-Jer Kao, Ming-Jinn Tsai	Low power design of phase-change memory based on a comprehensive model.	IET Computers & Digital Techniques	2010	DBLP DOI BibTeX RDF
1	Wei Xu, Tong Zhang	Using time-aware memory sensing to address resistance drift issue in multi-level phase change memory.	ISQED	2010	DBLP DOI BibTeX RDF
1	Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Marina Reyboz, Giovanni Beneventi, Fabien Clermidy, Luca Perniola, Ian O'Connor	Phase-change-memory-based storage elements for configurable logic.	FPT	2010	DBLP DOI BibTeX RDF
1	Guido De Sandre, Luca Bettini, Alessandro Pirola, Lionel Marmonier, Marco Pasotti, Massimo Borghi, Paolo Mattavelli, Paola Zuliani, Luca Scotti, Gianfranco Mastracchio, Ferdinando Bedeschi, Roberto Gastaldi, Roberto Bez	A 90nm 4Mb embedded phase-change memory with 1.2V 12ns read access time and 1MB/s write throughput.	ISSCC	2010	DBLP DOI BibTeX RDF
1	Corrado Villa, Duane Mills, Gerald Barkley, Hari Giduturi, Stefan Schippers, Daniele Vimercati	A 45nm 1Gb 1.8V phase-change memory.	ISSCC	2010	DBLP DOI BibTeX RDF
1	Dimin Niu, Yibo Chen, Xiangyu Dong, Yuan Xie	Energy and performance driven circuit design for emerging phase-change memory.	ASP-DAC	2010	DBLP DOI BibTeX RDF
1	Yongsoo Joo, Dimin Niu, Xiangyu Dong, Guangyu Sun, Naehyuck Chang, Yuan Xie	Energy- and endurance-aware design of phase change memory caches.	DATE	2010	DBLP BibTeX RDF
1	Nikolaos Papandreou, Aggeliki Pantazi, Abu Sebastian, Matthew J. Breitwisch, Chung Hon Lam, Haralampos Pozidis, Evangelos Eleftheriou	Multilevel phase-change memory.	ICECS	2010	DBLP DOI BibTeX RDF
1	Jingtong Hu, Chun Jason Xue, Wei-Che Tseng, Yi He, Meikang Qiu, Edwin Hsing-Mean Sha	Reducing write activities on non-volatile memories in embedded CMPs via data migration and recomputation.	DAC	2010	DBLP DOI BibTeX RDF	data recomputation, CMP, flash memory, data migration, phase change memory, SPM, non-volatile memory
1	Stuart E. Schechter, Gabriel H. Loh, Karin Strauss, Doug Burger	Use ECP, not ECC, for hard failures in resistive memories.	ISCA	2010	DBLP DOI BibTeX RDF	hard failures, resistive memories, memory, error correction, phase change memory
1	Benjamin C. Lee, Ping Zhou, Jun Yang 0002, Youtao Zhang, Bo Zhao, Engin Ipek, Onur Mutlu, Doug Burger	Phase-Change Technology and the Future of Main Memory.	IEEE Micro	2010	DBLP DOI BibTeX RDF	energy efficiency, memory architecture, DRAM, technology scaling, phase-change memory, PCM
1	Wangyuan Zhang, Tao Li	Exploring Phase Change Memory and 3D Die-Stacking for Power/Thermal Friendly, Fast and Durable Memory Architectures.	PACT	2009	DBLP DOI BibTeX RDF
1	Gaurav Dhiman, Raid Zuhair Ayoub, Tajana Rosing	PDRAM: a hybrid PRAM and DRAM main memory system.	DAC	2009	DBLP DOI BibTeX RDF	energy efficiency, memory management, phase change memory
1	Sangyeun Cho, Hyunjin Lee	Flip-N-Write: a simple deterministic technique to improve PRAM write performance, energy and endurance.	MICRO	2009	DBLP DOI BibTeX RDF	memory write performance, phase-change memory
1	Wangyuan Zhang, Tao Li	Characterizing and mitigating the impact of process variations on phase change based memory systems.	MICRO	2009	DBLP DOI BibTeX RDF	process variation, memory system, phase change memory
1	Richard F. Freitas	Storage class memory: technology, systems and applications.	SIGMOD Conference	2009	DBLP DOI BibTeX RDF	storage class memory, phase change memory, nonvolatile memory
1	Shu Li, Tong Zhang	Exploratory study on circuit and architecture design of very high density diode-switch phase change memories.	ISQED	2009	DBLP DOI BibTeX RDF
1	Yang Hong, Yinyin Lin, Tingao Tang, Bomy Chen	Multilevel Storage in Phase-Change Memory.	IEICE Transactions	2007	DBLP DOI BibTeX RDF
1	Kristy A. Campbell, Christopher M. Anderson	Phase-change memory devices with stacked Ge-chalcogenide/Sn-chalcogenide layers.	Microelectronics Journal	2007	DBLP DOI BibTeX RDF
1	M. Jagadesh Kumar, Ali A. Orouji	Phase Change Memory Faults.	VLSI Design	2006	DBLP DOI BibTeX RDF
1	Erwin J. Prinz	The zen of nonvolatile memories.	DAC	2006	DBLP DOI BibTeX RDF	FeRAM, SONOS, nanocrystal, oating gate, phase change memory, MRAM, nonvolatile memories
1	Ferdinando Bedeschi, Chiara Boffino, Edoardo Bonizzoni, Osama Khouri, Giorgio Pollaccia, Claudio Resta, Guido Torelli	A low-ripple voltage tripler.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Mohammad Gh. Mohammad, Laila Terkawi, Muna Albasman	A Stimulus-Free Probabilistic Model for Single-Event-Upset Sensitivity.	VLSI Design	2006	DBLP DOI BibTeX RDF
1	Ferdinando Bedeschi, Edoardo Bonizzoni, Giulio Casagrande, Roberto Gastaldi, Claudio Resta, Guido Torelli, Daniele Zella	SET and RESET pulse characterization in BJT-selected phase-change memories.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Bruce F. Cockburn	The Emergence of High-Density Semiconductor-Compatible Spintronic Memory.	ICMENS	2003	DBLP DOI BibTeX RDF