Search results for "power savings"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Sandy Irani, Sandeep K. Shukla, Rajesh Gupta	Algorithms for power savings.	ACM Transactions on Algorithms	2007	DBLP DOI BibTeX RDF	dynamic speed scaling, online algorithms, Power savings
2	Pravin Pawar, Bert-Jan van Beijnum, Hermie Hermens, Dimitri Konstantas	Analysis of Context-Aware Network Selection Schemes for Power Savings.	APSCC	2008	DBLP DOI BibTeX RDF
2	Gesan Wang, Nian-Feng Tzeng	Exact Forwarding Table Partitioning for Efficient TCAM Power Savings.	NCA	2007	DBLP DOI BibTeX RDF
2	Javier Gomez, Andrew T. Campbell	Variable-Range Transmission Power Control in Wireless Ad Hoc Networks.	IEEE Trans. Mob. Comput.	2007	DBLP DOI BibTeX RDF	traffic capacity, ad hoc networks, power savings, network connectivity, Multihop networks
2	Sandy Irani, Sandeep K. Shukla, Rajesh K. Gupta	Algorithms for power savings.	SODA	2003	DBLP DOI BibTeX RDF
2	Weiyu Tang, Rajesh K. Gupta, Alexandru Nicolau	Power Savings in Embedded Processors through Decode Filer Cache.	DATE	2002	DBLP DOI BibTeX RDF
2	Yolanda Villate, Evaggelia Pitoura, Arantza Illarramendi, Ahmed K. Elmagarmid	Extending the Data Services of Mobile Computers by External Data Lockers. (PDF / PS)	DEXA Workshops	2000	DBLP DOI BibTeX RDF	external data lockers, dedicated disk space, fixed network, battery power savings, mobile computer capabilities, mobile computing, mobile computers, mobile devices, mobile agents, wireless communications, data protection, communication optimizations, mobile users, data services, storage capacity, middleware architecture
2	Paul F. Stelling, Vojin G. Oklobdzija	Implementing Multiply-Accumulate Operation in Multiplication Time.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF	multiply-accumulate operation, multiplication time, optimal delays, instruction time, optimal multiply-accumulate circuit, RISC CPU, partial product reduction tree, final adder, digital signal processing, power savings, multiplying circuits, circuit design, VLSI circuits, parallel multiplier, processor performance, video applications, graphics applications, clock speed
2	Christian Piguet, T. Schneider, Jean-Marc Masgonty, Claude Arm, Serge Durand, M. Stegers	Low-Power Embedded Microprocessor Design.	EUROMICRO	1996	DBLP DOI BibTeX RDF	low-power embedded microprocessor design, low-power RISC-like architectures, gated clock techniques, power savings, microprocessor chips, CMOS technology, hierarchical memories, clock cycles
1	Erol Gelenbe, Christina Morfopoulou	Power Savings in Packet Networks via Optimised Routing.	MONET	2012	DBLP DOI BibTeX RDF
1	Pawel Wiatr, Paolo Monti, Lena Wosinska	Power savings versus network performance in dynamically provisioned WDM networks.	IEEE Communications Magazine	2012	DBLP DOI BibTeX RDF
1	Xenia Mountrouidou, Alma Riska, Evgenia Smirni	Adaptive workload shaping for power savings on disk drives (abstracts only).	SIGMETRICS Performance Evaluation Review	2011	DBLP DOI BibTeX RDF
1	Ganesh Chennimala Sankaran, Krishna M. Sivalingam	ONU Buffer Elimination for Power Savings in Passive Optical Networks.	ICC	2011	DBLP DOI BibTeX RDF
1	Xenia Mountrouidou, Alma Riska, Evgenia Smirni	Adaptive workload shaping for power savings on disk drives.	ICPE	2011	DBLP DOI BibTeX RDF
1	László Hévizi, István Gódor	Power savings in mobile networks by dynamic base station sectorization.	PIMRC	2011	DBLP DOI BibTeX RDF
1	Norifumi Nishikawa, Miyuki Nakano, Masaru Kitsuregawa	Cache Effect for Power Savings of Large Storage Systems with OLTP Applications.	DNIS	2011	DBLP DOI BibTeX RDF
1	Michele Polignano, Dario Vinella, Daniela Laselva, Jeroen Wigard, Troels B. Sørensen	Power Savings and QoS Impact for VoIP Application with DRX/DTX Feature in LTE.	VTC Spring	2011	DBLP DOI BibTeX RDF
1	Torsten Lehmann, Hosung Chun, Philip Preston, Gregg J. Suaning	Current-limited passive charge recovery for implantable neuro-stimulators: Power savings, modelling and characterisation.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Edward Y. Y. Kan, W. K. Chan, T. H. Tse	Leveraging Performance and Power Savings for Embedded Systems Using Multiple Target Deadlines.	QSIC	2010	DBLP DOI BibTeX RDF
1	Doe Hyun Yoon, Mattan Erez	Virtualized and flexible ECC for main memory.	ASPLOS	2010	DBLP DOI BibTeX RDF	fault tolerance, reliability, error correction, memory systems
1	Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, John Sartori	Recovery-driven design: a power minimization methodology for error-tolerant processor modules.	DAC	2010	DBLP DOI BibTeX RDF	recovery-driven design, power minimization
1	Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys	A complete design-flow for the generation of ultra low-power WSN node architectures based on micro-tasking.	DAC	2010	DBLP DOI BibTeX RDF	WSN node, hardware specialization, microcoded architecture, low-power design
1	Tak-Kei Lam, Steve Yang, Wai-Chung Tang, Yu-Liang Wu	Logic synthesis for low power using clock gating and rewiring.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	low power, logic synthesis, clock gating
1	Narges Bani Asadi, Christopher W. Fletcher, Greg Gibeling, John Wawrzynek, Wing H. Wong, Garry P. Nolan	ParaLearn: a massively parallel, scalable system for learning interaction networks on FPGAs.	ICS	2010	DBLP DOI BibTeX RDF	signal transduction networks, FPGA, Bayesian networks, reconfigurable computing, Markov chain Monte Carlo
1	Rakesh Kumar	Computing with stochastic processors: revisiting the correctness contract between software and hardware.	ISLPED	2010	DBLP DOI BibTeX RDF	stochastic processor, reliability, error resilience, error tolerance
1	Nandish Ashutosh Mehta, Gururaj V. Naik, Bharadwaj S. Amrutur	In-situ power monitoring scheme and its application in dynamic voltage and threshold scaling for digital CMOS integrated circuits.	ISLPED	2010	DBLP DOI BibTeX RDF	DVTS loop, in-situ power monitor, power optimum point, variable body bias, variable supply voltage, low power, ground bounce
1	Hicham Mahkoum, Abdelhakim Senhaji Hafid, Behçet Sarikaya	Proxying location update for idle mode interfaces.	IWCMC	2010	DBLP DOI BibTeX RDF	MIH services, idle/active mode, proxied interface, proxied multi-radio interface, proxy entity, location-update
1	Fabrizio Mulas, Andrea Acquaviva, Salvatore Carta, Gianni Fenu, Davide Quaglia, Franco Fummi	Network-adaptive management of computation energy in wireless sensor networks.	SAC	2010	DBLP DOI BibTeX RDF	wireless sensor networks, low-power
1	Nikolai Joukov, Birgit Pfitzmann, HariGovind V. Ramasamy, Murthy V. Devarakonda	Application-storage discovery.	SYSTOR	2010	DBLP DOI BibTeX RDF	enterprise storage, storage discovery, experimental evaluation
1	Zhikui Wang, Niraj Tolia, Cullen Bash	Opportunities and challenges to unify workload, power, and cooling management in data centers.	Operating Systems Review	2010	DBLP DOI BibTeX RDF
1	Hillery C. Hunter, Erik M. Nystrom, Daniel A. Connors, Wen-mei W. Hwu	Hardware-compiler co-design for adjustable data power savings.	Microprocessors and Microsystems - Embedded Hardware Design	2009	DBLP DOI BibTeX RDF
1	Zhong-Yi Jin, Curt Schurgers, Rajesh K. Gupta	A gateway node with duty-cycled radio and processing subsystems for wireless sensor networks.	ACM Trans. Design Autom. Electr. Syst.	2009	DBLP DOI BibTeX RDF	Embedded systems, power savings, gateway, sensor nodes
1	Karthik Ramani, Christiaan P. Gribble, Al Davis	StreamRay: a stream filtering architecture for coherent ray tracing.	ASPLOS	2009	DBLP DOI BibTeX RDF	wide simd architectures, ray tracing, graphics processors, interactive rendering
1	Dominic A. Antonelli, Alan Jay Smith, Jan-Willem van de Waerdt	Power consumption and reduction in a real, commercial multimedia core.	Conf. Computing Frontiers	2009	DBLP DOI BibTeX RDF	tm3270, multimedia, power, energy, compiler optimization, cache memory, embedded processor
1	Rodrígo González-Alberquilla, Fernando Castro, Luis Piñuel, Francisco Tirado	Stack oriented data cache filtering.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	power-performance efficient design, memory hierarchy, cache memory
1	Ik Joon Chang, Debabrata Mohapatra, Kaushik Roy	A voltage-scalable & process variation resilient hybrid SRAM architecture for MPEG-4 video processors.	DAC	2009	DBLP DOI BibTeX RDF	low power SRAM, supply voltage over-scaling, graceful degradation
1	Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli	NoC topology synthesis for supporting shutdown of voltage islands in SoCs.	DAC	2009	DBLP DOI BibTeX RDF	shutdown, topology, NoC, leakage power, voltage islands
1	Emre Tuncer, Jordi Cortadella, Luciano Lavagno	Enabling adaptability through elastic clocks.	DAC	2009	DBLP DOI BibTeX RDF	low power design, GALS, desynchronization, adaptive voltage scaling
1	Andrea Bartolini, Martino Ruggiero, Luca Benini	HVS-DBS: human visual system-aware dynamic luminance backlight scaling for video streaming applications.	EMSOFT	2009	DBLP DOI BibTeX RDF	power management, video streaming, display, LCD, backlight scaling
1	Basab Datta, Wayne P. Burleson	Low-power, process-variation tolerant on-chip thermal monitoring using track and hold based thermal sensors.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	sensor, interconnect, temperature, oscillator
1	Sanjay Kumar, Vanish Talwar, Vibhore Kumar, Parthasarathy Ranganathan, Karsten Schwan	vManage: loosely coupled platform and virtualization management in data centers.	ICAC	2009	DBLP DOI BibTeX RDF	performance, management, power, data-center
1	Jiuxing Liu, Dan E. Poff, Bülent Abali	Evaluating high performance communication: a power perspective.	ICS	2009	DBLP DOI BibTeX RDF	iwarp, networking, power, energy, infiniband, rdma
1	Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott A. Mahlke	Enabling ultra low voltage system operation by tolerating on-chip cache failures.	ISLPED	2009	DBLP DOI BibTeX RDF	fault-tolerant cache, low voltage operation, dynamic voltage scaling
1	Alyssa Bonnoit, Sebastian Herbert, Diana Marculescu, Lawrence T. Pileggi	Integrating dynamic voltage/frequency scaling and adaptive body biasing using test-time voltage selection.	ISLPED	2009	DBLP DOI BibTeX RDF	dynamic voltage / frequency scaling, body biasing
1	Debabrata Mohapatra, Georgios Karakonstantis, Kaushik Roy	Significance driven computation: a voltage-scalable, variation-aware, quality-tuning motion estimator.	ISLPED	2009	DBLP DOI BibTeX RDF	significance driven computation, variation aware, voltage over-scaling, low power, motion estimation
1	Mackenzie R. Scott, Rajeevan Amirtharajah	Pulse width modulation for reduced peak power full-swing on-chip interconnect.	ISLPED	2009	DBLP DOI BibTeX RDF	low power interconnect, peak power, pulse width modulation
1	Shu-Yi Wong, Chunhong Chen, Q. M. Jonathan Wu	Power-management-based Chien search for low power BCH decoder.	ISLPED	2009	DBLP DOI BibTeX RDF	BCH decoder, Chien search, low power, power management
1	Matthew M. Ziegler, Victor V. Zyuban, George Gristede, Milena Vratonjic, Joshua Friedrich	The opportunity cost of low power design: a case study in circuit tuning.	ISLPED	2009	DBLP DOI BibTeX RDF	low power design, productivity, circuit tuning
1	Wangyuan Zhang, Tao Li	Characterizing and mitigating the impact of process variations on phase change based memory systems.	MICRO	2009	DBLP DOI BibTeX RDF	process variation, memory system, phase change memory
1	Prateek Mishra, Anish Muttreja, Niraj K. Jha	Low-power FinFET circuit synthesis using multiple supply and threshold voltages.	JETC	2009	DBLP DOI BibTeX RDF	Low-power, linear programming, synthesis, TCMS
1	Ron Gabor, Avi Mendelson, Shlomo Weiss	Service level agreement for multithreaded processors.	TACO	2009	DBLP DOI BibTeX RDF	performance, fairness, throughput, power, Service level agreement
1	Raid Ayoub, Alex Orailoglu	Filtering Global History: Power and Performance Efficient Branch Predictor.	ASAP	2009	DBLP DOI BibTeX RDF
1	Min Yeol Lim, Freeman L. Rawson III, Tyler K. Bletsch, Vincent W. Freeh	PADD: Power Aware Domain Distribution.	ICDCS	2009	DBLP DOI BibTeX RDF
1	Maja Etinski, Julita Corbalán, Jesús Labarta, Mateo Valero, Alexander V. Veidenbaum	Power-aware load balancing of large scale MPI applications.	IPDPS	2009	DBLP DOI BibTeX RDF
1	Bin Lin, Arindam Mallik, Peter A. Dinda, Gokhan Memik, Robert P. Dick	User- and process-driven dynamic voltage and frequency scaling.	ISPASS	2009	DBLP DOI BibTeX RDF
1	Enric Musoll	Trading off higher execution latency for increased reliability in tile-based massive multi-core architectures.	ISQED	2009	DBLP DOI BibTeX RDF
1	Nitin Kataria, Forrest Brewer, João Pedro Hespanha, Timothy Sherwood	Metric Based Multi-Timescale Control for Reducing Power in Embedded Systems.	VLSI Design	2009	DBLP DOI BibTeX RDF
1	Kimiyoshi Usami, Toshiaki Shirai, Tatsunori Hashida, Hiroki Masuda, Seidai Takeda, Mitsutaka Nakata, Naomi Seki, Hideharu Amano, Mitaro Namiki, Masashi Imai, Masaaki Kondo, Hiroshi Nakamura	Design and Implementation of Fine-Grain Power Gating with Ground Bounce Suppression.	VLSI Design	2009	DBLP DOI BibTeX RDF
1	Jung Hwan Choi, Nilanjan Banerjee, Kaushik Roy	Variation-Aware Low-Power Synthesis Methodology for Fixed-Point FIR Filters.	IEEE Trans. on CAD of Integrated Circuits and Systems	2009	DBLP DOI BibTeX RDF
1	Rui Zhang 0006, Chin Choy Chai, Ying-Chang Liang	Joint Beamforming and Power Control for Multiantenna Relay Broadcast Channel With QoS Constraints.	IEEE Transactions on Signal Processing	2009	DBLP DOI BibTeX RDF
1	Milan Milenkovic, Enrique Castro-Leon, James R. Blakley	Power-Aware Management in Cloud Data Centers.	CloudCom	2009	DBLP DOI BibTeX RDF	cloud management, virtualization management, energy-proportional computing, power management, power efficiency, power-aware scheduling
1	Amir M. Abdulghani, Alexander J. Casson, Esther Rodríguez-Villegas	Quantifying the Feasibility of Compressive Sensing in Portable Electroencephalography Systems.	HCI	2009	DBLP DOI BibTeX RDF	Electroencephalogram, Power efficient, Wireless Systems, Compressive Sensing
1	Sai Prashanth Muralidhara, Mahmut T. Kandemir	Communication Based Proactive Link Power Management.	HiPEAC	2009	DBLP DOI BibTeX RDF
1	Roy Friedman, Alex Kogan	Power Aware Management Middleware for Multiple Radio Interfaces.	Middleware	2009	DBLP DOI BibTeX RDF	Power Aware Overlays, Multiple Radio Interfaces, Wireless Ad-hoc Networks
1	Priya Mahadevan, Puneet Sharma, Sujata Banerjee, Parthasarathy Ranganathan	A Power Benchmarking Framework for Network Devices.	Networking	2009	DBLP DOI BibTeX RDF	Network energy management, Benchmarking
1	Nainesh Agarwal, Nikitas J. Dimopoulos	Towards Automated FSMD Partitioning for Low Power Using Simulated Annealing.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Roberto Airoldi, Fabio Garzia, Tapani Ahonen, Dragomir Milojevic, Jari Nurmi	Implementation of W-CDMA Cell Search on a FPGA Based Multi-Processor System-on-Chip with Power Management.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Behrouz Maham, Mérouane Debbah, Are Hjørungnes	Energy-efficient cooperative routing in BER constrained multishop networks.	Frontiers of Computer Science in China	2009	DBLP DOI BibTeX RDF	routing, energy efficiency, multihop networks, outage probability, cooperative transmission
1	Georgios Keramidas, Polychronis Xekalakis, Stefanos Kaxiras	Recruiting Decay for Dynamic Power Reduction in Set-Associative Caches.	T. HiPEAC	2009	DBLP DOI BibTeX RDF
1	Teemu Pitkänen, Jarno K. Tanskanen, Risto Mäkinen, Jarmo Takala	Parallel Memory Architecture for Application-Specific Instruction-Set Processors.	Signal Processing Systems	2009	DBLP DOI BibTeX RDF	TTA, Transport triggered architecture, Low power, ASIP, Application-specific instruction-set processors, Parallel memory
1	Lingxiang Xiang, Jiangwei Huang, Tianzhou Chen	Coordinating System Software for Power Savings.	FGCN	2008	DBLP DOI BibTeX RDF
1	John M. Cioffi, Sumanth Jagannathan, Wooyul Lee, Hao Zou, Aakanksha Chowdhery, Wonjong Rhee, George Ginis, P. Silverman	Greener Copper with Dynamic Spectrum Management.	AccessNets	2008	DBLP DOI BibTeX RDF	spectrum balancing, power savings, DSM
1	Alan Kennedy, Xiaojun Wang, Zhen Liu, Bin Liu 0001	Low power architecture for high speed packet classification.	ANCS	2008	DBLP DOI BibTeX RDF	energy efficient, hardware accelerator, packet classification, frequency scaling
1	Clinton Wills Smullen IV, Shahrukh Rohinton Tarapore, Sudhanva Gurumurthi, Parthasarathy Ranganathan, Mustafa Uysal	Active storage revisited: the case for power and performance benefits for unstructured data processing applications.	Conf. Computing Frontiers	2008	DBLP DOI BibTeX RDF	performance, power, unstructured data, active storage
1	Michael A. Baker, Viswesh Parameswaran, Karam S. Chatha, Baoxin Li	Power reduction via macroblock prioritization for power aware H.264 video applications.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	low power, video, h.264, voltage scaling, power aware, mpeg4, frequency scaling
1	Yun Liang, Lei Ju, Samarjit Chakraborty, Tulika Mitra, Abhik Roychoudhury	Cache-aware optimization of BAN applications.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	sensor networks, mobile devices, cache, body-area networks
1	Shreyas Sen, Vishwanath Natarajan, Rajarajan Senguttuvan, Abhijit Chatterjee	Pro-VIZOR: process tunable virtually zero margin low power adaptive RF for wireless systems.	DAC	2008	DBLP DOI BibTeX RDF	low power RF transceivers, process tolerant adaptive RF
1	Matthew Curtis-Maury, Ankur Shah, Filip Blagojevic, Dimitrios S. Nikolopoulos, Bronis R. de Supinski, Martin Schulz	Prediction models for multi-dimensional power-performance optimization on many cores.	PACT	2008	DBLP DOI BibTeX RDF	dynamic concurrency throttling
1	Danny Hughes, Nelly Bencomo, Gordon S. Blair, Geoff Coulson, Paul Grace, Barry Porter	Exploiting extreme heterogeneity in a flood warning scenario using the Gridkit middleware.	Middleware (Companion)	2008	DBLP DOI BibTeX RDF	wireless sensor networks, middleware, implementation, reconfiguration
1	Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen	Tailoring circuit-switched network-on-chip to application-specific system-on-chip by two optimization schemes.	ACM Trans. Design Autom. Electr. Syst.	2008	DBLP DOI BibTeX RDF	low power, systems on chips, networks on chip, interconnection, Application specific
1	Jeanna Matthews, Sanjeev N. Trika, Debra Hensgen, Rick Coulson, Knut Grimsrud	Intel Turbo Memory: Nonvolatile disk caches in the storage hierarchy of mainstream computer systems.	TOS	2008	DBLP DOI BibTeX RDF	NAND, write-back, solid-state disk, disk cache, Nonvolatile memory
1	Min Chen, Aylin Yener	Interference management for multiuser two-way relaying.	CISS	2008	DBLP DOI BibTeX RDF
1	Massoud Momeni, Petru Bogdan Bacinschi, Manfred Glesner	Comparison of Opamp-Based and Comparator-Based Delta-Sigma Modulation.	DATE	2008	DBLP DOI BibTeX RDF
1	Madhura Purnaprajna, Christoph Puttmann, Mario Porrmann	Power Aware Reconfigurable Multiprocessor for Elliptic Curve Cryptography.	DATE	2008	DBLP DOI BibTeX RDF
1	Ashoka Visweswara Sathanur, Antonio Pullini, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino	A Scalable Algorithmic Framework for Row-Based Power-Gating.	DATE	2008	DBLP DOI BibTeX RDF
1	Charles Thangaraj, Tom Chen	Early Design Phase Power Performance Trade-Offs Using In-Situ Macro Models.	DELTA	2008	DBLP DOI BibTeX RDF	pareto-front, What-if analysis, Power-performance trade-off
1	Abhisek Pan, James W. Tschanz, Sandip Kundu	A Low Cost Scheme for Reducing Silent Data Corruption in Large Arithmetic Circuit.	DFT	2008	DBLP DOI BibTeX RDF
1	Enrico Macii, Leticia Maria Veiras Bolzani, Andrea Calimera, Alberto Macii, Massimo Poncino	Integrating Clock Gating and Power Gating for Combined Dynamic and Leakage Power Optimization in Digital CMOS Circuits.	DSD	2008	DBLP DOI BibTeX RDF
1	Amin Khajeh Djahromi, Minyoung Kim, Nikil Dutt, Ahmed M. Eltawil, Fadi J. Kurdahi	Cross-layer co-exploration of exploiting error resilience for video over wireless applications.	ESTImedia	2008	DBLP DOI BibTeX RDF
1	Yu Zhou, Hui Guo	Application Specific Low Power ALU Design.	EUC	2008	DBLP DOI BibTeX RDF
1	William G. Osborne, José Gabriel F. Coutinho, Wayne Luk, Oskar Mencer	Power-Aware and Branch-Aware Word-Length Optimization.	FCCM	2008	DBLP DOI BibTeX RDF
1	Shilpa Bhoj, Dinesh Bhatia	A dynamic temperature control simulation system for FPGAs.	FPL	2008	DBLP DOI BibTeX RDF
1	Reetuparna Das, Asit K. Mishra, Chrysostomos Nicopoulos, Dongkook Park, Vijaykrishnan Narayanan, Ravishankar R. Iyer, Mazin S. Yousif, Chita R. Das	Performance and power optimization through data compression in Network-on-Chip architectures.	HPCA	2008	DBLP DOI BibTeX RDF
1	Valentina Salapura, Matthias A. Blumrich, Alan Gara	Design and implementation of the blue gene/P snoop filter.	HPCA	2008	DBLP DOI BibTeX RDF
1	Shrikanth Narayanan, Girish Varatkar, Douglas L. Jones, Naresh R. Shanbhag	Computation as estimation: Estimation-theoretic IC design improves robustness and reduces power consumption.	ICASSP	2008	DBLP DOI BibTeX RDF
1	Liang Di, Mateja Putic, John Lach, Benton H. Calhoun	Power switch characterization for fine-grained dynamic voltage scaling.	ICCD	2008	DBLP DOI BibTeX RDF
1	Ming Yang, Lixin Yu, Heping Peng	Energy Efficient Register File with Reduced Window Partition.	ICPADS	2008	DBLP DOI BibTeX RDF
1	Joseph Chabarek, Joel Sommers, Paul Barford, Cristian Estan, David Tsiang, Stephen Wright	Power Awareness in Network Design and Routing.	INFOCOM	2008	DBLP DOI BibTeX RDF
1	Bithika Khargharia, Salim Hariri, Wael Kdouh, Manal Houri, Hesham El-Rewini, Mazin S. Yousif	Autonomic power and performance management of high-performance servers.	IPDPS	2008	DBLP DOI BibTeX RDF
1	Nainesh Agarwal, Nikitas J. Dimopoulos	FSMD partitioning for low power using simulated annealing.	ISCAS	2008	DBLP DOI BibTeX RDF