Search results for "program execution time"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Jack W. Davidson, Anne M. Holler	Subprogram Inlining: A Study of its Effects on Program Execution Time.	IEEE Trans. Software Eng.	1992	DBLP DOI BibTeX RDF	subprogram inlining, execution time performance, inlined versions, inlined program execution time behavior, inlined code, demand-paged virtual memory machines, inlining algorithm, program size constraints, paging behavior, caching, programming, program testing, storage allocation, computer systems, virtual storage, interprocedural data flow analysis
2	Tai-Yi Huang, Jane W.-S. Liu, David Hull	A Method for Bounding the Effect of DMA I/O Interference on Program Execution Time. (PDF / PS)	IEEE Real-Time Systems Symposium	1996	DBLP DOI BibTeX RDF	DMA I/O operation, program execution time, DMA controller, cycle-stealing mode, bus cycles, cycle stealing operation, executing program, machine instruction, instruction-cache architectures, input output operation, simulations, real-time systems, worst-case execution time, data transfer
2	Mark J. Clement, Michael J. Quinn	Multivariate statistical techniques for parallel performance prediction.	HICSS	1995	DBLP DOI BibTeX RDF	multivariate statistical techniques, parallel performance prediction, multicomputer efficiency, program execution time, architectural characterization, algorithmic characterization, critical model parameters, cache miss penalty, predicted execution time, standard error values, large variance values, performance evaluation, parallel processing, performance model, statistical analysis, data analysis, software performance evaluation, variance, confidence interval, random variables, message latency, multivariate data analysis, model parameters
1	Fernando Magno Quintão Pereira, Jens Palsberg	SSA Elimination after Register Allocation.	CC	2009	DBLP DOI BibTeX RDF
1	Houman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum	Dynamic register file resizing and frequency scaling to improve embedded processor performance and energy-delay efficiency.	DAC	2008	DBLP DOI BibTeX RDF	dynamic resizing, performance, embedded processor, register file
1	Ben Liblit, Atanas Rountev	WODA 2008: the sixth international workshop on dynamic analysis.	ISSTA	2008	DBLP DOI BibTeX RDF	development of dynamic analysis tools and frameworks, efficient instrumentation techniques, fault detection and debugging, remote analysis and measurement of software systems, statistical reasoning techniques, synergies between static and dynamic analysis techniques, visualization and classification of program behavior, software testing, dynamic analysis, runtime monitoring, optimization techniques, program evolution
1	Rui Gong, Wei Chen 0009, Fang Liu, Kui Dai, Zhiying Wang	Control flow checking and recovering based on 8051 architecture.	SAC	2008	DBLP DOI BibTeX RDF	8051 architecture, recovering, control flow checking
1	Tushar Kumar, Romain Cledat, Jaswanth Sreeram, Santosh Pande	Statistically Analyzing Execution Variance for Soft Real-Time Applications.	LCPC	2008	DBLP DOI BibTeX RDF
1	Sriraman Tallam, Rajiv Gupta	Unified control flow and data dependence traces.	TACO	2007	DBLP DOI BibTeX RDF	Control flow trace, dynamic data dependence trace, profiling, address trace
1	Md. Mafijul Islam	On the Limitations of Compilers to Exploit Thread-Level Parallelism in Embedded Applications.	ACIS-ICIS	2007	DBLP DOI BibTeX RDF
1	Jean-François Deverge, Isabelle Puaut	WCET-Directed Dynamic Scratchpad Memory Allocation of Data.	ECRTS	2007	DBLP DOI BibTeX RDF
1	Alessandro Orso, Andreas Zeller	Fifth International Workshop on Dynamic Analysis (WODA 2007).	ICSE Companion	2007	DBLP DOI BibTeX RDF
1	Jaswanth Sreeram, Romain Cledat, Tushar Kumar, Santosh Pande	RSTM : A Relaxed Consistency Software Transactional Memory for Multicores.	PACT	2007	DBLP DOI BibTeX RDF
1	Weixing Ji, Feng Shi, Baojun Qiao, Qi Zuo, Caixia Liu	Performance Evaluation of a Self-Maintained Memory Module.	RTSS	2007	DBLP DOI BibTeX RDF
1	Edison Mera, Pedro López-García, Germán Puebla, Manuel Carro, Manuel V. Hermenegildo	Using Combined Static Analysis and Profiling for Logic Program Execution Time Estimation.	ICLP	2006	DBLP DOI BibTeX RDF
1	Neelam Gupta, Andy Podgurski	Fourth international workshop on dynamic analysis (WODA 2006).	ICSE	2006	DBLP DOI BibTeX RDF
1	Abhishek Das, William J. Dally, Peter R. Mattson	Compiling for stream processing.	PACT	2006	DBLP DOI BibTeX RDF	SRF allocation, Stream Operation Precedence (SOP) graph, StreamC, coarse-grained operations, producer-consumer locality, scoreboard slot assignment, stream scheduling, strip-mining, software-pipelining, task level parallelism, stream programming model
1	Zhelong Pan, Rudolf Eigenmann	Fast, automatic, procedure-level performance tuning.	PACT	2006	DBLP DOI BibTeX RDF	optimization orchestration, performance tuning, dynamic compilation
1	Dayong Gu, Clark Verbrugge, Etienne M. Gagnon	Relative factors in performance analysis of Java virtual machines.	VEE	2006	DBLP DOI BibTeX RDF	Java, performance analysis, caches, garbage collection, hardware counters
1	Houman Homayoun, Ted H. Szymanski	Reducing the Instruction Queue Leakage Power in Superscalar Processors.	CCECE	2006	DBLP DOI BibTeX RDF
1	Eryk Laskowski, Marek Tudruj	Embedded Parallel Systems Based on Dynamic Look-Ahead Reconfiguration in Redundant Communication Resources.	DSD	2006	DBLP DOI BibTeX RDF
1	Toshinori Sato, Yuu Tanaka, Hidenori Sato, Toshimasa Funaki, Takenori Koushiro, Akihiro Chiyonobu	Improving Energy Efficiency Via Speculative Multithreading on MultiCore Processors.	PATMOS	2006	DBLP DOI BibTeX RDF
1	Dinesh C. Suresh, Banit Agrawal, Walid A. Najjar, Jun Yang 0002	VALVE: Variable Length Value Encoder for Off-Chip Data Buses..	ICCD	2005	DBLP DOI BibTeX RDF
1	Dingjun Chen, Chung-Yeol Lee, Cheol Hoon Park	Hybrid Genetic Algorithm and Simulated Annealing (HGASA) in Global Function Optimization.	ICTAI	2005	DBLP DOI BibTeX RDF
1	Erez Perelman, Trishul M. Chilimbi, Brad Calder	Variational Path Profiling.	IEEE PACT	2005	DBLP DOI BibTeX RDF
1	Sriraman Tallam, Rajiv Gupta, Xiangyu Zhang	Extended Whole Program Paths.	IEEE PACT	2005	DBLP DOI BibTeX RDF
1	Gopal Gupta	Software Engineering Track Chair's Message.	ICDCIT	2005	DBLP DOI BibTeX RDF
1	Ranieri Baraglia, Renato Ferrini, Pierluigi Ritrovato	HMM: A Static Mapping Algorithm to Map Parallel Applications on Grids.	PPAM	2005	DBLP DOI BibTeX RDF
1	Eryk Laskowski, Marek Tudruj, Richard Olejnik, Bernard Toursel	Java Programs Optimization Based on the Most-Often-Used-Paths Approach.	PPAM	2005	DBLP DOI BibTeX RDF
1	Farn Wang	Inductive Composition Of Numbers With Maximum, Minimum, And Addition: A New Theory for Program Execution-Time Analysis.	Int. J. Found. Comput. Sci.	2004	DBLP DOI BibTeX RDF
1	Frédéric Gruau, Yves Lhuillier, Philippe Reitz, Olivier Temam	BLOB computing.	Conf. Computing Frontiers	2004	DBLP DOI BibTeX RDF	cellular automata, scalable architectures, bio-inspiration
1	Yen-Tso Liu, Tyng-Yeu Liang, Zhe-Hung Kuo, Ce-Kuen Shieh	Involving memory resource consideration into workload distribution for software DSM systems.	CCGRID	2004	DBLP DOI BibTeX RDF
1	Lukasz Masko	Program Graph Scheduling for Dynamic SMP Clusters with Communication on the Fly.	ISPDC/HeteroPar	2004	DBLP DOI BibTeX RDF
1	Eryk Laskowski, Richard Olejnik, Bernard Toursel, Marek Tudruj	Scheduling Byte Code-Defined Data Dependence Graphs of Object Oriented Programs.	PARELEC	2004	DBLP DOI BibTeX RDF
1	Dharmesh Parikh, Kevin Skadron, Yan Zhang, Mircea R. Stan	Power-Aware Branch Prediction: Characterization and Design.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF	target prediction, highly-biased branches, pipeline gating, speculation control, Low-power design, power, branch prediction, processor architecture, energy-aware systems, banking
1	Albert Mo Kim Cheng, Hsiu-yen Tsai	A Graph-Based Approach for Timing Analysis and Refinement of OPS5 Knowledge-Based Systems.	IEEE Trans. Knowl. Data Eng.	2004	DBLP DOI BibTeX RDF	real-time systems, expert systems, Timing analysis, response time, rule-based systems, production systems, OPS5, KBS
1	Kentaro Hamayasu, Vasily G. Moshnyaga	Impact of Register-Cache Bandwidth Variation on Processor Performance.	Asia-Pacific Computer Systems Architecture Conference	2004	DBLP DOI BibTeX RDF
1	Heidi E. Ziegler, Mary W. Hall, Pedro C. Diniz	Compiler-generated communication for pipelined FPGA applications.	DAC	2003	DBLP DOI BibTeX RDF	high-level and architectural synthesis, parallelizing compiler analysis techniques, synthesis techniques for configurable computing, FPGAs, pipelining, rapid prototyping
1	Ulrik Pagh Schultz, Julia L. Lawall, Charles Consel	Automatic program specialization for Java.	ACM Trans. Program. Lang. Syst.	2003	DBLP DOI BibTeX RDF	Automatic program specialization, Java, optimization, partial evaluation, object-oriented languages
1	Hasyim Gautama, Arjan J. C. van Gemund	A Statistical Approach to Branch Modeling in Static Program Performance Prediction.	IPDPS	2003	DBLP DOI BibTeX RDF
1	Yusuf Hasan, J. Morris Chang	A hybrid allocator.	ISPASS	2003	DBLP DOI BibTeX RDF
1	Xinyu Chen, Michael R. Lyu	Performance and Effectiveness Analysis of Checkpointing in Mobile Environments.	SRDS	2003	DBLP DOI BibTeX RDF	Equi-number checkpointing, Optimal checkpointing interval, Performance analysis, Handoff, Mobile environments
1	Hasyim Gautama, Arjan J. C. van Gemund	Symbolic Performance Prediction of Speculative Parallel Programs.	Euro-Par	2003	DBLP DOI BibTeX RDF
1	Eryk Laskowski, Marek Tudruj	Inter-processor Connection Reconfiguration Based on Dynamic Look-Ahead Control of Multiple Crossbar Switches.	FPL	2003	DBLP DOI BibTeX RDF
1	José F. Martínez, Josep Torrellas	Speculative synchronization: applying thread-level speculation to explicitly parallel applications.	ASPLOS	2002	DBLP DOI BibTeX RDF
1	Michael Thies	Annotating Java libraries in support of whole-program optimization.	PPPJ/IRE	2002	DBLP DOI BibTeX RDF	Java
1	Abhik Roychoudhury, Xianfeng Li, Tulika Mitra	Timing Analysis of Embedded Software for Speculative Processors.	ISSS	2002	DBLP DOI BibTeX RDF	worst case execution time, branch prediction
1	Yu-Sug Chang, Hye-Jung Lee, Doo-Soon Park, Im-Yeong Lee	Interprocedural Transformations for Extracting Maximum Parallelism.	ADVIS	2002	DBLP DOI BibTeX RDF
1	Hasyim Gautama, Arjan J. C. van Gemund	Symbolic Performance Prediction of Data-Dependent Parallel Programs.	Computer Performance Evaluation / TOOLS	2002	DBLP DOI BibTeX RDF
1	Takuya Araki, Hitoshi Murai, Tsunehiko Kamachi, Yoshiki Seo	Optimization of HPF Programs with Dynamic Recompilation Technique.	ISHPC	2002	DBLP BibTeX RDF
1	C.-C. Hwang, S.-K. Huang, D.-J. Chen, D. Chen	Object-Oriented Program Behavior Analysis Based on Control Patterns.	APAQS	2001	DBLP DOI BibTeX RDF	Java VM, Data Mining, Program Optimization, Code Patterns, Workflow Analysis, Benchmark Design
1	Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Luca Tagliaferri	Control-Flow Checking via Regular Expressions.	Asian Test Symposium	2001	DBLP DOI BibTeX RDF
1	Marios Iliopoulos, Theodore Antonakopoulos	Run-Time Optimized Reconfiguration Using Instruction Forecasting.	FPL	2001	DBLP DOI BibTeX RDF
1	Marek Tudruj, Lukasz Masko	An Architecture and Task Scheduling Algorithm for Systems Based on Dynamically Reconfigurable Shared Memory Clusters.	IWCC	2001	DBLP DOI BibTeX RDF
1	Marek Tudruj, Lukasz Masko	Task Scheduling for Dynamically Configurable Multiple SMP Clusters Based on Extended DSC Approach.	PPAM	2001	DBLP BibTeX RDF
1	Michael Voss, Rudolf Eigenmann	A framework for remote dynamic program optimization.	Dynamo	2000	DBLP DOI BibTeX RDF
1	Steven Lucco	Split-stream dictionary program compression.	PLDI	2000	DBLP DOI BibTeX RDF	virtual machine, compression, runtime system
1	Steven P. Vanderwiel, David J. Lilja	Data prefetch mechanisms.	ACM Comput. Surv.	2000	DBLP DOI BibTeX RDF	prefetching, memory latency
1	J. Morris Chang, Witawas Srisa-an, Chia-Tien Dan Lo	Architectural Support for Dynamic Memory Management. (PDF / PS)	ICCD	2000	DBLP DOI BibTeX RDF
1	Chih-Yung Chang, Jang-Ping Sheu, Hsi-Chiuen Chen	Reducing Cache Conflicts by Multi-Level Cache Partitioning and Array Elements Mapping. (PDF / PS)	ICPADS	2000	DBLP DOI BibTeX RDF	array padding, multi-level cache, cache partitioning, loop tiling, direct mapping, cache conflict
1	Göran Eggers, Hans Christoph Zeidler	Efficient Clock-Cycle Precise Simulation at Architecture Level in C++. (PDF / PS)	IEEE International Workshop on Rapid System Prototyping	2000	DBLP DOI BibTeX RDF
1	Chung-Hsing Hsu, Ulrich Kremer, Michael S. Hsiao	Compiler-Directed Dynamic Frequency and Voltage Scheduling.	PACS	2000	DBLP DOI BibTeX RDF
1	Michael Bekerman, Stéphan Jourdan, Ronny Ronen, Gilad Kirshenboim, Lihu Rappoport, Adi Yoaz, Uri C. Weiser	Correlated Load-Address Predictors.	ISCA	1999	DBLP DOI BibTeX RDF	context-based predictor, global correlation, load-address prediction, predictor implementation, recursive data structures
1	Janez Brest, Viljem Zumer, Milan Ojstersek	Dynamic Scheduling on a Network Heterogeneous Computer System.	ACPC	1999	DBLP DOI BibTeX RDF
1	Miroslaw Thor	A multi-thread approach reducing program execution time in a heterogeneous reconfigurable multi-processor architecture.	Journal of Systems Architecture	1997	DBLP BibTeX RDF
1	Min Tan 0002, Howard Jay Siegel, John K. Antonio, Yan Alexander Li	Minimizing the Application Execution Time Through Scheduling of Subtasks and Communication Traffic in a Heterogeneous Computing System.	IEEE Trans. Parallel Distrib. Syst.	1997	DBLP DOI BibTeX RDF	data relocation, multiple data-copies, scheduling, optimization, distributed computing, heterogeneous computing, Data distribution, data-reuse
1	Jens Simon, Jens-Michael Wierum	Accurate Performance Prediction for Assively Parallel Systems and Its Applications.	Euro-Par, Vol. II	1996	DBLP DOI BibTeX RDF
1	Michael A. Driscoll, W. Robert Daasch	Accurate Predictions of Parallel Program Execution Time.	J. Parallel Distrib. Comput.	1995	DBLP DOI BibTeX RDF
1	Rwo-Hsi Wang, Aloysius K. Mok	Response-Time Bounds of EQL Rule-Based Programs Under Rule Priority Structure.	IEEE Trans. Software Eng.	1995	DBLP DOI BibTeX RDF	Real-time decision systems, algorithm, timing analysis, rule-based systems, priority
1	Stephen Shafer, Kanad Ghose	Improving Parallel Program Execution Time with Message Consolidation.	IPPS	1994	DBLP BibTeX RDF
1	Clifford Liem, Trevor C. May, Pierre G. Paulin	Register assignment through resource classification for ASIP microcode generation.	ICCAD	1994	DBLP DOI BibTeX RDF
1	Steven K. Reinhardt, Mark D. Hill, James R. Larus, Alvin R. Lebeck, James C. Lewis, David A. Wood	The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers.	SIGMETRICS	1993	DBLP DOI BibTeX RDF
1	Rajiv Gupta	Optimizing Array Bound Checks Using Flow Analysis.	LOPLAS	1993	DBLP DOI BibTeX RDF	available checks, check hoisting, very busy checks, dataflow analysis
1	Anna R. Karlin, Kai Li, Mark S. Manasse, Susan S. Owicki	Empirical Studies of Competitive Spinning for a Shared-Memory Multiprocessor.	SOSP	1991	DBLP DOI BibTeX RDF
1	Miquel Huguet, Tomás Lang	Architectural Support for Reduced Register Saving / Restoring in Single-Window Register Files.	ACM Trans. Comput. Syst.	1991	DBLP DOI BibTeX RDF
1	Rajiv Gupta	A Fresh Look at Optimizing Array Bound Checking.	PLDI	1990	DBLP DOI BibTeX RDF
1	Steven A. Przybylski, Mark Horowitz, John L. Hennessy	Characteristics of Performance-Optimal Multi-Level Cache Hierarchies.	ISCA	1989	DBLP DOI BibTeX RDF
1	Peter Steenkiste	The Impact of Code Density on Instruction Cache Performance.	ISCA	1989	DBLP DOI BibTeX RDF
1	Ph. Mussi, Philippe Nain	Evaluation of Parallel Execution of Program Tree Structures.	SIGMETRICS	1984	DBLP DOI BibTeX RDF
1	Andrzej Duda	The Effects of Checkpointing on Program Execution Time.	Inf. Process. Lett.	1983	DBLP DOI BibTeX RDF
1	K. H. (Kane) Kim, C. V. Ramamoorthy	Failure-tolerant parallel programming and its supporting system architecture.	AFIPS National Computer Conference	1976	DBLP DOI BibTeX RDF