Search results for "programmability"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Colin J. Ihrig, Gerold Joseph Dhanabalan, Alex K. Jones	A low-power CMOS thyristor based delay element with programmability extensions.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	delay element, thyristor, low power
2	Paolo Atzeni, Luigi Bellomarini, Francesca Bugiotti, Giorgio Gianforme	From Schema and Model Translation to a Model Management System.	BNCOD	2008	DBLP DOI BibTeX RDF	model management system, model-independent schema and data translation, data programmability, model management
2	Fei Li, Yan Lin, Lei He	Field Programmability of Supply Voltages for FPGA Power Reduction.	IEEE Trans. on CAD of Integrated Circuits and Systems	2007	DBLP DOI BibTeX RDF
2	Tong Wen, Jimmy Su, Phillip Colella, Katherine A. Yelick, Noel Keen	An adaptive mesh refinement benchmark for modern parallel programming languages.	SC	2007	DBLP DOI BibTeX RDF	performance, scalability, benchmark, programmability, adaptive mesh refinement, parallel programming languages
2	Ciaran Toal, Sakir Sezer	Investigation into programmability for layer 2 protocol frame delineation architectures.	IPDPS	2006	DBLP DOI BibTeX RDF
2	E. Schuler, L. Carro	Increasing analog programmability in SoCs.	IPDPS	2006	DBLP DOI BibTeX RDF
2	Aránzazu Otín, Santiago Celma, Concepción Aldea	A design strategy for VHF filters with digital programmability.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Yan Lin, Fei Li, Lei He	Power modeling and architecture evaluation for FPGA with novel circuits for Vdd programmability.	FPGA	2005	DBLP DOI BibTeX RDF	FPGA power model, Vdd programmability, low power, FPGA architecture, dual-Vdd
2	Scott J. Weber, Kurt Keutzer	Using minimal minterms to represent programmability.	CODES+ISSS	2005	DBLP DOI BibTeX RDF	Boolean function representation, instruction set extraction, Boolean satisfiability
2	Scott Schneider, Christos D. Antonopoulos, Dimitrios S. Nikolopoulos	Factory: An Object-Oriented Parallel Programming Substrate for Deep Multiprocessors.	HPCC	2005	DBLP DOI BibTeX RDF	Multithreading substrate, Object-oriented parallel programming, Deep parallel architectures, Multiparadigm parallelism, Portability, Programmability
2	Wim Roelandts	FPGAs and the Era of Field Programmability.	FPL	2004	DBLP DOI BibTeX RDF
2	Ari Paasio, Jacek Flak, Mika Laiho, Kari Halonen	High density VLSI implementation of a bipolar CNN with reduced programmability.	ISCAS	2004	DBLP DOI BibTeX RDF
2	Fei Li, Yan Lin, Lei He	Vdd programmability to reduce FPGA interconnect power.	ICCAD	2004	DBLP DOI BibTeX RDF
2	Zohair Chentouf, Soumaya Cherkaoui, Ahmed Khoumsi	Experimenting with Feature Interaction Management in SIP Environment.	Telecommunication Systems	2003	DBLP DOI BibTeX RDF	feature interaction detection and resolution, service and preference modeling, end user programmability, SIP, IP telephony
2	Munehiro Fukuda, Naoya Suzuki, Luis Miguel Campos, Shin-ya Kobayashi	Programmability and Performance of M++ Self-Migrating Threads.	CLUSTER	2001	DBLP DOI BibTeX RDF	Thread migraion, multi-agent systems, multi-threading, parallel and distributed simulation
2	Christos Bohoris, Antonio Liotta, George Pavlou	Evaluation of Constrained Mobility for Programmability in Network Management.	DSOM	2000	DBLP DOI BibTeX RDF	Performance Evaluation, Mobile Agents, CORBA, Java-RMI, Code Mobility
2	Bertrand Ducourthial, Alain Mérigot, Nicolas Sicard	Anet: A Programming Environment for Parallel Image Analysis.	CAMP	2000	DBLP DOI BibTeX RDF	Anet, parallel image analysis, programmability requirements, graph based associative nets computing model, irregular data manipulation, programming environments, programming environment
2	Zheng Zhang, Marcelo H. Cintra, Josep Torrellas	Excel-NUMA: Toward Programmability, Simplicity, and High Performance.	IEEE Trans. Computers	1999	DBLP DOI BibTeX RDF	NUMA organizations, performance evaluation, caches, Shared-memory multiprocessors, cache-coherence protocols
2	Peiyi Tang, Yoichi Muraoka	Parallel Programming with Interacting Processes.	LCPC	1999	DBLP DOI BibTeX RDF	Maximum Parallelism, Modular Programming, Parallel Programming, Programming Models, Programmability, Multiparty Interactions, Interacting Processes
2	Wei Liang Huang, Fred J. Meyer, Fabrizio Lombardi	Multiple fault detection in logic resources of FPGAs. (PDF / PS)	DFT	1997	DBLP DOI BibTeX RDF	logic resources, AND tree, OR tree, CLB test generation, field programmable gate arrays, fault model, configurability, testability, programmability, multiple fault detection, SRAM-based FPGA
2	Thomas H. Einstein	Mercury Computer Systems' modular heterogeneous RACE(R) multicomputer.	Heterogeneous Computing Workshop	1997	DBLP DOI BibTeX RDF	Mercury Computer Systems, modular heterogeneous RACE multicomputer, heterogeneous multicomputer, Analog Devices, SHARC 21060, Apple PowerPC 603p, optimal processor, physical processing density, heterogeneity, distributed memory systems, programmability, IBM, hardware cost, Motorola
2	Andrew Wolfe, Jason Fritts, Santanu Dutta, Edil S. Tavares Fernandes	Datapath Design for a VLIW Video Signal Processor.	HPCA	1997	DBLP DOI BibTeX RDF	datapath design, VLIW video signal processor, very long instruction word, high parallelism, high-level language programmability, high-bandwidth interconnect, high-connectivity register files, parameterizable versions, VLSI, video signal processing, VLIW architectures, compiler design
2	Wolfgang K. Giloi, Ulrich Brüning, Wolfgang Schröder-Preikschat	MANNA: Prototype of a Distributed Memory Architecture with Maximized Sustained Performance.	PDP	1996	DBLP DOI BibTeX RDF	maximized sustained performance, compiler problem, innovative architectural solutions, overlapping communication, MANNA computer, benchmark performance, performance evaluation, parallel computers, operating system, parallel machines, distributed memory systems, parallelizing compilers, operating systems (computers), programmability, virtual storage, parallelising compilers, latency hiding, distributed memory parallel computer, distributed memory architecture, virtual shared memory, global address space, superscalar microprocessors
2	Wei Zhao, Christos A. Papachristou	Architectural partitioning of control memory for application specific programmable processors.	ICCAD	1995	DBLP DOI BibTeX RDF	application specific programmable processors, control memory, distributed microcode memory model, microcode memory, repetitive microcodes, distributed memory systems, memory architecture, programmability, microprogram, datapaths, firmware, memory module
2	Santhosh Kumaran, Michael J. Quinn	Divide-and-conquer programming on MIMD computers. (PDF / PS)	IPPS	1995	DBLP DOI BibTeX RDF	divide-and-conquer programming, MIMD computers, programming template, parallel divide and conquer function, tridiagonal systems of equations, performance, parallel algorithms, parallel algorithm, parallel programming, parallel machines, problem solving, shared memory multiprocessor, multicomputer, programmability, divide and conquer methods, divide and conquer algorithms
2	Prashanth B. Bhat, Young Won Lim, Viktor K. Prasanna	Issues in using heterogeneous HPC systems for embedded real time signal processing applications.	RTCSA	1995	DBLP DOI BibTeX RDF	heterogeneous high performance computing systems, embedded real time signal processing applications, custom VLSI, limited programmability, technological advances, Scalable Heterogeneous High Performance Embedded systems, hardware technology, processing element architecture, radar signal processing problem, performance evaluation, real-time systems, operating system, timing, signal processing, software portability, software portability, communication libraries, radar signal processing
2	Santanu Chattopadhyay, Samir Roy, Parimal Pal Chaudhuri	Technology mapping on a multi-output logic module built around Cellular Automata Array for a new FPGA architecture.	VLSI Design	1995	DBLP DOI BibTeX RDF	multi-output logic module, cellular automata array, design turn-around time, field programmability, rapid circuit realization, logic blocks, AND-XOR based logic, library based technology mapping technique, MCNC benchmarks, field programmable gate arrays, VLSI, cellular automata, logic CAD, testability, technology mapping, multivalued logic circuits, FPGA architecture
2	Jean-Luc Gaudiot, Andrew Sohn	Data-Driven Parallel Production Systems.	IEEE Trans. Software Eng.	1990	DBLP DOI BibTeX RDF	parallel production systems, data-flow principles, high programmability, data-driven principles, RETE match algorithm, actor set, program graph design, tagged data-flow computer, deterministic simulation, artificial intelligence production systems, parallel programming, parallel architectures, expert systems, symbolic computations, symbol manipulation, multiprocessor architecture, numerical computations, multiprocessor environment, data-driven architectures
1	Carolina Mora Lopez, Dimiter Prodanov, Dries Braeken, Ivan Gligorijevic, Wolfgang Eberle, Carmen Bartic, Robert Puers, Georges G. E. Gielen	A Multichannel Integrated Circuit for Electrical Recording of Neural Activity, With Independent Channel Programmability.	IEEE Trans. Biomed. Circuits and Systems	2012	DBLP DOI BibTeX RDF
1	Yi-Da Wu, Kok-Choon Cheng, Chih-Cheng Lu, Hsin Chen	Embedded Analog Nonvolatile Memory With Bidirectional and Linear Programmability.	IEEE Trans. on Circuits and Systems	2012	DBLP DOI BibTeX RDF
1	Christoph W. Kessler, Usman Dastgeer, Samuel Thibault, Raymond Namyst, Andrew Richards, Uwe Dolinsky, Siegfried Benkner, Jesper Larsson Träff, Sabri Pllana	Programmability and performance portability aspects of heterogeneous multi-/manycore systems.	DATE	2012	DBLP BibTeX RDF
1	Andrew Stone, John Dennis, Michelle Strout	Establishing a Miniapp as a programmability proxy.	PPOPP	2012	DBLP DOI BibTeX RDF
1	Agnese Grasselli, Alessandro Vangelista, Stefano Bolli	The Usability Evaluation and the Programmability Assessment of Migration.	Migratory Interactive Applications for Ubiquitous Environments	2011	DBLP DOI BibTeX RDF
1	Bill Dally	Power, programmability, and granularity: The challenges of ExaScale computing.	ITC	2011	DBLP DOI BibTeX RDF
1	Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, Krste Asanovic	Exploring the tradeoffs between programmability and efficiency in data-parallel accelerators.	ISCA	2011	DBLP DOI BibTeX RDF
1	Bill Dally	Power, Programmability, and Granularity: The Challenges of ExaScale Computing.	IPDPS	2011	DBLP DOI BibTeX RDF
1	Francesca Palumbo, Danilo Pani, Andrea Deidda, Luigi Raffo	Towards self-adaptive networks on chip for massively parallel processors: multilevel quality of service programmability.	Conf. Computing Frontiers	2011	DBLP DOI BibTeX RDF
1	Shyyunn Sheran Lin, Gregory S. Thompson, Viren Malaviya	Embedded approach for device inventory collection utilizing OS programmability.	Integrated Network Management	2011	DBLP DOI BibTeX RDF
1	Aymen Fradi, Michael Nicolaidis, Lorena Anghel	Memory BIST with address programmability.	IOLTS	2011	DBLP DOI BibTeX RDF
1	Albrecht Schmidt	Engineering interactive ubiquitous computing systems.	EICS	2011	DBLP DOI BibTeX RDF
1		In the Virtual Extension.	Commun. ACM	2011	DBLP DOI BibTeX RDF
1		UX design and agile: a natural fit? (Talking with Julian Gosper, Jean-Luc Agathos, Richard Rutter, and Terry Coatta).	Commun. ACM	2011	DBLP DOI BibTeX RDF
1		To change the world, take a chance.	Commun. ACM	2011	DBLP DOI BibTeX RDF
1	Kunle Olukotun	Chip multiprocessor architecture: A programmability-driven approach.	IPDPS	2010	DBLP DOI BibTeX RDF
1	Junaed Sattar, Anqi Xu, Gregory Dudek, Gabriel Charette	Graphical state-space programmability as a natural interface for robotic control.	ICRA	2010	DBLP DOI BibTeX RDF
1	Eric Rosenbaum, Evelyn Eastmond, David Mellis	Empowering programmability for tangibles.	Tangible and Embedded Interaction	2010	DBLP DOI BibTeX RDF	empowerment, scratch, graphical programming, arduino
1	Marc Fischlin, Anja Lehmann, Thomas Ristenpart, Thomas Shrimpton, Martijn Stam, Stefano Tessaro	Random Oracles with(out) Programmability.	ASIACRYPT	2010	DBLP DOI BibTeX RDF
1	James Psota, Jason E. Miller, George Kurian, Henry Hoffmann, Nathan Beckmann, Jonathan Eastep, Anant Agarwal	ATAC: Improving performance and programmability with on-chip optical networks.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Dong Hyuk Woo, Hsien-Hsin S. Lee	COMPASS: a programmable data prefetcher using idle GPU shaders.	ASPLOS	2010	DBLP DOI BibTeX RDF	compute shader, GPU, prefetch
1	Yibo Chen, Jishen Zhao, Yuan Xie	3D-nonFAR: three-dimensional non-volatile FPGA architecture using phase change memory.	ISLPED	2010	DBLP DOI BibTeX RDF	non-volatile FPGA, phase-change memory, 3D IC
1	Tilak Agerwala	Exascale computing: the challenges and opportunities in the next decade.	PPOPP	2010	DBLP DOI BibTeX RDF	architecture, challenges, exascale
1	Sandya Mannarswamy, Dhruva R. Chakrabarti, Kaushik Rajan, Sujoy Saraswati	Compiler aided selective lock assignment for improving the performance of software transactional memory.	PPOPP	2010	DBLP DOI BibTeX RDF	performance, parallelization, compilers, multithreading
1	Fang Liu, Meng-Cheng Huang, Xuehui Liu, Enhua Wu	FreePipe: a programmable parallel rendering architecture for efficient multi-fragment effects.	SI3D	2010	DBLP DOI BibTeX RDF	depth peeling, multi-fragment effects, order-independent transparency, programmable graphics pipeline, graphics hardware, compute unified device architecture (CUDA), rasterizer, atomic operation
1	Rafael P. Torchelsen, Luiz F. Scheidegger, Guilherme N. Oliveira, Rui Bastos, João Luiz Dihl Comba	Real-time multi-agent path planning on arbitrary surfaces.	SI3D	2010	DBLP DOI BibTeX RDF	games, path planning, CUDA, geodesic distances
1	Muhammad Bilal Anwer, Murtaza Motiwala, Muhammad Mukarram Bin Tariq, Nick Feamster	SwitchBlade: a platform for rapid deployment of network protocols on programmable hardware.	SIGCOMM	2010	DBLP DOI BibTeX RDF	network virtualization, NetFPGA
1	Rishan Chen, Xuetian Weng, Bingsheng He, Mao Yang	Large graph processing in the cloud.	SIGMOD Conference	2010	DBLP DOI BibTeX RDF	graph processing, distributed systems, mapreduce, propagation
1	William R. Marczak, Shan Shan Huang, Martin Bravenboer, Micah Sherr, Boon Thau Loo, Molham Aref	SecureBlox: customizable secure distributed data processing.	SIGMOD Conference	2010	DBLP DOI BibTeX RDF	secure data management, datalog, distributed query processing
1	Michael Benedikt, Daniela Florescu, Philippa Gardner, Giovanna Guerrini, Marco Mesiti, Emmanuel Waller	Report on the EDBT/ICDT 2010 workshop on updates in XML.	SIGMOD Record	2010	DBLP DOI BibTeX RDF
1	Balázs Gergely Soós, Ádám Rák, József Veres, György Cserey	GPU Boosted CNN Simulator Library for Graphical Flow-Based Programmability.	EURASIP J. Adv. Sig. Proc.	2009	DBLP DOI BibTeX RDF
1	Josep Torrellas, Luis Ceze, James Tuck, Calin Cascaval, Pablo Montesinos, Wonsun Ahn, Milos Prvulovic	The Bulk Multicore architecture for improved programmability.	Commun. ACM	2009	DBLP DOI BibTeX RDF
1	Barbara M. Chapman, Jesús Labarta, Vivek Sarkar, Mitsuhisa Sato	Programmability Issues.	IJHPCA	2009	DBLP DOI BibTeX RDF
1	Sergey Melnik	The Frontiers of Data Programmability.	BTW	2009	DBLP BibTeX RDF
1	Joel Sommers, Paul Barford, Mark Crovella	Router primitives for programmable active measurement.	PRESTO	2009	DBLP DOI BibTeX RDF	programmable measurement, router programmability, active measurement
1	Mihai Dobrescu, Norbert Egi, Katerina J. Argyraki, Byung-Gon Chun, Kevin R. Fall, Gianluca Iannaccone, Allan Knies, Maziar Manesh, Sylvia Ratnasamy	RouteBricks: exploiting parallelism to scale software routers.	SOSP	2009	DBLP DOI BibTeX RDF	software router, parallelism, multicore, programmability
1	Maik Hadorn, Bo Burla, Peter Eggenberger Hotz	Towards Tailored Communication Networks in Assemblies of Artificial Cells.	ACAL	2009	DBLP DOI BibTeX RDF	Living Technology, glycerophospholipids, vesicles, multivesicular aggregates, adhesion plaque, programmability, phase transition, self-assembly
1	Maik Hadorn, Peter Eggenberger Hotz	Multivesicular Assemblies as Real-World Testbeds for Embryogenic Evolutionary Systems.	ACAL	2009	DBLP DOI BibTeX RDF	Embryogenic evolution, real-world testbed, vesicles, hard sphere colloids, DNA, programmability, self-assembly
1	Mohit Tiwari, Hassan M. G. Wassel, Bita Mazloom, Shashidhar Mysore, Frederic T. Chong, Timothy Sherwood	Complete information flow tracking from the gates up.	ASPLOS	2009	DBLP DOI BibTeX RDF	provably sound, gate level, information flow tracking
1	Yongjun Park, Hyunchul Park, Scott A. Mahlke	CGRA express: accelerating execution using dynamic operation fusion.	CASES	2009	DBLP DOI BibTeX RDF	latency-constrained, subgraph accelerator, modulo scheduling, coarse-grained reconfigurable architecture
1	Ronny Ronen	Larrabee: a many-core Intel architecture for visual computing.	Conf. Computing Frontiers	2009	DBLP DOI BibTeX RDF	graphics architecture, many-core computing, parrallel processing, processor arechitecture, software rendering
1	Chengmo Yang, Mingjing Chen, Alex Orailoglu	Squashing microcode stores to size in embedded systems while delivering rapid microcode accesses.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	microcode compression, microcoded processors
1	Rob van Nieuwpoort, John W. Romein	Using many-core hardware to correlate radio astronomy signals.	ICS	2009	DBLP DOI BibTeX RDF	lofar, correlator, many-core
1	Mark Woh, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner	AnySP: anytime anywhere anyway signal processing.	ISCA	2009	DBLP DOI BibTeX RDF	fully programmable architecture, high-end signal processing, single-instruction multiple-data parallelism, software defined radio, low-power architecture, simd
1	Yuwen Sun, Shimeng Huang, Joseph Oresko, John Krais, Allen C. Cheng	A programmable implementation of neural signal processing on a smartdust for brain-computer interfaces.	ISLPED	2009	DBLP DOI BibTeX RDF	brain-implantable computing, smartdust, brain-computer interface, tinyOS, DVFS
1	Taewook Oh, Bernhard Egger, Hyunchul Park, Scott A. Mahlke	Recurrence cycle aware modulo scheduling for coarse-grained reconfigurable architectures.	LCTES	2009	DBLP DOI BibTeX RDF	software pipelining, placement and routing, coarse-grained reconfigurable architectures
1	Sangyeun Cho, Hyunjin Lee	Flip-N-Write: a simple deterministic technique to improve PRAM write performance, energy and endurance.	MICRO	2009	DBLP DOI BibTeX RDF	memory write performance, phase-change memory
1	Hyunchul Park, Yongjun Park, Scott A. Mahlke	Polymorphic pipeline array: a flexible multicore accelerator with virtualized execution for mobile multimedia applications.	MICRO	2009	DBLP DOI BibTeX RDF	programmable accelerator, virtualization, software pipelining
1	Nick McKeown	Software defined mobile networks.	MobiHoc	2009	DBLP DOI BibTeX RDF	systems
1	Cesare Pautasso, Stefan Tai, E. Michael Maximilien	Third international workshop on web APIs and services Mashups (Mashups'09).	OOPSLA Companion	2009	DBLP DOI BibTeX RDF	web 2.0, web service composition, mashups, REST, end-user software engineering, web application programming interfaces
1	Sarita V. Adve	Memory models: a case for rethinking parallel languages and hardware.	PODC	2009	DBLP DOI BibTeX RDF	safe programming, memory models, multicore architecture, memory consistency models
1	Seyong Lee, Seung-Jai Min, Rudolf Eigenmann	OpenMP to GPGPU: a compiler framework for automatic translation and optimization.	PPOPP	2009	DBLP DOI BibTeX RDF	openmp, compiler optimization, gpu, cuda, automatic translation
1	Gregorio Quintana-Ortí, Francisco D. Igual, Enrique S. Quintana-Ortí, Robert A. van de Geijn	Solving dense linear systems on platforms with multiple hardware accelerators.	PPOPP	2009	DBLP DOI BibTeX RDF	algorithms-by-blocks, depencency analysis, dynamic scheduling, out-of-order execution, gpus
1	Scott Schneider, Jae-Seung Yeom, Benjamin Rose, John C. Linford, Adrian Sandu, Dimitrios S. Nikolopoulos	A comparison of programming models for multiprocessors with explicitly managed memory hierarchies.	PPOPP	2009	DBLP DOI BibTeX RDF	explicitly managed memory hierarchies, programming models, cell be
1	Francine Berman	Kennedy award: Laying the groundwork for success in the information age.	SC	2009	DBLP DOI BibTeX RDF
1	Xu Chen, Yun Mao, Zhuoqing Morley Mao, Jacobus E. van der Merwe	DECOR: DEClaritive network management and OpeRation.	PRESTO	2009	DBLP DOI BibTeX RDF	network management, declarative language
1	Bruce S. Davie, Jan Medved	A programmable overlay router for service provider innovation.	PRESTO	2009	DBLP DOI BibTeX RDF	end-to-end argument, overlays, programmable routers
1	Sarita V. Adve	Memory models: a case for rethinking parallel languages and hardware.	SPAA	2009	DBLP DOI BibTeX RDF	safe programming, memory models, multicore architecture, memory consistency models
1	Ghislain Fourny, Markus Pilman, Daniela Florescu, Donald Kossmann, Tim Kraska, Darin McBeath	XQuery in the browser.	WWW	2009	DBLP DOI BibTeX RDF	client-side programming, XML, HTML, events, XQuery, javascript, browser, script, scripting, dom, CSS, mash-up, XHTML, stylesheets
1	Shuo Wang, Jianwei Dai, El-Sayed Hasaneen, Lei Wang 0003, Faquir Jain	Utilizing quantum dot transistors with programmable threshold voltages for low-power mobile computing.	JETC	2009	DBLP DOI BibTeX RDF	threshold voltage and quantum dot transistor, Low power
1	Gregorio Quintana-Ortí, Enrique S. Quintana-Ortí, Robert A. van de Geijn, Field G. Van Zee, Ernie Chan	Programming matrix algorithms-by-blocks for thread-level parallelism.	ACM Trans. Math. Softw.	2009	DBLP DOI BibTeX RDF	high-performance, libraries, Linear algebra, multithreaded architectures
1	Mihaela Malita, Gheorghe Stefan	Integral Parallel Architecture & Berkeley's Motifs.	ASAP	2009	DBLP DOI BibTeX RDF
1	Lucas Vespa, Mini Mathew, Ning Weng	P3FSM: Portable Predictive Pattern Matching Finite State Machine.	ASAP	2009	DBLP DOI BibTeX RDF
1	Gang Chen, Guobo Li, Songwen Pei, Baifeng Wu	GPGPU supported cooperative acceleration in molecular dynamics.	CSCWD	2009	DBLP DOI BibTeX RDF
1	Kevin Fan, Manjunath Kudlur, Ganesh S. Dasika, Scott A. Mahlke	Bridging the computation gap between programmable processors and hardwired accelerators.	HPCA	2009	DBLP DOI BibTeX RDF
1	Justin Y. Shi	Decoupling as a Foundation for Large Scale Parallel Computing.	HPCC	2009	DBLP DOI BibTeX RDF
1	Hassan Shojania, Baochun Li	Pushing the Envelope: Extreme Network Coding on the GPU.	ICDCS	2009	DBLP DOI BibTeX RDF
1	Nadathur Satish, Mark Harris, Michael Garland	Designing efficient sorting algorithms for manycore GPUs.	IPDPS	2009	DBLP DOI BibTeX RDF
1	Oreste Villa, Daniel G. Chavarría-Miranda, Kristyn J. Maschhoff	Input-independent, scalable and fast string matching on the Cray XMT.	IPDPS	2009	DBLP DOI BibTeX RDF
1	Ronen Vaisenberg	Exploiting Semantics for Event Detection Systems.	PerCom	2009	DBLP DOI BibTeX RDF
1	Han Wan, Xiaopeng Gao, Xiang Long, Zhiqiang Wang	GCSim: A GPU-Based Trace-Driven Simulator for Multi-level Cache.	APPT	2009	DBLP DOI BibTeX RDF	parallel algorithms, caches, GPGPU, CUDA, trace-driven simulation
1	Rainer Buchty, David Kramer, Mario Kicherer, Wolfgang Karl	A Light-Weight Approach to Dynamical Runtime Linking Supporting Heterogenous, Parallel, and Reconfigurable Architectures.	ARCS	2009	DBLP DOI BibTeX RDF