Search results for "repeaters"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Maged Ghoneima, Yehea I. Ismail	Optimum positioning of interleaved repeaters In bidirectional buses.	DAC	2003	DBLP DOI BibTeX RDF	delay, interconnect, noise, repeaters, buses
3	Larry R. Dennison, William J. Dally, Thucydides Xanthopoulos	Low-latency plesiochronous data retiming.	ARVLSI	1995	DBLP DOI BibTeX RDF	telecommunication signalling, data retiming, plesiochronous data, support circuitry, undirectional signalling, timing, latency, communication networks, routers, telecommunication network routing, repeaters, repeaters, bridges, hubs
2	Paramvir Bahl, Ranveer Chandra, Patrick P. C. Lee, Vishal Misra, Jitendra Padhye, Dan Rubenstein, Yan Yu	Opportunistic use of client repeaters to improve performance of WLANs.	IEEE/ACM Trans. Netw.	2009	DBLP DOI BibTeX RDF	rate anomaly, wireless, IEEE 802.11
2	Rodney Van Meter, Thaddeus D. Ladd, W. J. Munro, Kae Nemoto	System design for a long-line quantum repeater.	IEEE/ACM Trans. Netw.	2009	DBLP DOI BibTeX RDF	purification, quantum networking, quantum repeaters, resource scheduling, quantum information
2	Qingli Zhang, Jinxiang Wang, Yizheng Ye	Delay and Energy Efficient Design of On-Chip Encoded Bus with Repeaters.	VLSI Design	2008	DBLP DOI BibTeX RDF
2	Paramvir Bahl, Ranveer Chandra, Patrick P. C. Lee, Vishal Misra, Jitendra Padhye, Dan Rubenstein, Yan Yu	Opportunistic use of client repeaters to improve performance of WLANs.	CoNEXT	2008	DBLP DOI BibTeX RDF
2	Miao Qingyu, Afif Osseiran	Performance Comparison Between DF relay and RF Repeaters in the Cellular System.	VTC Spring	2008	DBLP DOI BibTeX RDF
2	Arkadiy Morgenshtein, Eby G. Friedman, Ran Ginosar, Avinoam Kolodny	Timing optimization in logic with interconnect.	SLIP	2008	DBLP DOI BibTeX RDF	interconnect, logic circuits, timing optimization, repeaters, logical effort
2	Mario García-Lozano, Luis Alonso 0001, Fernando J. Casadevall, Silvia Ruiz-Boque, Luis M. Correia	Enhanced Analysis of WCDMA Networks with Repeaters Deployment.	IEEE Transactions on Wireless Communications	2007	DBLP DOI BibTeX RDF
2	Karim M. Nasr, John Cosmas, Maurice Bard, Jeff Gledhill	An Echo Canceller for DVB-T/H On-Channel Repeaters.	VTC Spring	2007	DBLP DOI BibTeX RDF
2	Prashant Saxena	On controlling perturbation due to repeaters during quadratic placement.	IEEE Trans. on CAD of Integrated Circuits and Systems	2006	DBLP DOI BibTeX RDF
2	Michael Moreinis, Arkadiy Morgenshtein, Israel A. Wagner, Avinoam Kolodny	Logic Gates as Repeaters (LGR) for Area-Efficient Timing Optimization.	IEEE Trans. VLSI Syst.	2006	DBLP DOI BibTeX RDF
2	Guoqing Chen, Eby G. Friedman	Low-power repeaters driving RC and RLC interconnects with delay and bandwidth constraints.	IEEE Trans. VLSI Syst.	2006	DBLP DOI BibTeX RDF
2	Roshan Weerasekera, Dinesh Pamunuwa, Li-Rong Zheng, Hannu Tenhunen	Minimal-power, delay-balanced smart repeaters for interconnects in the nanometer regime.	SLIP	2006	DBLP DOI BibTeX RDF	delay-balanced, minimal-power, interconnects, repeaters
2	Pathma Rathinavelu, Gottfried Schapeler, Andreas Weber 0003	UMTS Coverage and Capacity Enhancement Using Repeaters and Remote RF Heads.	AINA	2006	DBLP DOI BibTeX RDF	UMTS network, coverage and capacity enhancement, remote RF head, repeater
2	Mario García-Lozano, Luis Alonso 0001, Fernando J. Casadevall, Silvia Ruiz-Boque, Luis M. Correia	On the Impact of Repeaters Deployment on WCDMA, Networks Planning.	VTC Spring	2006	DBLP DOI BibTeX RDF
2	Mohammad N. Patwary, Predrag B. Rapajic, Ian Oppermann	Capacity and coverage increase with repeaters in UMTS urban cellular mobile communication environment.	IEEE Transactions on Communications	2005	DBLP DOI BibTeX RDF
2	Maged Ghoneima, Yehea I. Ismail	Optimum positioning of interleaved repeaters in bidirectional buses.	IEEE Trans. on CAD of Integrated Circuits and Systems	2005	DBLP DOI BibTeX RDF
2	Yehea I. Ismail, Muhammad M. Khellah, Maged Ghoneima, James Tschanz, Yibin Ye, Vivek De	Skewing adjacent line repeaters to reduce the delay and energy dissipation of on-chip buses.	ISCAS	2005	DBLP DOI BibTeX RDF
2	Guoqing Chen, Eby G. Friedman	Low power repeaters driving RLC interconnects with delay and bandwidth constraints.	ISCAS	2005	DBLP DOI BibTeX RDF
2	Arkadiy Morgenshtein, Israel Cidon, Ran Ginosar, Avinoam Kolodny	Low-leakage repeaters for NoC interconnects.	ISCAS	2005	DBLP DOI BibTeX RDF
2	Ron Ho	High-performance ULSI: the real limiter to interconnect scaling.	SLIP	2005	DBLP DOI BibTeX RDF	VLSI, wireless, 3D, scaling, proximity, repeaters, wires
2	Prashant Saxena, Bill Halpin	Modeling repeaters explicitly within analytical placement.	DAC	2004	DBLP DOI BibTeX RDF	interconnect, placement, scaling, buffering, repeater insertion, force-directed placement, analytical placement
2	Saumil Shah, Kanak Agarwal, Dennis Sylvester	A New Threshold Voltage Assignment Scheme for Runtime Leakage Reduction in On-Chip Repeaters.	ICCD	2004	DBLP DOI BibTeX RDF
2	Rahul M. Rao, Kanak Agarwal, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka, Sani R. Nassif	Approaches to run-time and standby mode leakage reduction in global buses.	ISLPED	2004	DBLP DOI BibTeX RDF	pulsed buses, leakage, repeaters, MTCMOS
2	Magdy A. El-Moursy, Eby G. Friedman	Optimum wire sizing of RLC interconnect with repeaters.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	power delay product, transient power dissipation, propagation delay, repeater insertion, wire sizing, RLC interconnect
2	Prashant Saxena, Noel Menezes, Pasquale Cocchini, Desmond Kirkpatrick	The scaling challenge: can correct-by-construction design help?	ISPD	2003	DBLP DOI BibTeX RDF	clocked repeaters, correct-by-construction design, design fabrics, post-RTL design, routing, interconnect, placement, logic synthesis, scaling, technology mapping, repeaters
2	Ankireddy Nalamalpu, Sriram Srinivasan, Wayne P. Burleson	Boosters for driving long onchip interconnects - design issues, interconnect synthesis, and comparison with repeaters.	IEEE Trans. on CAD of Integrated Circuits and Systems	2002	DBLP DOI BibTeX RDF
2	Pawan Kapur, Gaurav Chandra, Krishna Saraswat	Power estimation in global interconnects and its reduction using a novel repeater optimization methodology.	DAC	2002	DBLP DOI BibTeX RDF	repeaters, power dissipation, global interconnects
2	Ankireddy Nalamalpu, Wayne Burleson	Boosters for driving long on-chip interconnects: design issues, interconnect synthesis and comparison with repeaters.	ISPD	2001	DBLP DOI BibTeX RDF	methodology, timing, interconnect, buffering
2	Sudhakar Bobba, Ibrahim N. Hajj	High-performance bidirectional repeaters.	ACM Great Lakes Symposium on VLSI	2000	DBLP DOI BibTeX RDF
2	Jatan C. Shah, Sachin S. Sapatnekar	Wiresizing with Buffer Placement and Sizing for Power-Delay Tradeoffs.	VLSI Design	1996	DBLP DOI BibTeX RDF	power-delay tradeoffs, dynamic programming, Interconnect, sensitivity, buffer, sizing, repeaters, drivers
1	Yingchieh Ho, Chauchin Su	A 0.1-0.3 V 40-123 fJ/bit/ch On-Chip Data Link With ISI-Suppressed Bootstrapped Repeaters.	J. Solid-State Circuits	2012	DBLP DOI BibTeX RDF
1	Juan Carlos García-Escartín, Pedro Chamorro-Posada	Repeaters in relativistic communications	CoRR	2011	DBLP BibTeX RDF
1	Monica Figueiredo, Rui L. Aguiar	Dynamic jitter accumulation in clock repeaters considering power and ground noise correlations.	ISCAS	2011	DBLP DOI BibTeX RDF
1	Pham Thanh Hiep, Ryuji Kohno	Optimizing Position of Repeaters in Distributed MIMO Repeater System for Large Capacity.	IEICE Transactions	2010	DBLP BibTeX RDF
1	Panu Lähdekorpi, Tero Isotalo, Sultan Usama Khan, Jukka Lempiäinen	Implementation aspects of RF-repeaters in cellular networks.	PIMRC	2010	DBLP DOI BibTeX RDF
1	Arnab Chakrabarti, Christopher Lott, Donna Ghosh, Rashid Attar	Repeaters and Remote Radioheads in EVDO Networks.	VTC Fall	2010	DBLP DOI BibTeX RDF
1	Mikael Coldrey, Patrik Persson, Tommy Hult, Andreas Wolfgang	Higher Order MIMO Outdoor-to-Indoor Measurements Using Repeaters.	VTC Spring	2010	DBLP DOI BibTeX RDF
1	Basab Datta, Wayne Burleson	Analysis and mitigation of NBTI-impact on PVT variability in repeated global interconnect performance.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	tunable buffer, variability, NBTI, global-interconnect
1	Rupesh S. Shelar, Marek Patyra	Impact of local interconnects on timing and power in a high performance microprocessor.	ISPD	2010	DBLP DOI BibTeX RDF	CAD, delay, interconnects, power, microprocessor
1	Moohong Lee, Byungjik Keum, Young Serk Shim, Hwang Soo Lee	An Interference Cancellation Scheme for Mobile Communication Radio Repeaters.	IEICE Transactions	2009	DBLP BibTeX RDF
1	Sharath Jayaprakash, Nihar R. Mahapatra	Energy-Efficient Encoding for High-Performance Buses with Staggered Repeaters.	ISVLSI	2009	DBLP DOI BibTeX RDF
1	Taneli Riihonen, Katsuyuki Haneda, Stefan Werner, Risto Wichman	SINR analysis of full-duplex OFDM repeaters.	PIMRC	2009	DBLP DOI BibTeX RDF
1	Jiansong Gan, Qingyu Miao, Peter Larsson	Spatial Filter for MIMO Repeaters with First-Hop Channel State Information and End-to-End SNR.	VTC Fall	2009	DBLP DOI BibTeX RDF
1	Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri, Janet Meiling Wang	Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures.	ASP-DAC	2009	DBLP DOI BibTeX RDF
1	David S. Kung, Ruchir Puri	CAD challenges for 3D ICs.	ASP-DAC	2009	DBLP DOI BibTeX RDF
1	Christoph Bartoschek, Stephan Held, Dieter Rautenbach, Jens Vygen	Fast buffering for optimizing worst slack and resource consumption in repeater trees.	ISPD	2009	DBLP DOI BibTeX RDF	interconnect buffering, repeater tree, physical design, repeater insertion, timing closure
1	Jason Cong, Mau-Chung Frank Chang, Glenn Reinman, Sai-Wang Tam	Multiband RF-interconnect for reconfigurable network-on-chip communications.	SLIP	2009	DBLP DOI BibTeX RDF	fdma, morfic, rf-interconnect, network-on-chip, reconfigurable, chip multiprocessor
1	Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli	Repeater Insertion for Two-Terminal Nets in Three-Dimensional Integrated Circuits.	NanoNet	2009	DBLP DOI BibTeX RDF	timing optimization, on-chip interconnect, repeater insertion, 3-D ICs
1	Jan A. Bergstra, Alban Ponse	An Instruction Sequence Semigroup with Repeaters	CoRR	2008	DBLP BibTeX RDF
1	Roshan Weerasekera, Dinesh Pamunuwa, Li-Rong Zheng, Hannu Tenhunen	Minimal-Power, Delay-Balanced Smart Repeaters for Global Interconnects in the Nanometer Regime.	IEEE Trans. VLSI Syst.	2008	DBLP DOI BibTeX RDF
1	Nicola Concer, Michele Petracca, Luca P. Carloni	Distributed flit-buffer flow control for networks-on-chip.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	latency-insensitive protocols, network-on-chip
1	Mahendiran Prathaban, Joséphine Kohlenberg	Buffer Management Policy for Mars Intelligent Proximity Network.	Asia International Conference on Modelling and Simulation	2008	DBLP DOI BibTeX RDF	Intelligent Proximity Network, Bundle Protocol, Performance, Buffer Management
1	Johannes Fieres, Johannes Schemmel, Karlheinz Meier	Realizing biological spiking network models in a configurable wafer-scale hardware system.	IJCNN	2008	DBLP DOI BibTeX RDF
1	Yehea I. Ismail	Interconnect design and limitations in nanoscale technologies.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Himanshu Kaul, Jae-sun Seo, Mark Anders, Dennis Sylvester, Ram Krishnamurthy	A robust alternate repeater technique for high performance busses in the multi-core era.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Jingye Xu, Abinash Roy, Masud H. Chowdhury	Optimization technique for flip-flop inserted global interconnect.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Hiroki Matsutani, Michihiro Koibuchi, D. Frank Hsu, Hideharu Amano	Three-Dimensional Layout of On-Chip Tree-Based Networks.	ISPAN	2008	DBLP DOI BibTeX RDF	Fat H-Tree, Network-on-Chip, Fat Tree, 3-D IC
1	Yisheng Xue	Amplify-and-forward repeater enhanced random access in single-cell wireless communications.	PIMRC	2008	DBLP DOI BibTeX RDF
1	Charbel J. Akl, Magdy A. Bayoumi	Wiring-Area Efficient Simultaneous Bidirectional Point-to-Point Link for Inter-Block On-Chip Signaling.	VLSI Design	2008	DBLP DOI BibTeX RDF
1	Ronald Raulefs, Armin Dammann	Repeating or Relaying in Wireless Systems.	WCNC	2008	DBLP DOI BibTeX RDF
1	Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri	Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF
1	Daniele Rossi, André K. Nieuwland, Steven V. E. S. van Dijk, Richard P. Kleihorst, Cecilia Metra	Power Consumption of Fault Tolerant Busses.	IEEE Trans. VLSI Syst.	2008	DBLP DOI BibTeX RDF
1	Edmund Lee 0002, Guy Lemieux, Shahriar Mirabbasi	Interconnect Driver Design for Long Wires in Field-Programmable Gate Arrays.	Signal Processing Systems	2008	DBLP DOI BibTeX RDF	routing design, FPGA, computer-aided design, interconnect design, FPGA interconnect
1	Charbel J. Akl, Magdy A. Bayoumi	Reducing Delay Uncertainty of On-Chip Interconnects by Combining Inverting and Non-Inverting Repeaters Insertion.	ISQED	2007	DBLP DOI BibTeX RDF
1	Roshan Weerasekera, Dinesh Pamunuwa, Li-Rong Zheng, Hannu Tenhunen	Delay-Balanced Smart Repeaters for On-Chip Global Signaling.	VLSI Design	2007	DBLP DOI BibTeX RDF
1	Jae-sun Seo, Dennis Sylvester, David Blaauw, Himanshu Kaul, Ram Krishnamurthy	A robust edge encoding technique for energy-efficient multi-cycle interconnect.	ISLPED	2007	DBLP DOI BibTeX RDF	multi-cycle interconnect, interconnect, encoding, repeaters
1	Azad Naeemi, James D. Meindl	Carbon nanotube interconnects.	ISPD	2007	DBLP DOI BibTeX RDF	quantum wires, crosstalk, inductance, repeaters, molecular electronics, system analysis and design, system optimization
1	Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri	Design of adaptive communication channel buffers for low-power area-efficient network-on-chip architecture.	ANCS	2007	DBLP DOI BibTeX RDF	network-on-chip, low-power design
1	Jeonghwan Choi, Chen-Yong Cher, Hubertus Franke, Hendrik F. Hamann, Alan J. Weger, Pradip Bose	Thermal-aware task scheduling at the system software level.	ISLPED	2007	DBLP DOI BibTeX RDF	low-power design, repeater insertion, temperature-aware design
1	Ja Chun Ku, Yehea I. Ismail	Thermal-aware methodology for repeater insertion in low-power VLSI circuits.	ISLPED	2007	DBLP DOI BibTeX RDF	low-power design, repeater insertion, temperature-aware design
1	Salim Chowdhury, John Lillis	Repeater insertion for concurrent setup and hold time violations with power-delay trade-off.	ISPD	2007	DBLP DOI BibTeX RDF	early-mode timing, hold violation, late-mode timing, setup violation, timing optimization, repeater insertion
1	Charbel J. Akl, Magdy A. Bayoumi	Transition Skew Coding: A Power and Area Efficient Encoding Technique for Global On-Chip Interconnects.	ASP-DAC	2007	DBLP DOI BibTeX RDF	transition skew coding, global on-chip interconnects, bus encoding technique, encoding latencies, decoding latencies, 90 nm
1	Crescenzo D'Alessandro, Andrey Mokhov, Alexandre V. Bystrov, Alexandre Yakovlev	Delay/Phase Regeneration Circuits.	ASYNC	2007	DBLP DOI BibTeX RDF
1	Richard Primerano, Kevin Wanuga, Joseph Dorn, Moshe Kam, Kapil R. Dandekar	Echo-Cancellation for Ultrasonic Data Transmission through a Metal Channel.	CISS	2007	DBLP DOI BibTeX RDF
1	Kyungmi Park, Chung Gu Kang, Daeyoung Chang, Seungho Song, Jongguk Ahn, Jongtae Ihm	Relay-enhanced Cellular Performance of OFDMA-TDD System for Mobile Wireless Broadband Services.	ICCCN	2007	DBLP DOI BibTeX RDF
1	Ethiopia Nigussie, Juha Plosila, Jouni Isoaho	Current Mode On-Chip Interconnect using Level-Encoded Two-Phase Dual-Rail Encoding.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Jingye Xu, Abinash Roy, Masud H. Chowdhury	Power Consumption Analysis of Flip-flop Based Interconnect Pipelining.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Andrew B. Kahng, Sherief Reda, Puneet Sharma	On-Line Adjustable Buffering for Runtime Power Reduction.	ISQED	2007	DBLP DOI BibTeX RDF
1	Naveen Muralimanohar, Rajeev Balasubramonian, Norman P. Jouppi	Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0.	MICRO	2007	DBLP DOI BibTeX RDF	non-uniform cache archi- tectures (NUCA), on-chip intercon- nects, memory hierarchies, cache models
1	Shuming Chen, Xiangyuan Liu	A Low-Latency and Low-Power Hybrid Insertion Methodology for Global Interconnects in VDSM Designs.	NOCS	2007	DBLP DOI BibTeX RDF	differential-signaling, insertion methodology, on-chip interconnects, low-swing
1	Jakub Borkowski, Panu Lähdekorpi, Tero Isotalo, Jukka Lempiäinen	Optimization Aspects for Cellular Service Performance and Mobile Positioning in WCDMA Radio Networks.	VTC Spring	2007	DBLP DOI BibTeX RDF
1	Alexandru Andrei, Petru Eles, Zebo Peng, Marcus T. Schmitz, Bashir M. Al-Hashimi	Energy Optimization of Multiprocessor Systems on Chip by Voltage Selection.	IEEE Trans. VLSI Syst.	2007	DBLP DOI BibTeX RDF
1	Ajay Joshi, Gerald G. Lopez, Jeffrey A. Davis	Design and Optimization of On-Chip Interconnects Using Wave-Pipelined Multiplexed Routing.	IEEE Trans. VLSI Syst.	2007	DBLP DOI BibTeX RDF
1	Ja Chun Ku, Yehea I. Ismail	Thermal-Aware Methodology for Repeater Insertion in Low-Power VLSI Circuits.	IEEE Trans. VLSI Syst.	2007	DBLP DOI BibTeX RDF
1	Atul Maheshwari, Wayne Burleson	Current-Sensing and Repeater Hybrid Circuit Technique for On-Chip Interconnects.	IEEE Trans. VLSI Syst.	2007	DBLP DOI BibTeX RDF
1	Xiaodong Yang, Yong-Hua Song, Thomas J. Owens, John Cosmas, Takebumi Itagaki	Incorporating digital repeaters into the soft handover standard in digital video broadcasting for handhelds.	IJSS	2006	DBLP DOI BibTeX RDF
1	Tudor Murgan, Oliver Mitea, Sujan Pandey, Petru Bogdan Bacinschi, Manfred Glesner	Simultaneous Placement and Buffer Planning for Reduction of Power Consumption in Interconnects and Repeaters.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
1	Kimmo Hiltunen	Using RF Repeaters to Improve WCDMA HSDPA Coverage and Capacity Inside Buildings.	PIMRC	2006	DBLP DOI BibTeX RDF
1	Ferran Adelantado, Oriol Sallent, Jordi Pérez-Romero	On Deploying Repeaters in CDMA Systems for Traffic Hot-Spots: An Analytical Characterization.	PIMRC	2006	DBLP DOI BibTeX RDF
1	Pathma Rathinavelu, Gottfried Schapeler, Andreas Weber 0003	HSDPA Performance Enhancement Using Repeaters and Remote RF Heads.	PIMRC	2006	DBLP DOI BibTeX RDF
1	Kimmo Hiltunen	Using RF Repeaters to Improve WCDMA Speech Coverage and Capacity Inside Buildings.	VTC Fall	2006	DBLP DOI BibTeX RDF
1	Qingli Zhang, Jinxiang Wang, Yizheng Ye	An energy-efficient temporal encoding circuit technique for on-chip high performance buses.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	on-chip buses, energy-efficient, encoding, repeaters
1	Harmander Deogun, Robert M. Senger, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka	A dual-VDD boosted pulsed bus technique for low power and low leakage operation.	ISLPED	2006	DBLP DOI BibTeX RDF	pulsed bus, leakage, repeaters, Dual-VDD
1	Prashant Saxena	The scaling of interconnect buffer needs.	SLIP	2006	DBLP DOI BibTeX RDF	interconnect, scaling, buffers, repeaters
1	Yun Mao, Hani Jamjoom, Shu Tao	Failure diagnosis with incomplete information in cable networks.	CoNEXT	2006	DBLP DOI BibTeX RDF
1	W. T. Cheung, N. Wong	Power optimization in a repeater-inserted interconnect via geometric programming.	ISLPED	2006	DBLP DOI BibTeX RDF	optimization, interconnect, power, repeater, geometric programming
1	Lele Jiang, Junfa Mao	Global Interconnect Analysis and Optimization for Nanometer Scale VLSI.	APCCAS	2006	DBLP DOI BibTeX RDF
1	Chia-Chun Tsai, Jan-Ou Wu, Trong-Yen Lee, Rong-Shue Hsiao	Propagation Delay Minimization on RLC-Based Bus with Repeater Insertion.	APCCAS	2006	DBLP DOI BibTeX RDF