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Searching for phrase required-arrival-time Steiner trees (changed automatically) with no syntactic query expansion in all metadata.

Publication years (Num. hits)
1997 (2)
Publication types (Num. hits)
inproceedings(2)
Venues (Conferences, Journals, ...)
ICCAD(2)
Authors
Cheng-Kok Koh(2) Jason Cong(2) David Zhigang Pan(1) Kei-Yong Khoo(1) Lei He(1)
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Found 2 publication records. Showing 2 according to the selection in the facets
Hits ?▲ Authors Title Venue Year Link Author keywords
1Jason Cong, Cheng-Kok Koh Interconnect layout optimization under higher-order RLC model. Search on Bibsonomy ICCAD The full citation details ... 1997 DBLP  DOI  BibTeX  RDF RATS trees, Steiner routings, bounded-radius Steiner trees, higher-order RLC model, incremental moment computation algorithm, interconnect layout optimization, nonmonotone signal response, required-arrival-time Steiner trees, resistance-inductance-capacitance circuits, routing area, routing cost, routing topologies, shortest-path Steiner trees, signal delay, signal settling time, voltage overshoot, waveform optimization, waveform quality evaluation, wire-sizing optimization, circuit optimisation, topology optimization, delay optimization
1Jason Cong, David Zhigang Pan, Lei He, Cheng-Kok Koh, Kei-Yong Khoo Interconnect design for deep submicron ICs. Search on Bibsonomy ICCAD The full citation details ... 1997 DBLP  DOI  BibTeX  RDF required-arrival-time Steiner tree higher-order moment signal delay and integrity
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