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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 5 occurrences of 5 keywords
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Results
Found 6 publication records. Showing 6 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 2 | Leila Koushaeian, Stan Skafidas |
A 65nm CMOS low-power, low-voltage bandgapreference with using self-biased composite cascode opamp.  |
ISLPED  |
2010 |
DBLP DOI BibTeX RDF |
bandgap voltage reference, self-biased, self-cascode, temperature coefficient, voltage reference |
| 1 | Mohammad Rafiqul Haider, Syed Kamrul Islam |
Power-Efficient Body-Coupled Self-Cascode LC Oscillator for Low-Power Injection-Locked Transmitter Applications. |
ISVLSI |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Michael Trakimas, Sameer R. Sonkusale |
A 0.5V Bulk-Input Operational Transconductance Amplifier with Improved Common-Mode Feedback. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Fabrice Guigues, Edith Kussener, Benjamin Duval, Hervé Barthélemy |
Moderate Inversion: Highlights for Low Voltage Design. |
PATMOS |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Zhiyuan Li, Mingyan Yu, Jianguo Ma |
A Novel Input Stage Based on DTMOS for Low-Voltage Low-Noise Operational Amplifier. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Edgar Mauricio Camacho-Galeano, Carlos Galup-Montoro, Márcio C. Schneider |
An ultra-low-power self-biased current reference. |
SBCCI |
2004 |
DBLP DOI BibTeX RDF |
inversion level, self-cascode MOSFET, design methodology, low-voltage, ultra-low-power, current reference |
Displaying result #1 - #6 of 6 (100 per page; Change: )
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