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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 4 occurrences of 4 keywords
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Results
Found 4 publication records. Showing 4 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Wenlong Li, Eric Li, Aamer Jaleel, Jiulong Shan, Yurong Chen, Qigang Wang, Ravi R. Iyer, Ramesh Illikkal, Yimin Zhang, Dong Liu, Michael Liao, Wei Wei, Jinhua Du |
Understanding the Memory Performance of Data-Mining Workloads on Small, Medium, and Large-Scale CMPs Using Hardware-Software Co-simulation.  |
ISPASS  |
2007 |
DBLP DOI BibTeX RDF |
DRAM caches, small-scale CMP, medium-scale CMP, large-scale CMP, hardware-software co-simulation, terabyte-level workloads, multithreaded data mining applications, cache design, memory performance, multicore systems, memory system performance |
| 1 | Ravi R. Iyer, Mahesh Bhat, Li Zhao, Ramesh Illikkal, Srihari Makineni, Michael Jones, Kumar Shiv, Donald Newell |
Exploring Small-Scale and Large-Scale CMP Architectures for Commercial Java Servers.  |
IISWC  |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | John D. Davis, Stephen E. Richardson, Charis Charitsis, Kunle Olukotun |
A chip prototyping substrate: the flexible architecture for simulation and testing (FAST).  |
SIGARCH Computer Architecture News  |
2005 |
DBLP DOI BibTeX RDF |
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| 1 | Lisa R. Hsu, Ravishankar R. Iyer, Srihari Makineni, Steven K. Reinhardt, Donald Newell |
Exploring the cache design space for large scale CMPs.  |
SIGARCH Computer Architecture News  |
2005 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #4 of 4 (100 per page; Change: )
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