Search results for "software optimization"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Eric Cheung, Harry Hsieh, Felice Balarin	Software optimization for MPSoC: a mpeg-2 decoder case study.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	mpsoc, software optimization
3	Sungpack Hong, Sungjoo Yoo, Sheayun Lee, Sangwoo Lee, Hye Jeong Nam, Bum-Seok Yoo, Jaehyung Hwang, Donghyun Song, Janghwan Kim, Jeongeun Kim, HoonSang Jin, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo	Creation and utilization of a virtual platform for embedded software optimization: : an industrial case study.	CODES+ISSS	2006	DBLP DOI BibTeX RDF	embedded software optimization, hybrid HDD (hard disk drive), virtual platform (ViP)
2	Wonchul Lee, Hyojin Choi, Wonyong Sung	Algorithm and Software Optimization of Variable Block Size Motion Estimation for H.264/AVC on a VLIW-SIMD DSP.	Signal Processing Systems	2008	DBLP DOI BibTeX RDF	variable block size motion estimation, H.264/AVC encoder, VLIW (very long instruction word), SIMD (single instruction multiple data)
2	Armita Peymandoust, Tajana Simunic, Giovanni De Micheli	Low Power Embedded Software Optimization Using Symbolic Algebra.	DATE	2002	DBLP DOI BibTeX RDF
2	Fabrice Noilhan	Software Optimization of Decorrelation Module.	Selected Areas in Cryptography	1999	DBLP DOI BibTeX RDF
1	Adrian Alin Lifa, Petru Eles, Zebo Peng, Viacheslav Izosimov	Hardware/software optimization of error detection implementation for real-time embedded systems.	CODES+ISSS	2010	DBLP DOI BibTeX RDF
1	Victor W. Lee, Changkyu Kim, Jatin Chhugani, Michael Deisher, Daehyun Kim, Anthony D. Nguyen, Nadathur Satish, Mikhail Smelyanskiy, Srinivas Chennupaty, Per Hammarlund, Ronak Singhal, Pradeep Dubey	Debunking the 100X GPU vs. CPU myth: an evaluation of throughput computing on CPU and GPU.	ISCA	2010	DBLP DOI BibTeX RDF	cpu architecture, gpu architecture, throughput computing, performance analysis, performance measurement, software optimization
1	Matthias Grumer, Manuel Wendt, Christian Steger, Reinhold Weiss, Ulrich Neffe, Andreas Mühlberger	Power profile estimation and compiler-based software optimization for mobile devices.	J. Embedded Computing	2009	DBLP DOI BibTeX RDF
1	Meikang Qiu, Hao Li, Edwin Hsing-Mean Sha	Heterogeneous real-time embedded software optimization considering hardware platform.	SAC	2009	DBLP DOI BibTeX RDF	optimization, component, heterogeneous, embedded software
1	Guo-An Jian, Jui-Chin Chu, Jiun-In Guo	Optimization of AVS-M Video Decoder for Real-time Implementation on Embedded RISC Processors.	IIH-MSP	2009	DBLP DOI BibTeX RDF	software optimization
1	Guo-An Jian, Ting-Yu Huang, Jui-Chin Chu, Jiun-In Guo	Optimization of VC-1/H.264/AVS Video Decoders on Embedded Processors.	ITNG	2009	DBLP DOI BibTeX RDF	software optimization
1	Kenji R. Yamamoto, Paul G. Flikkema	Prospector: Multiscale Energy Measurement of Networked Embedded Systems with Wideband Power Signals.	CSE	2009	DBLP DOI BibTeX RDF
1	Ming-Yung Ko, Chung-Ching Shen, Shuvra S. Bhattacharyya	Memory-constrained Block Processing for DSP Software Optimization.	Signal Processing Systems	2008	DBLP DOI BibTeX RDF	block processing, block diagram compiler, activation overhead, embedded systems, memory management, vectorization, dataflow, context switch
1	Robert Kunz, Mark Horowitz	The case for simple, visible cache coherency.	MSPC	2008	DBLP DOI BibTeX RDF	SpecOMP2001, shared-memory multiprocessor, FLASH, coherence protocol, cc-NUMA, software optimization, performance bottlenecks
1	Kang Zhao, Jinian Bian, Sheqin Dong, Yang Song, Satoshi Goto	HyMacs: hybrid memory access optimization based on custom-instruction scheduling.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	asip, cad algorithm, hardware/software co-design
1	Manuel Wendt, Matthias Grumer, Christian Steger, Reinhold Weiss, Ulrich Neffe, Andreas Mühlberger	System level power profile analysis and optimization for smart cards and mobile devices.	SAC	2008	DBLP DOI BibTeX RDF	power profile optimization, system level power estimation, time discrete RF-interface model
1	ElMoustapha Ould-Ahmed-Vall, Kshitij A. Doshi, Charles Yount, James Woodlee	Characterization of SPEC CPU2006 and SPEC OMP2001: Regression Models and their Transferability.	ISPASS	2008	DBLP DOI BibTeX RDF
1	Luc Ceuppens, Alan Sardella, Daniel Kharitonov	Power Saving Strategies and Technologies in Network Equipment Opportunities and Challenges, Risk and Rewards.	SAINT	2008	DBLP DOI BibTeX RDF	network, power, routers, green
1	Luca Benini, Michele Lombardi, Marco Mantovani, Michela Milano, Martino Ruggiero	Multi-stage Benders Decomposition for Optimizing Multicore Architectures.	CPAIOR	2008	DBLP DOI BibTeX RDF
1	Luca Benini, Davide Bertozzi, Michela Milano	Resource Management Policy Handling Multiple Use-Cases in MPSoC Platforms Using Constraint Programming.	ICLP	2008	DBLP DOI BibTeX RDF
1	Aart J. C. Bik, David L. Kreitzer, Xinmin Tian	A Case Study on Compiler Optimizations for the Intel® CoreTM 2 Duo Processor.	International Journal of Parallel Programming	2008	DBLP DOI BibTeX RDF	Optimization, Parallelization, Compilers, Code generation, Vectorization
1	Matthias Grumer, Manuel Wendt, Christian Steger, Reinhold Weiss, Ulrich Neffe, Andreas Mühlberger	Automated Instruction Set Characterization and Power Profile Driven Software Optimization for Mobile Devices.	PATMOS	2007	DBLP DOI BibTeX RDF
1	Melina Demertzi, Pedro C. Diniz, Mary W. Hall, Anna C. Gilbert, Yi Wang	A Combined Hardware/Software Optimization Framework for Signal Representation and Recognition.	International Conference on Computational Science	2007	DBLP DOI BibTeX RDF
1	Jean Christophe Beyler, Philippe Clauss	Performance driven data cache prefetching in a dynamic software optimization system.	ICS	2007	DBLP DOI BibTeX RDF	binary instrumentation, data cache prefetching, dynamic optimization
1	Zhengzhang Chen, Bo Li, Feifei Zhou, Xiaoyuan Yang, Qian Wang, Yong Shi	The Study on Software Optimization Technology of Remote Sensing Image Compression System Based on DSP Platform.	MSA	2007	DBLP BibTeX RDF
1	Meeta Sharma Gupta, Krishna K. Rangan, Michael D. Smith, Gu-Yeon Wei, David Brooks	Towards a software approach to mitigate voltage emergencies.	ISLPED	2007	DBLP DOI BibTeX RDF	dynamic optimization framework, voltage emergencies, hardware-software codesign, di/dt
1	Dohun Kim, Jugwan Eom, Chanik Park	L4oprof: a performance-monitoring-unit-based software-profiling framework for the L4 microkernel.	Operating Systems Review	2007	DBLP DOI BibTeX RDF
1	Makoto Ishikawa, D. J. McCune, George Saikalis, Shigeru Oho	CPU Model-Based Hardware/Software Co-design, Co-simulation and Analysis Technology for Real-Time Embedded Control Systems.	IEEE Real-Time and Embedded Technology and Applications Symposium	2007	DBLP DOI BibTeX RDF
1	Flavio Bertini, D. Davide Lamanna, Roberto Baldoni	Virtual Distro Dispatcher: A Costless Distributed Virtual Environment from Trashware.	ISPA	2007	DBLP DOI BibTeX RDF	Trashware, LTSP, Clustering, Virtualization, User Mode Linux
1	Miguel Peón Quirós, Alexandros Bartzas, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris	Direct Memory Access Optimization in Wireless Terminals for Reduced Memory Latency and Energy Consumption.	PATMOS	2007	DBLP DOI BibTeX RDF
1	Zili Shao, Jiannong Cao, Keith C. C. Chan, Chun Xue, Edwin Hsing-Mean Sha	Hardware/software optimization for array & pointer boundary checking against buffer overflow attacks.	J. Parallel Distrib. Comput.	2006	DBLP DOI BibTeX RDF
1	Gerrit Saylor, Badriddine Khessib	Large scale Itanium® 2 processor OLTP workload characterization and optimization.	DaMoN	2006	DBLP DOI BibTeX RDF	cache coherency, data partitioning, performance characterization, profile guided optimization, OLTP, software optimization, Itanium, ccNUMA
1	Eric Li, Wenlong Li, Tao Wang, Nan Di, Carole Dulong, Yimin Zhang	Towards the Parallelization of Shot Detection - a Typical Video Mining Application Study.	ICPP	2006	DBLP DOI BibTeX RDF
1	Stephen Warrington, Hassan Shojania, Subramania Sudharsanan, Wai-Yip Chan	Performance improvement of the H.264/AVC deblocking filter using SIMD instructions.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Atanas Rountev, Scott Kagan, Thomas J. Marlowe	Interprocedural Dataflow Analysis in the Presence of Large Libraries.	CC	2006	DBLP DOI BibTeX RDF
1	Mitsuru Matsui	How Far Can We Go on the x64 Processors?	FSE	2006	DBLP DOI BibTeX RDF
1	Francesco Menichelli, Mauro Olivieri, Simone Smorfa, Irene Zaccardini	Software optimization of the JPEG2000 algorithm on a VLIW CPU core for system-on-chip implementation.	Circuits, Signals, and Systems	2005	DBLP BibTeX RDF
1	Kuan Jen Lin, Shih Hao Huang, Shih Wen Chen	A hardware/software codesign approach for programmable IO devices.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	hardware/software codesign, device driver, programmable controller, software optimization
1	Reza Azimi, Michael Stumm, Robert W. Wisniewski	Online performance analysis by statistical sampling of microprocessor performance counters.	ICS	2005	DBLP DOI BibTeX RDF
1	Hamid Safizadeh, Hamid Noori, Mehdi Sedighi, Ali Jahanian, Neda Zolfaghari	Efficient Host-Independent Coprocessor Architecture for Speech Coding Algorithms.	DSD	2005	DBLP DOI BibTeX RDF
1	G. Provost, Marc-André Cantin, Mohamad Sawan, Christian Cardinal, Yvon Savaria, David Haccoun	Fast parameters optimization of an iterative decoder using a configurable hardware accelerator.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Ann Gordon-Ross, Frank Vahid	Frequent Loop Detection Using Efficient Nonintrusive On-Chip Hardware.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	Frequent value profiling, runtime profiling, on-chip profiling, hardware profiling, frequent loop detection, hot spot detection, dynamic optimization
1	Massimo Ravasi, Marco Mattavelli	High-Abstraction Level Complexity Analysis and Memory Architecture Simulations of Multimedia Algorithms.	IEEE Trans. Circuits Syst. Video Techn.	2005	DBLP DOI BibTeX RDF
1	Mitsuru Matsui, Sayaka Fukuda	How to Maximize Software Performance of Symmetric Primitives on Pentium III and 4 Processors.	FSE	2005	DBLP DOI BibTeX RDF
1	Shuvra S. Bhattacharyya, Praveen K. Murthy	The CBP Parameter: A Module Characterization Approach for DSP Software Optimization.	VLSI Signal Processing	2004	DBLP DOI BibTeX RDF	array lifetime, block diagram compilers, buffer overlaying, lifetime analysis, embedded systems, design methodology, graph coloring, dataflow
1	Ozgur Celebican, Tajana Simunic Rosing, Vincent John Mooney III	Energy estimation of peripheral devices in embedded systems.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	audio, device drivers, energy estimation, software optimization
1	Satish Narayanasamy, Yuanfang Hu, Suleyman Sair, Brad Calder	Creating Converged Trace Schedules Using String Matching.	HPCA	2004	DBLP DOI BibTeX RDF
1	Gilles Pokam, François Bodin	An Offline Approach for Whole-Program Paths Analysis Using Suffix Arrays.	LCPC	2004	DBLP DOI BibTeX RDF
1	Meuse N. Oliveira Jr., Paulo Romero Martins Maciel, Raimundo S. Barreto, Fernando F. Carvalho	Towards a Software Power Cost Analysis Framework Using Colored Petri Net.	PATMOS	2004	DBLP DOI BibTeX RDF
1	Ann Gordon-Ross, Frank Vahid	Frequent loop detection using efficient non-intrusive on-chip hardware.	CASES	2003	DBLP DOI BibTeX RDF	frequent loop detection, frequent value profiling, hardware profiling, hot spot detection, on-chip profiling, runtime profiling, dynamic optimization
1	Greg Stitt, Roman L. Lysecky, Frank Vahid	Dynamic hardware/software partitioning: a first approach.	DAC	2003	DBLP DOI BibTeX RDF	self-improving chips, FPGA, embedded systems, synthesis, dynamic optimization, system-on-a-chip, platforms, codesign, hardware/software partitioning
1	Tat Kee Tan, Anand Raghunathan, Niraj K. Jha	Software Architectural Transformations: A New Approach to Low Energy Embedded Software.	DATE	2003	DBLP DOI BibTeX RDF
1	Hoseok Chang, Wonchul Lee, Wonyong Sung	Optimization of power consumption for an ARM7-based multimedia handheld device.	ISCAS	2003	DBLP DOI BibTeX RDF
1	Jin-Gyeong Kim, C. C. Jay Kuo	MPEG-4 video codec IP design with a configurable embedded processor.	ISCAS	2003	DBLP DOI BibTeX RDF
1	Wonchul Lee, Kisun You, Wonyong Sung	Software optimization of MPEG audio layer-III for a 32 bit RISC processor.	APCCAS	2002	DBLP DOI BibTeX RDF
1	Armita Peymandoust, Giovanni De Micheli, Tajana Simunic	Complex library mapping for embedded software using symbolic algebra.	DAC	2002	DBLP DOI BibTeX RDF	automated library mapping, computation intensive software, embedded software optimization, polynomial representation, symbolic algebra
1	Francesco Papariello, Gabriele Luculli	Optimization of a Retargetable Functional Simulator for Embedded Processors. (PDF / PS)	ECBS	2002	DBLP DOI BibTeX RDF	retargetable ISS, platform design, system-on-chip, embedded processors, system-level design
1	Wayne Wolf	Household Hints for Embedded Systems Designers.	IEEE Computer	2002	DBLP DOI BibTeX RDF
1	Meenakshi A. Kandaswamy, Mahmut T. Kandemir, Alok N. Choudhary, David E. Bernholdt	An Experimental Evaluation of I/O Optimizations on Different Applications.	IEEE Trans. Parallel Distrib. Syst.	2002	DBLP DOI BibTeX RDF	I/O optimizations, I/O intensive applications, parallel architectures, collective I/O, disk layout
1	Meenakshi A. Kandaswamy, Mahmut T. Kandemir, Alok N. Choudhary, David E. Bernholdt	An Experimental Evaluation of I/O Optimizations on Different Applications.	IEEE Trans. Parallel Distrib. Syst.	2002	DBLP DOI BibTeX RDF	I/O optimizations, I/O intensive applications, parallel architectures, collective I/O, disk layout
1	Pohsiang Hsu, K. J. Ray Liu	Software Optimization of Video Codecs on Pentium Processor with MMX Technology.	EURASIP J. Adv. Sig. Proc.	2001	DBLP DOI BibTeX RDF
1	Yunjian Jiang, Robert K. Brayton	Logic optimization and code generation for embedded control applications.	CODES	2001	DBLP DOI BibTeX RDF	code generation, MDD, Esterel, logic optimization, multiple-valued
1	Vishal Dalal, C. P. Ravikumar	Software Power Optimizations In An Embedded System.	VLSI Design	2001	DBLP DOI BibTeX RDF
1	Pohsiang Hsu, K. J. Ray Liu	Software Optimization of H.263 Video Encoder on Pentium Processor with MMX Technology.	IEEE International Conference on Multimedia and Expo (I)	2000	DBLP BibTeX RDF
1	Chunghee Kim, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli	Free MDD-Based Software Optimization Techniques for Embedded Systems.	DATE	2000	DBLP DOI BibTeX RDF
1	G. Esakkimuthu, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin	Memory system energy (poster session): influence of hardware-software optimizations.	ISLPED	2000	DBLP DOI BibTeX RDF
1	Jean Paul Calvez, Olivier Pasquier, James K. Peckol	Software Implementation Techniques for Hw/Sw Embedded Systems.	CODES	1997	DBLP DOI BibTeX RDF	Real-time software implementation, Multi-rate reactive systems, Multi-task software optimization, Embedded software, Dynamic scheduling, Software synthesis