Search results for "software pipelining"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
4	Dragan Milicev, Zoran Jovanovic	A Formal Model of Software Pipelining Loops with Conditions. (PDF / PS)	IPPS	1997	DBLP DOI BibTeX RDF	software pipelining loops, PSP model, parallel programming, finite state machine, formal model, software pipelining, parallelizing loops, conditional branches
3	Haitao Wei, Junqing Yu, Huafei Yu, Guang R. Gao	Minimizing communication in rate-optimal software pipelining for stream programs.	CGO	2010	DBLP DOI BibTeX RDF	dfbrook, multi-core, software pipelining, cell processor, stream programs
3	Jean-Baptiste Tristan, Xavier Leroy	A simple, verified validator for software pipelining.	POPL	2010	DBLP DOI BibTeX RDF	software pipelining, translation validation, verified compilers, symbolic evaluation
3	Hui Liu, Zili Shao, Meng Wang, Junzhao Du, Chun Jason Xue, Zhiping Jia	Combining Coarse-Grained Software Pipelining with DVS for Scheduling Real-Time Periodic Dependent Tasks on Multi-Core Embedded Systems.	Signal Processing Systems	2009	DBLP DOI BibTeX RDF	Periodic dependent tasks, Scheduling, Multimedia, Real-time, Dynamic voltage scaling (DVS), Multi-core, Software pipelining, Retiming
3	Ram Rangan, Neil Vachharajani, Guilherme Ottoni, David I. August	Performance scalability of decoupled software pipelining.	TACO	2008	DBLP DOI BibTeX RDF	Decoupled software pipelining, performance analysis
3	Sebastian Winkel, Rakesh Krishnaiyer, Robyn Sampson	Latency-tolerant software pipelining in a production compiler.	CGO	2008	DBLP DOI BibTeX RDF	latency-tolerant scheduling, load clustering, compiler, code generation, prefetching, software pipelining, modulo scheduling, memory latency, memory-level parallelism, itanium, epic
3	Hongbo Rong, Zhizhong Tang, Ramaswamy Govindarajan, Alban Douillet, Guang R. Gao	Single-dimension software pipelining for multidimensional loops.	TACO	2007	DBLP DOI BibTeX RDF	Software pipelining, loop transformation, modulo scheduling
3	Sid Ahmed Ali Touati	On the Periodic Register Need in Software Pipelining.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	Periodic Register Requirement, MAXLIVE, Periodic Register Sufficiency, Stage Scheduling, Instruction Level Parallelism, Software Pipelining
3	Noureddine Chabini, El Mostapha Aboulhamid, Ismaïl Chabini, Yvon Savaria	Scheduling and optimal register placement for synchronous circuits derived using software pipelining techniques.	ACM Trans. Design Autom. Electr. Syst.	2005	DBLP DOI BibTeX RDF	multiphase, sequential circuit, software pipelining, clock, Retiming
3	Daniel Kästner, Markus Pister	Generic Software Pipelining at the Assembly Level.	SCOPES	2005	DBLP DOI BibTeX RDF	PROPAN, software pipelining, modulo scheduling, postpass optimization
3	Won So, Alexander G. Dean	Complementing software pipelining with software thread integration.	LCTES	2005	DBLP DOI BibTeX RDF	TI C6000, DSP, software pipelining, VLIW, stream programming, coarse-grain parallelism, software thread integration
3	Noureddine Chabini, Wayne Wolf	An approach for integrating basic retiming and software pipelining.	EMSOFT	2004	DBLP DOI BibTeX RDF	embedded systems, system-on-chip, timings, instruction-level parallelism, software pipelining, VLIW, retiming, superscalar processor, peak power, code size
3	Han-Saem Yun, Jihong Kim, Soo-Mook Moon	Time Optimal Software Pipelining of Loops with Control Flows.	International Journal of Parallel Programming	2003	DBLP DOI BibTeX RDF	compiler optimization, instruction-level parallelism, software pipelining, VLIW
3	Han-Saem Yun, Jihong Kim, Soo-Mook Moon	Optimal software pipelining of loops with control flows.	ICS	2002	DBLP DOI BibTeX RDF	instruction-level parallelism, software pipelining, VLIW
3	Francisco Barat, Murali Jayapala, Pieter Op de Beeck, Geert Deconinck	Software Pipelining for Coarse-Grained Reconfigurable Instruction Set Processors.	VLSI Design	2002	DBLP DOI BibTeX RDF	coarse grained logic, code generation, software pipelining, vliw, reconfigurable processor, spatial computation
3	Ramaswamy Govindarajan, Guang R. Gao, Palash Desai	Minimizing Buffer Requirements under Rate-Optimal Schedule in Regular Dataflow Networks.	VLSI Signal Processing	2002	DBLP DOI BibTeX RDF	buffer minimization, Digital Signal Processing (DSP) computation, Multi-Rate Software Pipelining, Regular Stream Flow Graphs, software pipelining, dataflow graphs
3	François R. Boyer, El Mostapha Aboulhamid, Yvon Savaria, Michel Boyer	Optimal design of synchronous circuits using software pipelining techniques.	ACM Trans. Design Autom. Electr. Syst.	2001	DBLP DOI BibTeX RDF	software pipelining, retiming, Resynthesis
3	Elana D. Granston, Eric Stotzer, Joe Zbiciak	Software Pipelining Irregular Loops on the TMS320C6000 VLIW DSP Architecture.	LCTES/OM	2001	DBLP DOI BibTeX RDF	WHILE loops, software pipelining, digital signal processors, VLIW architectures
3	Cagdas Akturan, Margarida F. Jacome	RS-FDRA: a register sensitive software pipelining algorithm for embedded VLIW processors.	CODES	2001	DBLP DOI BibTeX RDF	embedded systems, software pipelining, retiming, optimizing compilers, VLIW processors
3	Pierre-Yves Calland, Alain Darte, Yves Robert	Circuit Retiming Applied to Decomposed Software Pipelining.	IEEE Trans. Parallel Distrib. Syst.	1998	DBLP DOI BibTeX RDF	circuit retiming, Software pipelining, list scheduling, modulo scheduling, cyclic scheduling
3	Soo-Mook Moon, Kemal Ebcioglu	Parallelizing Nonnumerical Code with Selective Scheduling and Software Pipelining.	ACM Trans. Program. Lang. Syst.	1997	DBLP DOI BibTeX RDF	global instruction scheduling, speculative code motion, instruction-level parallelism, software pipelining, VLIW, superscalar
3	Tao Yu, Zhizhong Tang, Chihong Zhang, Jun Luo	Control Mechanism for Software Pipelining on Nested Loop.	APDC	1997	DBLP DOI BibTeX RDF	ILSP, software pipelining, VLIW, dataflow, nested loop
3	Peter Pfahler, Georg Piepenbrock	A Comparison of Modulo Scheduling Techniques for Software Pipelining.	CC	1996	DBLP DOI BibTeX RDF	Instruction Level Parallelism, Software Pipelining, VLIW, Superscalar Processors
3	Jian Wang, Guang R. Gao	Pipelining-Dovetailing: A Transformation to Enhance Software Pipelining for Nested Loops.	CC	1996	DBLP DOI BibTeX RDF	Very Long Instruction Word(VLIW), Instruction-Level Parallelism, Software Pipelining, Superscalar, Nested Loop, Loop Scheduling, Fine-Grain Parallelism
3	Alexander Aiken, Alexandru Nicolau, Steven Novack	Resource-Constrained Software Pipelining.	IEEE Trans. Parallel Distrib. Syst.	1995	DBLP DOI BibTeX RDF	Software pipelining, instruction scheduling, program optimization, global scheduling, fine-grain parallelism
3	Jian Wang, Andreas Krall, M. Anton Ertl, Christine Eisenbeis	Software pipelining with register allocation and spilling.	MICRO	1994	DBLP DOI BibTeX RDF	instruction-level parallelism, register allocation, software pipelining, loop scheduling, register spilling
3	B. Ramakrishna Rau	Iterative modulo scheduling: an algorithm for software pipelining loops.	MICRO	1994	DBLP DOI BibTeX RDF	software pipelining, instruction scheduling, modulo scheduling, loop scheduling
3	Bogong Su, Stanley Habib, Wei Zhao, Jian Wang, Youfeng Wu	A study of pointer aliasing for software pipelining using run-time disambiguation.	MICRO	1994	DBLP DOI BibTeX RDF	compensation code, pointer aliasing, rerollability, run-time disambiguation, software pipelining
3	Reese B. Jones, Vicki H. Allan	Software pipelining: a comparison and improvement.	MICRO	1990	DBLP DOI BibTeX RDF	recognition of parallelism, software pipelining, operation scheduling
2	Jialu Huang, Arun Raman, Thomas B. Jablin, Yun Zhang, Tzu-Han Hung, David I. August	Decoupled software pipelining creates parallelization opportunities.	CGO	2010	DBLP DOI BibTeX RDF	DSWP, enabling transformation, parallelization, multicore, speculation
2	Lei Gao, David Zaretsky, Gaurav Mittal, Dan Schonfeld, Prith Banerjee	A software pipelining algorithm in high-level synthesis for FPGA architectures.	ISQED	2009	DBLP DOI BibTeX RDF
2	Yoshiyuki Yamashita, Masato Tsuru	Implementing Fast Packet Filters by Software Pipelining on x86 Processors.	APPT	2009	DBLP DOI BibTeX RDF
2	Mohammed Fellahi, Albert Cohen	Software Pipelining in Nested Loops with Prolog-Epilog Merging.	HiPEAC	2009	DBLP DOI BibTeX RDF
2	Abhishek Udupa, R. Govindarajan, Matthew J. Thazhuthaveetil	Synergistic execution of stream programs on multicores with accelerators.	LCTES	2009	DBLP DOI BibTeX RDF	CUDAa, partitioning, software pipelining, stream programming, GPU programming
2	Easwaran Raman, Guilherme Ottoni, Arun Raman, Matthew J. Bridges, David I. August	Parallel-stage decoupled software pipelining.	CGO	2008	DBLP DOI BibTeX RDF	doall, dswp, tlp, automatic parallelization, multi-core architectures, pipelined parallelism
2	Yuanming Zhang, Kanemitsu Ootsu, Takashi Yokota, Takanobu Baba	Clustered Decoupled Software Pipelining on Commodity CMP.	ICPADS	2008	DBLP DOI BibTeX RDF
2	Suhyun Kim, Soo-Mook Moon	Rotating register allocation with multiple rotating branches.	ICS	2008	DBLP DOI BibTeX RDF	rotating register, register allocation, software pipelining
2	Mounira Bachir, Sid Ahmed Ali Touati, Albert Cohen	Post-pass periodic register allocation to minimise loop unrolling degree.	LCTES	2008	DBLP DOI BibTeX RDF	embedded code optimisation, periodic register allocation, software pipelining, loop unrolling
2	Hongbo Rong, Alban Douillet, Guang R. Gao	Register allocation for software pipelined multidimensional loops.	ACM Trans. Program. Lang. Syst.	2008	DBLP DOI BibTeX RDF	register allocation, Software pipelining
2	Abhishek Das, William J. Dally	Stream Scheduling: A Framework to Manage Bulk Operations in Memory Hierarchies.	Euro-Par	2008	DBLP DOI BibTeX RDF	Stream Scheduling, Bulk Operations, Sequoia, GSOP Memory Hierarchy, Tunables, Software Pipelining
2	Neil Vachharajani, Ram Rangan, Easwaran Raman, Matthew J. Bridges, Guilherme Ottoni, David I. August	Speculative Decoupled Software Pipelining.	PACT	2007	DBLP DOI BibTeX RDF
2	Yoshiyuki Yamashita, Masato Tsuru	Software Pipelining for Packet Filters.	HPCC	2007	DBLP DOI BibTeX RDF
2	Hugo Venturini, Frédéric Riss, Jean-Claude Fernandez, Miguel Santana	Non-transparent debugging for software-pipelined loops.	CASES	2007	DBLP DOI BibTeX RDF	non-transparent debugging, compiler, software-pipelining, debugger
2	Chris Zimmer, Stephen Roderick Hines, Prasad A. Kulkarni, Gary S. Tyson, David B. Whalley	Facilitating compiler optimizations through the dynamic mapping of alternate register structures.	CASES	2007	DBLP DOI BibTeX RDF	register queues, compiler optimizations, software pipelining
2	Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Young-Jia Lin, Yi-Ping You, Chia-Han Lu, Jenq Kuen Lee	Enabling compiler flow for embedded VLIW DSP processors with distributed register files.	LCTES	2007	DBLP DOI BibTeX RDF	distributed register files, embedded VLIW DSP compilers, software pipelining
2	Perttu Salmela, Pekka Jääskeläinen, Tuomas Järvinen, Jarmo Takala	Software Pipelining Support for Transport Triggered Architecture Processors.	SAMOS	2006	DBLP DOI BibTeX RDF
2	Florent Blachot, Benoît Dupont de Dinechin, Guillaume Huard	SCAN: A Heuristic for Near-Optimal Software Pipelining.	Euro-Par	2006	DBLP DOI BibTeX RDF
2	Alban Douillet, Hongbo Rong, Guang R. Gao	Multi-dimensional Kernel Generation for Loop Nest Software Pipelining.	Euro-Par	2006	DBLP DOI BibTeX RDF
2	Feihui Li, Mahmut T. Kandemir, Ibrahim Kolcu	Exploiting Software Pipelining for Network-on-Chip architectures.	ISVLSI	2006	DBLP DOI BibTeX RDF
2	Ke Zhou, Zhongying Niu	Decease I/O Mean Response Time Using Software Pipelining.	IMSCCS	2006	DBLP DOI BibTeX RDF
2	Won So, Alexander G. Dean	Reaching fast code faster: using modeling for efficient software thread integration on a VLIW DSP.	CASES	2006	DBLP DOI BibTeX RDF	TI C6000, static profitability estimation, DSP, software pipelining, VLIW, iterative compilation, software thread integration
2	Abhishek Das, William J. Dally, Peter R. Mattson	Compiling for stream processing.	PACT	2006	DBLP DOI BibTeX RDF	SRF allocation, Stream Operation Precedence (SOP) graph, StreamC, coarse-grained operations, producer-consumer locality, scoreboard slot assignment, stream scheduling, strip-mining, software-pipelining, task level parallelism, stream programming model
2	Lin Qiao, Weitong Huang, Zhizhong Tang	A Dynamic Data Dependence Analysis Approach for Software Pipelining.	NPC	2005	DBLP DOI BibTeX RDF
2	Guilherme Ottoni, Ram Rangan, Adam Stoler, David I. August	Automatic Thread Extraction with Decoupled Software Pipelining.	MICRO	2005	DBLP DOI BibTeX RDF
2	Naohiro Ishii, Hiroaki Ogi, Tsubasa Mochizuki, Kazunori Iwata	Parallelism Improvements of Software Pipelining by Combining Spilling with Rematerialization.	KES	2005	DBLP DOI BibTeX RDF
2	Yanjun Zhang, Hu He, Yihe Sun	A new register file access architecture for software pipelining in VLIW processors.	ASP-DAC	2005	DBLP DOI BibTeX RDF
2	João M. P. Cardoso	Dynamic loop pipelining in data-driven architectures.	Conf. Computing Frontiers	2005	DBLP DOI BibTeX RDF	compilation, reconfigurable computing, software pipelining, dataflow, data-driven architectures
2	Hongbo Rong, Alban Douillet, Guang R. Gao	Register allocation for software pipelined multi-dimensional loops.	PLDI	2005	DBLP DOI BibTeX RDF	register allocation, software pipelining
2	Hongbo Rong, Zhizhong Tang, Ramaswamy Govindarajan, Alban Douillet, Guang R. Gao	Single-Dimension Software Pipelining for Multi-Dimensional Loops.	CGO	2004	DBLP DOI BibTeX RDF
2	Hongbo Rong, Alban Douillet, Ramaswamy Govindarajan, Guang R. Gao	Code Generation for Single-Dimension Software Pipelining of Multi-Dimensional Loops.	CGO	2004	DBLP DOI BibTeX RDF
2	Ram Rangan, Neil Vachharajani, Manish Vachharajani, David I. August	Decoupled Software Pipelining with the Synchronization Array.	IEEE PACT	2004	DBLP DOI BibTeX RDF
2	Gang-Ryung Uh	Tailoring Software Pipelining for Effective Exploitation of Zero Overhead Loop Buffer.	SCOPES	2003	DBLP DOI BibTeX RDF
2	Haibo Lin, Wenlong Li, Zhizhong Tang	Overcoming Static Register Pressure for Software Pipelining in the Itanium Architecture.	APPT	2003	DBLP DOI BibTeX RDF
2	Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha	Code size reduction technique and implementation for software-pipelined DSP applications.	ACM Trans. Embedded Comput. Syst.	2003	DBLP DOI BibTeX RDF	scheduling, software pipelining, Retiming, DSP processors
2	SangMin Shim, Soo-Mook Moon	Split-Path Enhanced Pipeline Scheduling.	IEEE Trans. Parallel Distrib. Syst.	2003	DBLP DOI BibTeX RDF	multipath loops, enhanced pipeline scheduling, all-path pipelining, Instruction-level parallelism, software pipelining, modulo scheduling
2	Cagdas Akturan, Margarida F. Jacome	RS-FDRA: A register-sensitive software pipelining algorithm for embedded VLIW processors.	IEEE Trans. on CAD of Integrated Circuits and Systems	2002	DBLP DOI BibTeX RDF
2	Raya Leviathan, Amir Pnueli	Validating software pipelining optimizations.	CASES	2002	DBLP DOI BibTeX RDF	optimization, verification, compilers, pipeline processors, translation validation
2	Hongbo Yang, Guang R. Gao, Clement Leung	On achieving balanced power consumption in software pipelined loops.	CASES	2002	DBLP DOI BibTeX RDF	power-aware compilation, instruction level parallelism, software pipelining
2	Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha	Optimal Code Size Reduction for Software-Pipelined Loops on DSP Applications. (PDF / PS)	ICPP	2002	DBLP DOI BibTeX RDF	Scheduling, Software pipelining, Retiming, DSP processors
2	Bin Xiao, Zili Shao, Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Qingfeng Zhuge	Optimal Code Size Reduction for Software-Pipelined and Unfolded Loops.	ISSS	2002	DBLP DOI BibTeX RDF	rotation scheduling, software pipelining, retiming, unfolding
2	Suhyun Kim, Soo-Mook Moon, Jinpyo Park, Kemal Ebcioglu	Unroll-Based Copy Elimination for Enhanced Pipeline Scheduling.	IEEE Trans. Computers	2002	DBLP DOI BibTeX RDF	enhanced pipeline scheduling, unrolling, modulo variable expansion, iterated coalescing, register allocation, Software pipelining, modulo scheduling, renaming, coalescing
2	Glenn Altemose, Cindy Norris	Register pressure responsive software pipelining.	SAC	2001	DBLP DOI BibTeX RDF	register allocation, software pipelining
2	Han-Saem Yun, Jihong Kim, Soo-Mook Moon	A First Step Towards Time Optimal Software Pipelining of Loops with Control Flows.	CC	2001	DBLP DOI BibTeX RDF
2	Kalyan Muthukumar, Gautam Doshi	Software Pipelining of Nested Loops.	CC	2001	DBLP DOI BibTeX RDF
2	Josep Llosa, Eduard Ayguadé, Antonio González, Mateo Valero, Jason Eckhardt	Lifetime-Sensitive Modulo Scheduling in a Production Environment.	IEEE Trans. Computers	2001	DBLP DOI BibTeX RDF	register requirements, software pipelining, VLIW, instruction scheduling, loop scheduling, Fine grain parallelism, superscalar architectures
2	G. X. Tyson, M. Smelyanskyi, Edward S. Davidson	Evaluating the Use of Register Queues in Software Pipelined Loops.	IEEE Trans. Computers	2001	DBLP DOI BibTeX RDF	modulo variable expansion, rotating register file, register queues, register connection, Software pipelining, VLIW
2	Javier Zalamea, Josep Llosa, Eduard Ayguadé, Mateo Valero	MIRS: Modulo Scheduling with Integrated Register Spilling.	LCPC	2001	DBLP DOI BibTeX RDF	Instruction-Level Parallelism, Register Allocation, Software Pipelining, Spill Code
2	Mikhail Smelyanskiy, Gary S. Tyson, Edward S. Davidson	Register Queues: A New Hardware/Software Approach to Efficient Software Pipelining.	IEEE PACT	2000	DBLP DOI BibTeX RDF
2	Cagdas Akturan, Margarida F. Jacome	FDRA: A Software-Pipelining Algorithm for Embedded VLIW Processors.	ISSS	2000	DBLP DOI BibTeX RDF
2	David Gregg	Global Software Pipelining with Iteration Preselection.	CC	2000	DBLP DOI BibTeX RDF
2	Javier Zalamea, Josep Llosa, Eduard Ayguadé, Mateo Valero	Improved spill code generation for software pipelined loops.	PLDI	2000	DBLP DOI BibTeX RDF	instruction-level parallelism, register allocation, software pipelining, spill code
2	Chihong Zhang, Zhizhong Tang	An Improvement on Data Dependence Analysis Supporting Software Pipelining Technique.	APDC	1997	DBLP DOI BibTeX RDF
2	Seongbae Park, SangMin Shim, Soo-Mook Moon	Evaluation of Scheduling Techniques on a SPARC-based VLIW Testbed.	MICRO	1997	DBLP BibTeX RDF	SPARC-based VLIW testbed, VLIW microprocessors, Very Long Instruction Word microprocessors, all-path speculation, gcc-generated optimized SPARC code, high-performance VLIW code, nongreedy enhanced pipeline scheduling, nonspeculative operations, profile-based all-path speculation, restricted speculative loads, scheduling compiler, speculative operations, trace-based speculation, performance, compiler, computer architecture, parallel machines, software pipelining, loop unrolling, renaming, memory disambiguation, copies, scheduling techniques
2	F. Jesús Sánchez, Antonio González	Cache Sensitive Modulo Scheduling.	MICRO	1997	DBLP BibTeX RDF	VLIW machines, Software pipelining, software prefetching, locality analysis
2	Tao Yang, Cong Fu	Heuristic Algorithms for Scheduling Iterative Task Computations on Distributed Memory Machines.	IEEE Trans. Parallel Distrib. Syst.	1997	DBLP DOI BibTeX RDF	iterative task graphs, Scheduling, directed acyclic graphs, software pipelining, granularity, communication optimization
2	Ramaswamy Govindarajan, Erik R. Altman, Guang R. Gao	A Framework for Resource-Constrained Rate-Optimal Software Pipelining.	IEEE Trans. Parallel Distrib. Syst.	1996	DBLP DOI BibTeX RDF	superscalar and VLIW architectures, Instruction-level parallelism, integer linear programming, software pipelining, instruction scheduling
2	John C. Ruttenberg, Guang R. Gao, Woody Lichtenstein, Artour Stoutchinin	Software Pipelining Showdown: Optimal vs. Heuristic Methods in a Production Compiler.	PLDI	1996	DBLP DOI BibTeX RDF
2	Erik R. Altman, Guang R. Gao	Optimal Software Pipelining Through Enumeration of Schedules.	Euro-Par, Vol. II	1996	DBLP DOI BibTeX RDF
2	Mark G. Stoodley, Corinna G. Lee	Software Pipelining Loops with Conditional Branches.	MICRO	1996	DBLP BibTeX RDF
2	Josep Llosa, Mateo Valero, Eduard Ayguadé	Heuristics for Register-Constrained Software Pipelining.	MICRO	1996	DBLP BibTeX RDF
2	Steve Carr, Chen Ding, Philip H. Sweany	Improving Software Pipelining with Unroll-and-Jam. (PDF / PS)	HICSS	1996	DBLP DOI BibTeX RDF
2	Pierre-Yves Calland, Alain Darte, Yves Robert	A New Guaranteed Heuristic for the Software Pipelining Problem.	International Conference on Supercomputing	1996	DBLP DOI BibTeX RDF	circuit retiming, guaranteed heuristic, software pipelining, list scheduling, cyclic scheduling
2	Erik R. Altman, Ramaswamy Govindarajan, Guang R. Gao	Scheduling and Mapping: Software Pipelining in the Presence of Structural Hazards.	PLDI	1995	DBLP DOI BibTeX RDF
2	Siamak Arya, Howard Sachs, Sreeram Duvvuru	An architecture for high instruction level parallelism.	HICSS	1995	DBLP DOI BibTeX RDF	high instruction level parallelism, sequential order, code execution, dataflow problems, condition bits, nonblocking cache, Software Scheduled SuperScalar, parallel programming, compiler, parallel architectures, parallel architecture, pipelining, program compilers, data flow analysis, software pipelining, pipeline processing, data flow, processor architecture, speculative execution, control flow, hardware support, branches, program control structures, registers, functional units, multiple instructions, conditional execution
2	Lizy Kurian John, Vinod Reddy, Paul T. Hulina, Lee D. Coraor	A comparative evaluation of software techniques to hide memory latency.	HICSS	1995	DBLP DOI BibTeX RDF	comparative software evaluation, software oriented techniques, superscalar machines, superpipelined machines, software cache prefetching, data fetch request, software controlled prefetching, aggressive prefetching, memory bandwidth requirements, bus traffic, performance, parallel machines, program compilers, processor scheduling, software performance evaluation, software pipelining, pipeline processing, microarchitecture, cache storage, instruction set architecture, memory latency, loop unrolling, static scheduling, conditional branches
2	Ramaswamy Govindarajan, Erik R. Altman, Guang R. Gao	Minimizing register requirements under resource-constrained rate-optimal software pipelining.	MICRO	1994	DBLP DOI BibTeX RDF
2	Ramaswamy Govindarajan, Erik R. Altman, Guang R. Gao	A Framework for Resource-Constrained Rate-Optimal Software Pipelining.	CONPAR	1994	DBLP DOI BibTeX RDF
2	Qi Ning, Guang R. Gao	A Novel Framework of Register Allocation for Software Pipelining.	POPL	1993	DBLP DOI BibTeX RDF
2	Toshio Nakatani, Kemal Ebcioglu	Making Compaction-Based Parallelization Affordable.	IEEE Trans. Parallel Distrib. Syst.	1993	DBLP DOI BibTeX RDF	compaction-based parallelization, code explosion problem, software lookahead heuristic, VLIW parallelizing compiler, branch-intensive code, AIX utilities, fgrep, sed, parallel programming, parallel architectures, compress, program, sort, instruction-level parallelism, software pipelining, pipeline processing, instruction sets, loop parallelization, yacc
2	Vincent Van Dongen, Guang R. Gao, Qi Ning	A Polynomial Time Method for Optimal Software Pipelining.	CONPAR	1992	DBLP DOI BibTeX RDF