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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 4620 occurrences of 2171 keywords
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Results
Found 3678 publication records. Showing 3678 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 3 | Bin Wu, Kwan L. Yeung, Mounir Hamdi, Xin Li |
Minimizing internal speedup for performance guaranteed switches with optical fabrics.  |
IEEE/ACM Trans. Netw.  |
2009 |
DBLP DOI BibTeX RDF |
optical switch fabric, performance guaranteed switching, reconfiguration overhead, scheduling, speedup |
| 3 | Saad Mneimneh, Vishal Sharma, Kai-Yeung Siu |
Switching using parallel input-output queued switches with no speedup.  |
IEEE/ACM Trans. Netw.  |
2002 |
DBLP DOI BibTeX RDF |
parallel switches, switching, speedup, delay guarantee |
| 3 | Kenneth E. Hoganson |
Workload Execution Strategies and Parallel Speedup on Clustered Computers.  |
IEEE Trans. Computers  |
1999 |
DBLP DOI BibTeX RDF |
clustering, Parallel processing, efficiency, scaling, speedup |
| 3 | Xue Yibo, Chen Lan, Han Chengde |
The Affect of Cache to Speedup Models.  |
ISPAN  |
1996 |
DBLP DOI BibTeX RDF |
performance evaluation, cache, speedup |
| 3 | Devendra Kumar, Saad Harous |
A Study of Achievable Speedup in Distributed Simulation via NULL Messages.  |
IEEE Trans. Parallel Distrib. Syst.  |
1993 |
DBLP DOI BibTeX RDF |
achievable speedup, NULL messages, open queuing networks, performance, concurrency control, computer networks, queueing theory, digital simulation, distributed simulation, distributed simulator, overhead |
| 3 | Christophe Cérin, Antoine Petit |
Speedup of Recognizable Trace Languages.  |
MFCS  |
1993 |
DBLP DOI BibTeX RDF |
recognizable language, trace, speedup |
| 3 | Dilip Sarkar, Narsingh Deo |
Estimating the Speedup in Parallel Parsing.  |
IEEE Trans. Software Eng.  |
1990 |
DBLP DOI BibTeX RDF |
speedup estimation, parallel parsing, asynchronous bottom-up, processor coordination, models, parallel algorithms, program compilers, grammars, simulation result, interprocessor communication |
| 3 | Constantine D. Polychronopoulos, Utpal Banerjee |
Processor Allocation for Horizontal and Vertical Parallelism and Related Speedup Bounds.  |
IEEE Trans. Computers  |
1987 |
DBLP DOI BibTeX RDF |
vector machines, DO all and DO across loops, parallel Fortran programs, program speedup, speedup bounds, multiprocessors, program graphs |
| 2 | You Zhou, Ying Tan |
Particle swarm optimization with triggered mutation and its implementation based on GPU.  |
GECCO  |
2010 |
DBLP DOI BibTeX RDF |
particle swarm optimization, GPU, speedup, mutation |
| 2 | Vahid Tabatabaee, Leandros Tassiulas |
MNCM: a critical node matching approach to scheduling for input buffered switches with no speedup.  |
IEEE/ACM Trans. Netw.  |
2009 |
DBLP DOI BibTeX RDF |
input-queued switch fabrics, scheduling, stability analysis |
| 2 | Kuo-Liang Chung, Jyun-Pin Wang, Ming-Shao Cheng, Yong-Huai Huang |
Speedup of Color Palette Indexing in Self-Organization of Kohonen Feature Map.  |
CAIP  |
2009 |
DBLP DOI BibTeX RDF |
Color palette indexing, lateral update interaction, SOFM, winning neuron, speedup, learning process, lookup table |
| 2 | Sanjoy K. Baruah, Vincenzo Bonifaci, Alberto Marchetti-Spaccamela, Sebastian Stiller |
Implementation of a Speedup-Optimal Global EDF Schedulability Test.  |
ECRTS  |
2009 |
DBLP DOI BibTeX RDF |
sporadic task systems, global EDF scheduling, processor speedup factor, schedulability analysis, Multiprocessor scheduling |
| 2 | Zheng Cao, Jianwei Xu, Mingyu Chen, Gui Zheng, Huiwei Lv, Ninghui Sun |
HPPNetSim: a parallel simulation of large-scale interconnection networks.  |
SpringSim  |
2009 |
DBLP DOI BibTeX RDF |
conservative approach, large-scale interconnection network, super-linear speedup, parallel discrete event simulation |
| 2 | Mohammad S. Sabbagh, Richard M. Soland |
An improved partial enumeration algorithm for integer programming problems.  |
Annals OR  |
2009 |
DBLP DOI BibTeX RDF |
Partial enumeration speedup, Integer programming |
| 2 | Robert I. Davis, Thomas Rothvoß, Sanjoy K. Baruah, Alan Burns |
Exact quantification of the sub-optimality of uniprocessor fixed priority pre-emptive scheduling.  |
Real-Time Systems  |
2009 |
DBLP DOI BibTeX RDF |
Fixed priority pre-emptive scheduling, Sub-optimality, Processor speedup factor, Constrained deadline, Implicit deadline, Omega constant, Real-time, Earliest Deadline First (EDF), Uniprocessor |
| 2 | Can Emre Koksal |
On the Speedup Required to Achieve 100% Throughput for Multicast Over Crossbar Switches.  |
IWQoS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Marc Casas, Rosa M. Badia, Jesús Labarta |
Automatic analysis of speedup of MPI applications.  |
ICS  |
2008 |
DBLP DOI BibTeX RDF |
periodic region, performance, signal processing, analytical model, automatic analysis |
| 2 | Michael J. Flynn, Robert G. Dimond, Oskar Mencer, Oliver Pell |
Finding Speedup in Parallel Processors.  |
ISPDC  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Christianne Dalforno, Diego Mostaccio, Remo Suppi, Emilio Luque |
Increasing the Scalability and the Speedup of a Fish School Simulator.  |
ICCSA  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Saad Mneimneh |
Matching from the first iteration: an iterative switching algorithm for an input queued switch.  |
IEEE/ACM Trans. Netw.  |
2008 |
DBLP DOI BibTeX RDF |
iterative switching algorithms, number of iterations, speedup, matching algorithms, input queued switch |
| 2 | Iaakov Exman, Guy Zohar, Yehuda Hassin |
Collective Reuse of Software Components Speeds-Up Reliability.  |
ICSR  |
2008 |
DBLP DOI BibTeX RDF |
Collective Reuse, Shared Factory Architecture, Reliability speedup, Design Patterns, Software Components, Autonomous Agents |
| 2 | Tianyou Wang, Jun Ni |
Speedup Analysis for Parallel Implementation of Model of Response Accuracy and Response Time in Computerized Testing.  |
International Conference on Computational Science  |
2007 |
DBLP DOI BibTeX RDF |
social implications of IT, educational and psychological testing, computerized testing, education measurement, parallel computing, HPC |
| 2 | Darrin M. Hanna, Anna Maria Spagnuolo, Michael DuChene |
Speedup using Flowpaths for a Finite Difference Solution of a 3D Parabolic PDE.  |
IPDPS  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Rong Ge, Kirk W. Cameron |
Power-Aware Speedup.  |
IPDPS  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Alberto Bertoni, Roberto Radicioni |
Approximability and Non-approximability Results in Computing the Mean Speedup of Trace Monoids.  |
Developments in Language Theory  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Ami Marowka |
Routing Speedup in Multicore-Based Ad Hoc Networks.  |
ISPDC  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Jian Lou, Ashish Jagmohan, Dake He, Ligang Lu, Ming-Ting Sun |
Statistical Analysis Based H.264 High Profile Deblocking Speedup.  |
ISCAS  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Peng Yu, David Z. Pan |
A novel intensity based optical proximity correction algorithm with speedup in lithography simulation.  |
ICCAD  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Kumara Sastry, David E. Goldberg |
Let's get ready to rumble redux: crossover versus mutation head to head on exponentially scaled problems.  |
GECCO  |
2007 |
DBLP DOI BibTeX RDF |
domino convergence, drift time, exponential scaling, noisy fitness functions, genetic algorithms, scaling, speedup, mutation, crossover, building blocks, salience, population sizing, efficiency enhancement, convergence time, scalability analysis |
| 2 | Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Chakrabarti |
Throughput of multi-core processors under thermal constraints.  |
ISLPED  |
2007 |
DBLP DOI BibTeX RDF |
leakage dependence on temperature, throughput, power, speedup, thermal management, multi-core processors |
| 2 | Ron Gabor, Shlomo Weiss, Avi Mendelson |
Fairness enforcement in switch on event multithreading.  |
TACO  |
2007 |
DBLP DOI BibTeX RDF |
SOE, Switch on Event multithreading, coarse-grained multithreading, weighted speedup, performance, fairness, throughput, multithreading |
| 2 | Andrew Over, Bill Clarke, Peter E. Strazdins |
A Comparison of Two Approaches to Parallel Simulation of Multiprocessors.  |
ISPASS  |
2007 |
DBLP DOI BibTeX RDF |
speedup analysis, Sparc Sulima, UltraSPARC IIICu-based multiprocessor systems, careful locking, simulation time quantum, serial simulation, load-balancing, parallel simulation, parallel discrete event simulation, interconnect model, NAS parallel benchmarks |
| 2 | Wei Zhong, Gulsah Altun, Xinmin Tian, Robert W. Harrison, Phang C. Tai, Yi Pan |
Parallel protein secondary structure prediction schemes using Pthread and OpenMP over hyper-threading technology.  |
The Journal of Supercomputing  |
2007 |
DBLP DOI BibTeX RDF |
DBNN (Denoeux Belief Neural Network), MPI (Message Passing Interface), Hyper-threading, BLOSUM62 matrix, Hydrophobicity matrix, PSSM (Position Specific Scoring Matrix), Neural networks, Parallel architecture, OpenMP, Speedup, Pthread, Protein secondary structure prediction |
| 2 | Rolf H. Möhring, Heiko Schilling, Birk Schütz, Dorothea Wagner, Thomas Willhalm |
Partitioning graphs to speedup Dijkstra's algorithm.  |
ACM Journal of Experimental Algorithmics  |
2006 |
DBLP DOI BibTeX RDF |
acceleration method, Shortest path, road network, Dijkstra's algorithm |
| 2 | Jianjun Zhou, Jörg Sander |
Speedup Clustering with Hierarchical Ranking.  |
ICDM  |
2006 |
DBLP DOI BibTeX RDF |
|
| 2 | Wolfgang W. Bein, Mordecai J. Golin, Lawrence L. Larmore, Yan Zhang |
The Knuth-Yao quadrangle-inequality speedup is a consequence of total-monotonicity.  |
SODA  |
2006 |
DBLP DOI BibTeX RDF |
|
| 2 | Guoqiang Wang, Damla Turgut, Ladislau Bölöni, Dan C. Marinescu |
Accuracy-Speedup Tradeoffs for a Time-Parallel Simulation of Wireless Ad hoc Networks.  |
LCN  |
2006 |
DBLP DOI BibTeX RDF |
|
| 2 | Yongsheng Zhu, Junyan Yang, Jian Ye, Youyun Zhang |
A Speedup Method for SVM Decision.  |
SSPR/SPR  |
2006 |
DBLP DOI BibTeX RDF |
|
| 2 | Damla Turgut, Guoqiang Wang, Ladislau Bölöni, Dan C. Marinescu |
Speedup-Precision Tradeoffs in Time-Parallel Simulation of Wireless Ad hoc Networks.  |
DS-RT  |
2006 |
DBLP DOI BibTeX RDF |
|
| 2 | Erik D. Demaine, Mohammad Taghi Hajiaghayi, Dimitrios M. Thilikos |
Exponential Speedup of Fixed-Parameter Algorithms for Classes of Graphs Excluding Single-Crossing Graphs as Minors.  |
Algorithmica  |
2005 |
DBLP DOI BibTeX RDF |
Subexponential algorithms, Dominating set, Graph minors |
| 2 | Matthew D. T. Lewis, Tobias Schubert, Bernd Becker |
Speedup Techniques Utilized in Modern SAT Solvers.  |
SAT  |
2005 |
DBLP DOI BibTeX RDF |
|
| 2 | Dara Kusic, Raymond Hoare, Alex K. Jones, Joshua Fazekas, John Foster |
Extracting Speedup From C-Code With Poor Instruction-Level Parallelism.  |
IPDPS  |
2005 |
DBLP DOI BibTeX RDF |
|
| 2 | M. Van Der Horst, Kees van Berkel, Johan Lukkien, Rudolf H. Mak |
Recursive Filtering on a Vector DSP with Linear Speedup.  |
ASAP  |
2005 |
DBLP DOI BibTeX RDF |
|
| 2 | Raymond Yim, Michael Rosenblum, Vahid Tarokh |
Delay bounds for packetizing time-varying fluid policies with speedup and lookahead in single server systems.  |
INFOCOM  |
2005 |
DBLP DOI BibTeX RDF |
|
| 2 | Alfons G. Hoekstra, Peter M. A. Sloot |
Introducing Grid Speedup G: A Scalability Metric for Parallel Applications on the Grid.  |
EGC  |
2005 |
DBLP DOI BibTeX RDF |
|
| 2 | Maher Khemakhem, Abdelfattah Belghith |
A multipurpose multi-agent system based on a loosely coupled architecture to speedup the DTW algorithm for Arabic printed cursive OCR.  |
AICCSA  |
2005 |
DBLP DOI BibTeX RDF |
|
| 2 | Shahin Nazarian, Massoud Pedram, Emre Tuncer |
An empirical study of crosstalk in VDSM technologies.  |
ACM Great Lakes Symposium on VLSI  |
2005 |
DBLP DOI BibTeX RDF |
automatic test pattern generation (ATPG) tool, crosstalk induced slowdown and speedup, transition time, static timing analysis (STA), skew |
| 2 | Ryan Williams |
Parallelizing time with polynomial circuits.  |
SPAA  |
2005 |
DBLP DOI BibTeX RDF |
parallel speedup, circuit complexity, alternation |
| 2 | Zhi Guo, Walid A. Najjar, Frank Vahid, Kees A. Vissers |
A quantitative analysis of the speedup factors of FPGAs over processors.  |
FPGA  |
2004 |
DBLP DOI BibTeX RDF |
performance, FPGA, analysis, VHDL, reconfigurable computing |
| 2 | Claus Bauer |
Throughput and Delay Bounds for Input Buffered Switches Using Maximal Weight Matching Algorithms and a Speedup of Less than Two.  |
ICOIN  |
2004 |
DBLP DOI BibTeX RDF |
|
| 2 | Claus Bauer |
Stable Local Scheduling Algorithms With Low Complexity and Without Speedup for a Network of Input-Buffered Switches.  |
CAAN  |
2004 |
DBLP DOI BibTeX RDF |
|
| 2 | Gaurav D. Ghare, Scott T. Leutenegger |
Improving Speedup and Response Times by Replicating Parallel Programs on a SNOW.  |
JSSPP  |
2004 |
DBLP DOI BibTeX RDF |
|
| 2 | Rami A. AL-Na'mneh, W. David Pan, B. Earl Wells |
Two parallel implementations for one dimension FFT on symmetric multiprocessors.  |
ACM Southeast Regional Conference  |
2004 |
DBLP DOI BibTeX RDF |
imbalance load, isoefficeicy function, super linear speedup, scalability, MPI, FFT, DFT, SMP, bit reversal |
| 2 | Keqin Li |
Accelerating Divisible Load Distribution on Tree and Pyramid Networks Using Pipelined Communications.  |
IPDPS  |
2004 |
DBLP DOI BibTeX RDF |
pipelined communication, performance analysis, tree, speedup, Divisible load, pyramid, load distribution |
| 2 | Saad Mneimneh |
An Iterative Switching Algorithm With (Possibly) One Iteration.  |
NCA  |
2004 |
DBLP DOI BibTeX RDF |
number of iterations, matching, Switching, speedup |
| 2 | Sung-Ming Yen, Seungjoo Kim, Seongan Lim, Sang-Jae Moon |
RSA Speedup with Chinese Remainder Theorem Immune against Hardware Fault Cryptanalysis.  |
IEEE Trans. Computers  |
2003 |
DBLP DOI BibTeX RDF |
fault infective CRT, fault tolerance, cryptography, fault detection, side channel attack, factorization, Chinese Remainder Theorem (CRT), residue number system, physical cryptanalysis, hardware fault cryptanalysis, denial of service attack |
| 2 | G. Surendra, Subhasis Banerjee, S. K. Nandy |
Enhancing Speedup in Network Processing Applications by Exploiting Instruction Reuse with Flow Aggregation.  |
DATE  |
2003 |
DBLP DOI BibTeX RDF |
|
| 2 | Gayathri Venkataraman, Sartaj Sahni, Srabani Mukhopadhyaya |
A blocked all-pairs shortest-paths algorithm.  |
ACM Journal of Experimental Algorithmics  |
2003 |
DBLP DOI BibTeX RDF |
cache, blocking, speedup, all pairs shortest paths |
| 2 | Saad Mneimneh, Kai-Yeung Siu |
On achieving throughput in an input-queued switch.  |
IEEE/ACM Trans. Netw.  |
2003 |
DBLP DOI BibTeX RDF |
priority switching algorithms, lower bounds, throughput, speedup |
| 2 | Wenjie Li, Yiping Gong, Bin Liu 0001 |
Performance Evaluation of Crossbar Switch Fabrics in Core Routers.  |
AINA  |
2003 |
DBLP DOI BibTeX RDF |
CIOQ, OPRR, VOQ, Single Queue, Speedup |
| 2 | Chuzo Iwamoto, Katsuyuki Tateishi, Kenichi Morita, Katsunobu Imai |
A quadratic speedup theorem for iterative arrays.  |
Acta Inf.  |
2002 |
DBLP DOI BibTeX RDF |
|
| 2 | Eric T. Bax, Joel Franklin |
A Permanent Algorithm with exp[Omega (n1/3/2 ln n )] Expected Speedup for 0-1 Matrices.  |
Algorithmica  |
2002 |
DBLP DOI BibTeX RDF |
#P, Algorithms, Generating function, Finite-difference, Combinatorial problems, Permanent |
| 2 | Scott C. Smith |
Speedup of Self-Timed Digital Systems Using Early Completion.  |
ISVLSI  |
2002 |
DBLP DOI BibTeX RDF |
asynchronous, NCL, NULL Convention Logic, delay-insensitive |
| 2 | Vincent Colin de Verdière, Sébastien Cros, Christian Fabre, Romain Guider, Sergio Yovine |
Speedup Prediction for Selective Compilation of Embedded Java Programs.  |
EMSOFT  |
2002 |
DBLP DOI BibTeX RDF |
|
| 2 | Erik D. Demaine, Mohammad Taghi Hajiaghayi, Dimitrios M. Thilikos |
Exponential Speedup of Fixed-Parameter Algorithms on K3, 3-Minor-Free or K5-Minor-Free Graphs.  |
ISAAC  |
2002 |
DBLP DOI BibTeX RDF |
|
| 2 | Mario Donato Marino, Luiz A. G. Aleixo, T. Tachibana |
An Evaluation of the Speedup of a Preliminary Distributed MPI-Implementation for Groundwater Simulation Dispersion System.  |
ICPP Workshops  |
2002 |
DBLP DOI BibTeX RDF |
simulation, distributed, system, mpi, groundwater |
| 2 | Leo Chin Sim, Heiko Schröder |
Fast Processing of Medical Images Using a New Parallel Architecture, the Hybrid System. (PDF / PS)  |
SSIAI  |
2002 |
DBLP DOI BibTeX RDF |
Parallelization, Volume Rendering, Hybrid System, SIMD, Speedup, MIMD |
| 2 | Paolo Cremonesi, Claudio Gennaro |
Integrated Performance Models for SPMD Applications and MIMD Architectures.  |
IEEE Trans. Parallel Distrib. Syst.  |
2002 |
DBLP DOI BibTeX RDF |
fork-join queues, mean value analysis (MVA), speedup surface, performance model, parallel I/O, multiple instruction multiple data (MIMD), Single program multiple data (SPMD), synchronization overhead, queuing network model |
| 2 | Paolo Cremonesi, Claudio Gennaro |
Integrated Performance Models for SPMD Applications and MIMD Architectures.  |
IEEE Trans. Parallel Distrib. Syst.  |
2002 |
DBLP DOI BibTeX RDF |
fork-join queues, mean value analysis (MVA), speedup surface, performance model, parallel I/O, multiple instruction multiple data (MIMD), Single program multiple data (SPMD), synchronization overhead, queuing network model |
| 2 | Enrique Alba, José M. Troya |
Improving flexibility and efficiency by adding parallelism to genetic algorithms.  |
Statistics and Computing  |
2002 |
DBLP DOI BibTeX RDF |
distributed GAs, cellular GAs, PGAs theory, PGA parameters influence, scalability, efficiency, speedup, parallel genetic algorithms |
| 2 | D. Manjunath, Biplab Sikdar |
Variable Length Packet Switches: Input Queued Fabrics with Finite Buffers, Speedup, and Parallelism.  |
HiPC  |
2001 |
DBLP DOI BibTeX RDF |
|
| 2 | Sung-Ming Yen, Seungjoo Kim, Seongan Lim, Sang-Jae Moon |
RSA Speedup with Residue Number System Immune against Hardware Fault Cryptanalysis.  |
ICISC  |
2001 |
DBLP DOI BibTeX RDF |
Fault infective CRT, Fault tolerance, Cryptography, Fault detection, Side channel attack, Factorization, Chinese remainder theorem (CRT), Residue number system, Physical cryptanalysis, Hardware fault cryptanalysis |
| 2 | James J. Nutaro, Hessam S. Sarjoughian |
Speedup of a sparse system simulation.  |
Workshop on Parallel and Distributed Simulation  |
2001 |
DBLP DOI BibTeX RDF |
|
| 2 | Yi-Chang Zhuang, Ce-Kuen Shieh, Tyng-Yue Liang, Chih-Hui Chou |
Maximizing Speedup through Performance Prediction for Distributed Shared Memory Systems.  |
ICDCS  |
2001 |
DBLP DOI BibTeX RDF |
|
| 2 | Ludmila Cherkasova, Mohan DeSouza, Shankar Ponnekanti |
Performance Analysis of ``Content-Aware'' Load Balancing Strategy FLEX: Two Case Studies. (PDF / PS)  |
HICSS  |
2001 |
DBLP DOI BibTeX RDF |
shared web hosting, web server cluster, quality of service, performance, scalability, load balancing, trace driven simulation, superlinear speedup |
| 2 | Keqin Li, Victor Y. Pan |
Parallel Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System.  |
IEEE Trans. Computers  |
2001 |
DBLP DOI BibTeX RDF |
Bilinear algorithm, optical pipelined bus, distributed memory system, matrix multiplication, speedup, PRAM, reconfigurable system, linear array, cost-optimality |
| 2 | V. N. Babin, Valeri P. Il'in, A. S. Pylkin |
On the Parallelization of Domain Decomposition Methods for 3-D Boundary Value Problems.  |
PaCT  |
2001 |
DBLP DOI BibTeX RDF |
multiprocessor, speedup, parallel implementation, boundary value problem, domain decomposition method |
| 2 | David B. Skillicorn, Yu Wang |
Parallel and Sequential Algorithms for Data Mining Using Inductive Logic.  |
Knowl. Inf. Syst.  |
2001 |
DBLP DOI BibTeX RDF |
Bump hunting, Progol, Cost modeling, Covering, BSP, Inductive logic, Superlinear speedup, Bulk synchronous parallelism |
| 2 | Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer |
Test generation for crosstalk-induced faults: framework and computational result.  |
Asian Test Symposium  |
2000 |
DBLP DOI BibTeX RDF |
2-vector test generation, crosstalk-induced faults, noise effects, design effort, debugging effort, pulses, signal speedup, signal slowdown, digital combinational circuits, mixed-signal test generator, XGEN, static values, dynamic signals, signal arrival times, rise times, fall times, integrated circuit testing, automatic test pattern generation, combinational circuits, accuracy, vectors, circuit analysis computing, crosstalk, transitions, integrated logic circuits, technology scaling, SPICE simulations, gate delay, circuit performance, timing information, clock frequency |
| 2 | Dean Batten, Sanjay Jinturkar, C. John Glossner, Michael J. Schulte, Paul D'Arcy |
A New Approach to DSP Intrinsic Functions. (PDF / PS)  |
HICSS  |
2000 |
DBLP DOI BibTeX RDF |
Speech coders, intrinsic functions, profile-directed function inlining, performance analysis, instruction-level parallelism, software pipelining, speedup, modulo scheduling, loop optimization, code growth |
| 2 | Quan Wang, David Maier, Leonard D. Shapiro |
The Hybrid Technique for Reference Materialization in Object Query Processing. (PDF / PS)  |
IDEAS  |
2000 |
DBLP DOI BibTeX RDF |
reference materialization, object reference resolution, object query evaluation, pointer-based techniques, value-based techniques, hybrid technique, single-valued attributes, collection-valued attributes, algebraic transformations, rule-based query optimizer, performance, query processing, query optimization, object-oriented databases, object-oriented database, speedup, object-relational databases, OQL, SQL:1999, object-oriented query languages |
| 2 | Gayathri Venkataraman, Sartaj Sahni, Srabani Mukhopadhyaya |
A Blocked All-Pairs Shortest-Path Algorithm.  |
SWAT  |
2000 |
DBLP DOI BibTeX RDF |
cache, blocking, speedup, All pairs shortest paths |
| 2 | Damian Dalton |
The Speedup Performance of an Associative Memory Based Logic Simulator.  |
PaCT  |
1999 |
DBLP DOI BibTeX RDF |
|
| 2 | Ananth Grama, Vipin Kumar |
State of the Art in Parallel Search Techniques for Discrete Optimization Problems.  |
IEEE Trans. Knowl. Data Eng.  |
1999 |
DBLP DOI BibTeX RDF |
game-tree search, speedup anomalies, load balancing, Parallel processing, heuristic search, backtracking, tree search, discrete optimization |
| 2 | Anthony C. Kam, Kai-Yeung Siu |
Linear Complexity Algorithms for Bandwidth Reservations and Delay Guarantees in Input-Queued Switches with No Speedup. (PDF / PS)  |
ICNP  |
1998 |
DBLP DOI BibTeX RDF |
|
| 2 | Richard M. Karp, Yanjun Zhang |
On Parallel Evaluation of Game Trees.  |
J. ACM  |
1998 |
DBLP DOI BibTeX RDF |
?-? pruning, AND/OR tree, parallel speedup |
| 2 | Jung-Sing Jwo, Yu Chin Cheng, Chin-Yun Hsieh |
On Deciding Granularity for Optimal Speedup for Solving Data Parallel Problems with Clustered Distributed Computing.  |
ISPAN  |
1997 |
DBLP DOI BibTeX RDF |
distributed computing, clustered computing, granularity, data parallelism, network computing |
| 2 | Ewa Deelman, Boleslaw K. Szymanski |
Breadth-First Rollback in Spatially Explicit Simulations.  |
Workshop on Parallel and Distributed Simulation  |
1997 |
DBLP DOI BibTeX RDF |
antimessage, breadth-first rollback, causal relationship recovery, incremental state saving, rollback overhead, rollback processing, simulation objects, spatially explicit simulations, straggler, discrete event simulation, speedup, parallel discrete event simulations, optimistic protocol |
| 2 | Ireneusz Karkowski, Henk Corporaal |
Design of Heterogenous Multi-Processor Embedded Systems: Applying Functional Pipelining.  |
IEEE PACT  |
1997 |
DBLP DOI BibTeX RDF |
heterogenous multiprocessor embedded system design, functional pipelining, embedded program mapping, ANSI C program, application specific processor pipeline, frequency tracking system, two-processor system, highly optimized single core solution, architecture, multiprocessing systems, instruction level parallelism, speedup, efficient algorithm, loops |
| 2 | Kai Kwong Lau, Mohan J. Kumar, N. R. Achuthan |
Parallel implementation of branch and bound algorithm for solving vehicle routing problem on NOWs.  |
ISPAN  |
1997 |
DBLP DOI BibTeX RDF |
parallel branch and bound, super-linear speedup, real time, load balancing, optimisation, Networks of Workstations, vehicle routing problem, VRP, operations research, operational research, branch and bound algorithm |
| 2 | Elizabeth M. Rudnick, Janak H. Patel |
Overcoming the Serial Logic Simulation Bottleneck in Parallel Fault Simulation.  |
VLSI Design  |
1997 |
DBLP DOI BibTeX RDF |
serial logic simulation bottleneck, parallel fault simulation, sequential circuit fault simulation algorithms, fault-partitioning approach, test set partitioning, parallel architectures, logic CAD, fault coverage, speedup, benchmark circuits |
| 2 | Laurent Colombet, Laurent Desbat |
Speedup and Efficiency of Large Size Applications on Heterogeneous Networks.  |
Euro-Par, Vol. II  |
1996 |
DBLP DOI BibTeX RDF |
|
| 2 | Thu D. Nguyen, Raj Vaswani, John Zahorjan |
Maximizing Speedup through Self-Tuning of Processor Allocation. (PDF / PS)  |
IPPS  |
1996 |
DBLP DOI BibTeX RDF |
|
| 2 | Jörg Keller, Thomas Rauber, Bernd Rederlechner |
Conservative Circuit Simulation on Shared-Memory Multiprocessors.  |
Workshop on Parallel and Distributed Simulation  |
1996 |
DBLP DOI BibTeX RDF |
multiprefix operation, speedup estimation, shared memory multiprocessor, parallel random access machine (PRAM), circuit simulation, conservative simulation |
| 2 | Xian-He Sun, Stuti Moitra |
Performance measurement and comparison of a set of parallel periodic and non-periodic tridiagonal solvers.  |
ISPAN  |
1996 |
DBLP DOI BibTeX RDF |
tridiagonal solvers, parallel partition LU algorithm, parallel diagonal dominant algorithm, reduced diagonal dominant algorithm, problem sizes, performance evaluation, performance, parallel algorithms, computational complexity, distributed memory systems, matrix algebra, speedup, distributed-memory machines, Intel Paragon, IBM SP2 |
| 2 | Yasuhiro Hirano, Fumiaki Miura, Tetsuji Satoh |
Extendible Hashing for Concurrent Insertions and Retrievals.  |
PDP  |
1996 |
DBLP DOI BibTeX RDF |
bucket multi-versioning, concurrent insertions, concurrent retrievals, global depth, directory entries, asynchronous modification, lock conflicts, read-only access, split bucket, simulation, concurrency control, multiprocessing systems, configuration management, speedup, file organisation, extendible hashing, processor number |
| 2 | C. S. Chang, R. Nelson |
Bounds on the Speedup and Efficiency of Partial Synchronization in Parallel Processing Systems.  |
J. ACM  |
1995 |
DBLP DOI BibTeX RDF |
synchronization, large deviations theory |
| 2 | Hans L. Bodlaender, Torben Hagerup |
Parallel Algorithms with Optimal Speedup for Bounded Treewidth.  |
ICALP  |
1995 |
DBLP DOI BibTeX RDF |
|
| 2 | Patrick C. McGeer, Kenneth L. McMillan, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli, Patrick Scaglia |
Fast discrete function evaluation using decision diagrams.  |
ICCAD  |
1995 |
DBLP DOI BibTeX RDF |
address lookups, cycle-based logic simulation, decision-diagram based function evaluation, fast discrete function evaluation, latch ports, orders-of-magnitude potential speedup, output ports, logic design, memory hierarchy, logic CAD, decision theory, circuit analysis computing, memory bandwidth, table lookup, digital circuits, logic simulators, logic function, function evaluation, multi-valued decision diagrams |
| 2 | Chen-Pin Kung, Chun-Jieh Huang, Chen-Shang Lin |
Fast fault simulation for BIST applications.  |
Asian Test Symposium  |
1995 |
DBLP DOI BibTeX RDF |
signature computation, BIST applications, combinational fault simulation, BISTSIM, demand-driven logic simulation algorithm, fault propagation methods, bit-array computation, parallel-pattern sequential simulation, speedup ratio, VLSI, VLSI, logic testing, built-in self test, integrated circuit testing, combinational circuits, digital simulation, circuit analysis computing, aliasing, test patterns, MISR |
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