Search results for "synergistic processor element"

Found 10 publication records. Showing 10 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Osamu Takahashi, Scott R. Cottier, Sang H. Dhong, Brian K. Flachs, Joel Silberman	Power-Conscious Design of the Cell Processor's Synergistic Processor Element.	IEEE Micro	2005	DBLP DOI BibTeX RDF	Synergistic processor element, power-conscious design, low power, CMOS, SPE, Cell Processor
3	Toru Asano, Joel Silberman, Sang H. Dhong, Osamu Takahashi, Michael White, Scott R. Cottier, Takaaki Nakazato, Atsushi Kawasumi, Hiroshi Yoshihara	Low-Power Design Approach of 11FO4 256-Kbyte Embedded SRAM for the Synergistic Processor Element of a Cell Processor.	IEEE Micro	2005	DBLP DOI BibTeX RDF	11 fan-out of four, 11FO4, Synergistic Processor Element, private memory, streaming processing, Cell processor, multimedia processing, scratch pad memory
2	Silvia M. Müller, Christian Jacobi 0002, Hwa-Joon Oh, Kevin D. Tran, Scott R. Cottier, Brad W. Michael, Hiroo Nishikawa, Yonetaro Totsuka, Tatsuya Namatame, Naoka Yano, Takashi Machida, Sang H. Dhong	The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
1	Masana Murase, Kanna Shimizu, Wilfred Plouffe, Masaharu Sakamoto	Effective implementation of the cell broadband engineTM isolation loader.	ACM Conference on Computer and Communications Security	2009	DBLP DOI BibTeX RDF	cell broadband engine(tm), encrypt-then-sign, substituted-ciphertext attack, multi-core, isolation
1	Daniel Jiménez-González, Xavier Martorell, Alex Ramírez	Performance Analysis of Cell Broadband Engine for High Memory Bandwidth Applications.	ISPASS	2007	DBLP DOI BibTeX RDF	arithmetic performance analysis, memory bandwidth application, synergistic processor element, DMA controller, direct memory access, element interconnect bus, bandwidth performance peak, processor component, message passing interface, data stream, single instruction multiple data, cell broadband engine, streaming programming model, processor speed
1	Jun Sung Park, Jung-Gyu Park, Hyo-Jung Song	Implementation of OpenMP Work-Sharing on the Cell Broadband Engine Architecture.	IWOMP	2007	DBLP DOI BibTeX RDF
1	Michael Gschwind	The Cell Broadband Engine: Exploiting Multiple Levels of Parallelism in a Chip Multiprocessor.	International Journal of Parallel Programming	2007	DBLP DOI BibTeX RDF	compute-transfer parallelism, multi-level application parallelism, Chip multiprocessor, Cell Broadband Engine, heterogeneous chip multiprocessor
1	Nicolas Mäding, Jens Leenstra, Juergen Pille, Rolf Sautter, Stefan Büttner, S. Ehrenreich, W. Haller	The vector fixed point unit of the synergistic processor element of the cell architecture processor.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
1	Tong Chen, Zehra Sura, Kathryn M. O'Brien, John K. O'Brien	Optimizing the Use of Static Buffers for DMA on a CELL Chip.	LCPC	2006	DBLP DOI BibTeX RDF
1	Osamu Takahashi, Russ Cook, Scott R. Cottier, Sang H. Dhong, Brian K. Flachs, Koji Hirairi, Atsushi Kawasumi, Hiroaki Murakami, Hiromi Noro, Hwa-Joon Oh, S. Onish, Juergen Pille, Joel Silberman	The circuit design of the synergistic processor element of a CELL processor.	ICCAD	2005	DBLP BibTeX RDF