Search results for "test program"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante	A genetic algorithm-based system for generating test programs for microprocessor IP cores.	ICTAI	2000	DBLP DOI BibTeX RDF	industrial property, genetic algorithm based system, test program generation, microprocessor IP cores, digital systems design trend, design-and-reuse paradigm, intellectual property cores, encrypted gate-level netlist, testability problems, automatic approach, processor cores, fault coverage figures, random approach, genetic algorithms, genetic algorithms, microprocessor chips, automatic test software, test program, electronic engineering computing
2	Andreas Apostolakis, Dimitris Gizopoulos, Mihalis Psarakis, Danilo Ravotto, Matteo Sonza Reorda	Test Program Generation for Communication Peripherals in Processor-Based SoC Devices.	IEEE Design & Test of Computers	2009	DBLP DOI BibTeX RDF
2	Loganathan Lingappan, Niraj K. Jha	Satisfiability-Based Automatic Test Program Generation and Design for Testability for Microprocessors.	IEEE Trans. VLSI Syst.	2007	DBLP DOI BibTeX RDF
2	Hani Rizk, Christos A. Papachristou, Francis G. Wolff	A Self Test Program Design Technique for Embedded DSP Cores.	J. Electronic Testing	2006	DBLP DOI BibTeX RDF	self test programs, pseudorandom BIST, LSFR, DSP, ATPG
2	Chaiyasit Manovit, Sudheendra Hangal	Completely verifying memory consistency of test program executions.	HPCA	2006	DBLP DOI BibTeX RDF
2	Ernesto Sánchez, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero, Luca Sterpone, Massimo Violante	New evolutionary techniques for test-program generation for complex microprocessor cores.	GECCO	2005	DBLP DOI BibTeX RDF	evolutionary algorithms, automatic test program generation
2	Tun Li, Dan Zhu, Yang Guo, GongJie Liu, Sikun Li	MA2TG: A Functional Test Program Generator for Microprocessor Verification.	DSD	2005	DBLP DOI BibTeX RDF
2	Tun Li, Dan Zhu, Lei Liang, Yang Guo, Sikun Li	Automatic functional test program generation for microprocessor verification.	ASP-DAC	2005	DBLP DOI BibTeX RDF
2	Haihua Shen, Lin Ma, Heng Zhang	CRPG: a configurable random test-program generator for microprocessors.	ISCAS	2005	DBLP DOI BibTeX RDF
2	Augusto Sampaio, Carlos Albuquerque, João Vasconcelos, Luckerson Cruz, Luis Figueiredo, Sérgio Cavalcante	Software test program: a software residency experience.	ICSE	2005	DBLP DOI BibTeX RDF	software residency, training experience, software engineering
2	Allon Adir, Eli Almog, Laurent Fournier, Eitan Marcus, Michal Rimon, Michael Vinov, Avi Ziv	Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification.	IEEE Design & Test of Computers	2004	DBLP DOI BibTeX RDF
2	David Dowding, Ernie Wahl, Don Organ	Extending STIL 1450 Standard for Test Program Flow.	ITC	2004	DBLP DOI BibTeX RDF
2	Ernesto Sánchez, Giovanni Squillero, Massimo Violante	Exploiting HW Acceleration for Classifying Complex Test Program Generation Problems.	EvoWorkshops	2004	DBLP DOI BibTeX RDF
2	Prabhat Mishra, Nikil Dutt	Graph-Based Functional Test Program Generation for Pipelined Processors.	DATE	2004	DBLP DOI BibTeX RDF
2	Youhui Zhang, Dongsheng Wang, Jinglei Wang, Weimin Zheng	Using Model-Based Test Program Generator for Simulation Validation.	ICESS	2004	DBLP DOI BibTeX RDF
2	Haihua Shen, Yunji Chen, Jing Huang	EmGen: An Automatic Test-Program Generation Tool for Embedded IP Cores.	ICESS	2004	DBLP DOI BibTeX RDF
2	Fulvio Corno, Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero	Code Generation for Functional Validation of Pipelined Microprocessors.	J. Electronic Testing	2004	DBLP DOI BibTeX RDF	pipelined micro processors, evolutionary algorithms, functional validation, automatic test program generation
2	Fulvio Corno, Giovanni Squillero	An Enhanced Framework for Microprocessor Test-Program Generation.	EuroGP	2003	DBLP DOI BibTeX RDF
2	Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero	Fully Automatic Test Program Generation for Microprocessor Cores.	DATE	2003	DBLP DOI BibTeX RDF
2	Li Chen, Srivaths Ravi, Anand Raghunathan, Sujit Dey	A scalable software-based self-test methodology for programmable processors.	DAC	2003	DBLP DOI BibTeX RDF	scalability, microprocessor, at-speed test, software-based self-test, test program, manufacturing test
2	Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero	Automatic Test Program Generation from RT-Level Microprocessor Descriptions. (PDF / PS)	ISQED	2002	DBLP DOI BibTeX RDF
2	Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero	Evolutionary Test Program Induction for Microprocessor Design Verification.	Asian Test Symposium	2002	DBLP DOI BibTeX RDF
2	Chad D. DeJong	Bottleneck equipment management: simulating test program methods in semiconductor assembly test factories.	Winter Simulation Conference	2001	DBLP DOI BibTeX RDF
2	Laurent Fournier, Yaron Arbetman, Moshe Levinger	Functional Verification Methodology for Microprocessors Using the Genesys Test-Program Generator-Application to the x86 Microprocessors Family.	DATE	1999	DBLP DOI BibTeX RDF
2	Hiroaki Iwashita, Satoshi Kowatari, Tsuneo Nakata, Fumiyasu Hirose	Automatic test program generation for pipelined processors.	ICCAD	1994	DBLP DOI BibTeX RDF
2	Jung-Cheun Lien, Melvin A. Breuer	Test program synthesis for modules and chips having boundary scan.	J. Electronic Testing	1993	DBLP DOI BibTeX RDF	Board and system test, test controllers, test program synthesis, built-in self-test, design-for-test, boundary scan
2	Chen-Shang Lin, Hong-Fa Ho	Automatic Functional Test Program Generation for Microprocessors.	DAC	1988	DBLP BibTeX RDF
2	Akira Taneda, Hikaru Oku, Daiji Namba	An on-line test program for peripheral devices.	AFIPS National Computer Conference	1976	DBLP DOI BibTeX RDF
1	Tai-Hua Lu, Chung-Ho Chen, Kuen-Jong Lee	Effective Hybrid Test Program Development for Software-Based Self-Testing of Pipeline Processor Cores.	IEEE Trans. VLSI Syst.	2011	DBLP DOI BibTeX RDF
1	Ian Williams, Susan Moran	Test program set data collection and data mining.	IEEE Instrum. Meas. Mag.	2010	DBLP DOI BibTeX RDF
1	Po-Hsien Chang, Li-C. Wang, Jayanta Bhadra	A kernel-based approach for functional test program generation.	ITC	2010	DBLP DOI BibTeX RDF
1	Anke Drappa, Peter Huber, Jon Vollmar	Automated test program generation for automotive devices.	ITC	2010	DBLP DOI BibTeX RDF
1	Sebastian Burckhardt, Pravesh Kothari, Madanlal Musuvathi, Santosh Nagarakatte	A randomized scheduler with probabilistic guarantees of finding bugs.	ASPLOS	2010	DBLP DOI BibTeX RDF	testing, concurrency, randomized algorithms, race conditions
1	Rahul Bhattachrya, Santosh Biswas, Siddhartha Mukhopadhyay	FPGA based chip emulation system for test development and verification of analog and mixed signal circuits (abstract only).	FPGA	2010	DBLP DOI BibTeX RDF	ams testing, concurrent test development, behavioral modeling
1	Emina Torlak, Mandana Vaziri, Julian Dolby	MemSAT: checking axiomatic specifications of memory models.	PLDI	2010	DBLP DOI BibTeX RDF	sat, bounded model checking, memory models, axiomatic specifications
1	Chen Zhao, Yunzhi Xue, Qiuming Tao, Liang Guo, Zhaohui Wang	Automated Test Program Generation for an Industrial Optimizing Compiler.	AST	2009	DBLP DOI BibTeX RDF
1	Danilo Ravotto, Edgar E. Sánchez, Matteo Sonza Reorda, Giovanni Squillero	Design validation of multithreaded architectures using concurrent threads evolution.	SBCCI	2009	DBLP DOI BibTeX RDF	simulation based techniques, functional validation
1	Heon-Mo Koo, Prabhat Mishra	Functional test generation using design and property decomposition techniques.	ACM Trans. Embedded Comput. Syst.	2009	DBLP DOI BibTeX RDF	design decomposition, property decomposition, Model checking, test generation, pipelined processor, functional validation
1	Lyl M. Ciganda, Francesco Abate, Paolo Bernardi, M. Bruno, Matteo Sonza Reorda	An enhanced FPGA-based low-cost tester platform exploiting effective test data compression for SoCs.	DDECS	2009	DBLP DOI BibTeX RDF
1	George Xenoulis, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis	Instruction-Based Online Periodic Self-Testing of Microprocessors with Floating-Point Units.	IEEE Trans. Dependable Sec. Comput.	2009	DBLP DOI BibTeX RDF
1	Jussi Mikkonen, Jung-Joo Lee, Ilpo Koskinen	Using Video with Active Markers.	AmI	2009	DBLP DOI BibTeX RDF	active marker, design, prototyping, video, infrared
1	Eric Eide, John Regehr	Volatiles are miscompiled, and what to do about it.	EMSOFT	2008	DBLP DOI BibTeX RDF	compiler defect, compiler testing, random program generation, random testing, automated testing, volatile
1	Tai-Hua Lu, Chung-Ho Chen, Kuen-Jong Lee	A hybrid software-based self-testing methodology for embedded processor.	SAC	2008	DBLP DOI BibTeX RDF	embedded processor testing, fault coverage, functional testing, software-based self-test
1	Gao YingMing, Jin RenCheng	A Novel Wireless Sensor Networks Platform for Habitat Surveillance.	CSSE	2008	DBLP DOI BibTeX RDF
1	Tai-Hua Lu, Chung-Ho Chen, Kuen-Jong Lee	A hybrid self-testing methodology of processor cores.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Rajesh Tiwari, Abhijeet Shrivastava, Mahit Warhadpande, Srivaths Ravi, Rubin A. Parekhji	A Regression Based Technique for ATE-Aware Test Data Volume Estimation of System-on-Chips.	VTS	2008	DBLP DOI BibTeX RDF	Tester, ATPG, Estimation, ATE, Test Time, Test Data Volume
1	Nektarios Kranitis, Andreas Merentitis, George Theodorou, Antonis M. Paschalis, Dimitris Gizopoulos	Hybrid-SBST Methodology for Efficient Testing of Processor Cores.	IEEE Design & Test of Computers	2008	DBLP DOI BibTeX RDF	H-SBST, RTPG, computer architecture, ATPG, functional testing, microprocessor testing, software-based self-test
1	Ewing L. Lusk, Anthony Chan	Early Experiments with the OpenMP/MPI Hybrid Programming Model.	IWOMP	2008	DBLP DOI BibTeX RDF
1	Atul Gupta, Pankaj Jalote	An approach for experimentally evaluating effectiveness and efficiency of coverage criteria for software testing.	STTT	2008	DBLP DOI BibTeX RDF	Coverage based testing, Statistical analysis, Test case generation, Experimental evaluation, Coverage criteria, Mutation operators
1	Prahladavaradan Sampath, A. C. Rajeev, K. C. Shashidhar, S. Ramesh	How to Test Program Generators? A Case Study using flex.	SEFM	2007	DBLP DOI BibTeX RDF
1	Paolo Bernardi, Michelangelo Grosso, Matteo Sonza Reorda	Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	fault-emulation, software-based testing, FPGA, path-delay
1	Sebastian Burckhardt, Rajeev Alur, Milo M. K. Martin	CheckFence: checking consistency of concurrent data types on relaxed memory models.	PLDI	2007	DBLP DOI BibTeX RDF	lock-free synchronization, shared-memory multiprocessors, multi-threading, software model checking, memory models, sequential consistency, concurrent data structures
1	Mark Doernhoefer	Surfing the net for software engineering notes.	ACM SIGSOFT Software Engineering Notes	2007	DBLP DOI BibTeX RDF
1	Fred G. Gustavson, John K. Reid, Jerzy Wasniewski	Algorithm 865: Fortran 95 subroutines for Cholesky factorization in block hybrid format.	ACM Trans. Math. Softw.	2007	DBLP DOI BibTeX RDF	Cholesky factorization and solution, Real symmetric matrices, novel packed matrix data structures, BLAS, recursive algorithms, linear systems of equations, positive definite matrices
1	Erik Larsson, Jon Persson	An Architecture for Combined Test Data Compression and Abort-on-Fail Test.	ASP-DAC	2007	DBLP DOI BibTeX RDF
1	Nianmin Yao, Feng Gao, Shaobin Cai, Wenbin Yao	A New Method of Performance Test for Network Storage.	IMSCCS	2007	DBLP DOI BibTeX RDF
1	Matthieu Tuna, Mounir Benabdenbi, Alain Greiner	At-Speed Testing of Core-Based System-on-Chip Using an Embedded Micro-Tester.	VTS	2007	DBLP DOI BibTeX RDF
1	Chung-Ho Chen, Chih-Kai Wei, Tai-Hua Lu, Hsun-Wei Gao	Software-Based Self-Testing With Multiple-Level Abstractions for Soft Processor Cores.	IEEE Trans. VLSI Syst.	2007	DBLP DOI BibTeX RDF
1	Geuk Lee, Seok Tae Kim, Inkyu Han, Chang Yong Lee, Seon Ho Park, Do Won Yi, Jung Min Oh	Security and Test Environment for SIP.	ICCSA	2007	DBLP DOI BibTeX RDF
1	Ernesto Sánchez, Giovanni Squillero	Evolutionary Techniques Applied to Hardware Optimization Problems: Test and Verification of Advanced Processors.	Advances in Evolutionary Computing for System Design	2007	DBLP DOI BibTeX RDF
1	Jun Zhou, Hans-Joachim Wunderlich	Software-based self-test of processors under power constraints.	DATE	2006	DBLP DOI BibTeX RDF	test program generation, low power test, processor test
1	Alex K. Jones, Raymond R. Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle	An automated, reconfigurable, low-power RFID tag.	DAC	2006	DBLP DOI BibTeX RDF
1	Alex K. Jones, Raymond R. Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle	A Field Programmable RFID Tag and Associated Design Flow.	FCCM	2006	DBLP DOI BibTeX RDF
1	Hongfeng Zhu, Tianhua Liu, Chuansheng Zhou, Guiran Chang	Research and Implementation of Zero-Copy Technology Based on Device Driver in Linux.	IMSCCS	2006	DBLP DOI BibTeX RDF
1	Heon-Mo Koo, Prabhat Mishra, Jayanta Bhadra, Magdy S. Abadir	Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study.	MTV	2006	DBLP DOI BibTeX RDF
1	Davide Appello, Vincenzo Tancorre, Paolo Bernardi, Michelangelo Grosso, Maurizio Rebaudengo, Matteo Sonza Reorda	On the Automation of the Test Flow of Complex SoCs.	VTS	2006	DBLP DOI BibTeX RDF
1	Ajay Khoche, Mike Rodgers, Pete O'Neil	Session Abstract.	VTS	2006	DBLP DOI BibTeX RDF
1	Virendra Singh, Michiko Inoue, Kewal K. Saluja, Hideo Fujiwara	Instruction-Based Self-Testing of Delay Faults in Pipelined Processors.	IEEE Trans. VLSI Syst.	2006	DBLP DOI BibTeX RDF
1	Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero	Efficient Techniques for Automatic Verification-Oriented Test Set Optimization.	International Journal of Parallel Programming	2006	DBLP DOI BibTeX RDF	test-set optimization, evolutionary algorithm, Validation, microprocessor
1	Samin Karim, Clinton Heinze	Experiences with the design and implementation of an agent-based autonomous UAV controller.	AAMAS Industrial Applications	2005	DBLP DOI BibTeX RDF	BDI agency, OODA, cognitively plausible models, real-time agent-based control, UAV, cognitive robotics
1	Allon Adir, Yaron Arbetman, Bella Dubrov, Yossi Lichtenstein, Michal Rimon, Michael Vinov, Massimo A. Calligaro, Andrew Cofler, Gabriel Duffy	VLIW: a case study of parallelism verification.	DAC	2005	DBLP DOI BibTeX RDF	parallelism, test generation, VLIW, functional verification, processor verification
1	Marcelo de Souza Moraes, Érika F. Cota, Luigi Carro, Flávio Rech Wagner, Marcelo Lubaszewski	A constraint-based solution for on-line testing of processors embedded in real-time applications.	SBCCI	2005	DBLP DOI BibTeX RDF	test space exploration, real-time systems, embedded processors, on-line testing, software-based self-test
1	Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante	Automatic generation of test sets for SBST of microprocessor IP cores.	SBCCI	2005	DBLP DOI BibTeX RDF	FPGA, hardware accelerator, automatic test generation, pipelined architectures, microprocessor test, test programs
1	Kazuko Kambe, Michiko Inoue, Hideo Fujiwara, Tsuyoshi Iwagaki	Efficient Constraint Extraction for Template-Based Processor Self-Test Generation.	Asian Test Symposium	2005	DBLP DOI BibTeX RDF
1	Yu-an Tan, Guo-min Lin, Hong Deng, Xue-lan Zhang	A WBEM Based Disk Array Management Provider.	CW	2005	DBLP DOI BibTeX RDF
1	Virendra Singh, Michiko Inoue, Kewal K. Saluja, Hideo Fujiwara	Instruction-based delay fault self-testing of pipelined processor cores.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Fulvio Corno, Ernesto Sánchez, Giovanni Squillero	Evolving assembly programs: how games help microprocessor validation.	IEEE Trans. Evolutionary Computation	2005	DBLP DOI BibTeX RDF
1	Luca Manetta, Laura Ollino, Massimiliano Schillaci	Use of an Evolutionary Tool for Antenna Array Synthesis.	EvoWorkshops	2005	DBLP DOI BibTeX RDF
1	Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero	Automatic Completion and Refinement of Verification Sets for Microprocessor Cores.	EvoWorkshops	2005	DBLP DOI BibTeX RDF
1	Danghui Wang, Xiaoya Fan, Deyuan Gao, Shengbing Zhang, Jianfeng An	Microprocessor Based Self Schedule and Parallel BIST for System-On-a-Chip.	ICESS	2005	DBLP DOI BibTeX RDF
1	Hong Wang 0006, Hiroyuki Takizawa, Hiroaki Kobayashi	A Workflow Management Mechanism for Peer-to-Peer Computing Platforms.	ISPA	2005	DBLP DOI BibTeX RDF
1	Giovanni Squillero	MicroGP-An Evolutionary Assembly Program Generator.	Genetic Programming and Evolvable Machines	2005	DBLP DOI BibTeX RDF	micro-processors, assembly programs generation, evolutionary algorithms
1	Lieh-Ming Wu, Kuochen Wang, Chuang-Yi Chiu	A BNF-based automatic test program generator for compatible microprocessor verification.	ACM Trans. Design Autom. Electr. Syst.	2004	DBLP DOI BibTeX RDF	Advanced microprocessor, compatibility verification, top-down recursive descent parsing method, coverage, automatic program generator, BNF
1	Fulvio Corno, Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero	Automatic Test Program Generation: A Case Study.	IEEE Design & Test of Computers	2004	DBLP DOI BibTeX RDF
1	Kazuko Kambe, Michiko Inoue, Hideo Fujiwara	Efficient Template Generation for Instruction-Based Self-Test of Processor Cores.	Asian Test Symposium	2004	DBLP DOI BibTeX RDF
1	Antonis M. Paschalis, Dimitris Gizopoulos	Effective Software-Based Self-Test Strategies for On-Line Periodic Testing of Embedded Processors.	DATE	2004	DBLP DOI BibTeX RDF
1	Hani Rizk, Christos A. Papachristou, Francis G. Wolff	Designing Self Test Programs for Embedded DSP Cores.	DATE	2004	DBLP DOI BibTeX RDF
1	Kalpesh Zinjuwadia, Perry Alexander	DVTG and Test Harnessing using Rosetta Specifications.	ECBS	2004	DBLP DOI BibTeX RDF	Rosetta, DVTG, Test Initialization, Test Harnessing, XML, Test Vectors, Test Requirements, Test Scenarios
1	Wee Kheng Leow, Siau-Cheng Khoo, Yi Sun	Automated Generation of Test Programs from Closed Specifications of Classes and Test Cases.	ICSE	2004	DBLP DOI BibTeX RDF
1	Alfred L. Crouch	Future Trends in Test: The Adoption and Use of Low Cost Structural Testers.	ITC	2004	DBLP DOI BibTeX RDF
1	Baolin Deng, Wolfram Glauert	Formal Description of Test Specification and ATE Architecture for Mixed-Signal Test.	ITC	2004	DBLP DOI BibTeX RDF
1	Ankan K. Pramanick, Ramachandran Krishnaswamy, Mark Elston, Toshiaki Adachi, Harsanjeet Singh, Bruce R. Parnas	Test Programming Environment in a Modular, Open Architecture Test System.	ITC	2004	DBLP DOI BibTeX RDF
1	Bart Vermeulen, Camelia Hora, Bram Kruseman, Erik Jan Marinissen, Robert Van Rijsinge	Trends in Testing Integrated Circuits.	ITC	2004	DBLP DOI BibTeX RDF
1	Wee Kheng Leow, Siau-Cheng Khoo, Tiong Hoe Loh, Vivy Suhendra	Heuristic Search with Reachability Tests for Automated Generation of Test Programs.	ASE	2004	DBLP DOI BibTeX RDF
1	W. Lindsay, Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero	Automatic Test Programs Generation Driven by Internal Performance Counters.	MTV	2004	DBLP DOI BibTeX RDF
1	Qiao Liu, Egil Pedersen	Direct perception of collision danger information for safe marine navigation.	SMC	2004	DBLP DOI BibTeX RDF
1	Alonzo Kelly, Omead Amidi, Mike Bode, Michael Happold, Herman Herman, Thomas Pilarski, Peter Rander, Anthony Stentz, Nick Vallidis, Randy Warner	Toward Reliable Off Road Autonomous Vehicles Operating in Challenging Environments.	ISER	2004	DBLP DOI BibTeX RDF
1	Davide Appello, Alessandra Fudoli, Vincenzo Tancorre, Paolo Bernardi, Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda	A BIST-based Solution for the Diagnosis of Embedded Memories Adopting Image Processing Techniques.	J. Electronic Testing	2004	DBLP DOI BibTeX RDF	IEEE P1500, diagnosis, Hough transform, embedded memories
1	Mohammad H. Tehranipour, Seid Mehdi Fakhraie, Zainalabedin Navabi, M. R. Movahedin	A Low-Cost At-Speed BIST Architecture for Embedded Processor and SRAM Cores.	J. Electronic Testing	2004	DBLP DOI BibTeX RDF	BIST architecture, DSP/microprocessor, UTS-DSP, bit/word-oriented memory, memory testing, march test
1	Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero	Automatic Test Program Generation for Pipeline Processors.	SAC	2003	DBLP BibTeX RDF