Search results for "transient errors"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Wei Zhang 0002	Computing and Minimizing Cache Vulnerability to Transient Errors.	IEEE Design & Test of Computers	2009	DBLP DOI BibTeX RDF
2	Karthikeyan Lingasubramanian, Sanjukta Bhanja	An Error Model to Study the Behavior of Transient Errors in Sequential Circuits.	VLSI Design	2009	DBLP DOI BibTeX RDF
2	Amlan Ganguly, Partha Pratim Pande, Benjamin Belzer, Cristian Grecu	Design of Low Power & Reliable Networks on Chip Through Joint Crosstalk Avoidance and Multiple Error Correction Coding.	J. Electronic Testing	2008	DBLP DOI BibTeX RDF	Crosstalk avoidance, Multiple error correction, Joint codes, Low power, Network on Chip, Transient errors
2	Mallik Kandala, Wei Zhang 0002, Laurence Tianruo Yang	An Area-Efficient Approach to Improving Register File Reliability against Transient Errors.	AINA Workshops	2007	DBLP DOI BibTeX RDF
2	W. Kenneth Jenkins, Chandrasekhar Radhakrishnan, S. Pal	Fault Tolerant Signal Processing for Masking Transient Errors in VLSI Signal Processors.	ISCAS	2007	DBLP DOI BibTeX RDF
2	Chun-Yi Lee, Hung-Mao Lin, Fang-Min Wang, James Chien-Mo Li	Cyclic-CPRS : A Diagnosis Technique for BISTed Circuits for Nano-meter Technologies.	ASP-DAC	2007	DBLP DOI BibTeX RDF	systematic defects, cyclic-column parity row selection technique, built-in self tested circuits, cyclic scan chains, masking circuitry, transient errors, circuit under test, nanometer technologies
2	Feihui Li, Mahmut T. Kandemir	Increasing Data TLB Resilience to Transient Errors.	ISVLSI	2005	DBLP DOI BibTeX RDF
2	Gokhan Memik, Mahmut T. Kandemir, Ozcan Ozturk	Increasing Register File Immunity to Transient Errors.	DATE	2005	DBLP DOI BibTeX RDF
2	Wei Zhang 0002	Computing Cache Vulnerability to Transient Errors and Its Implication.	DFT	2005	DBLP DOI BibTeX RDF
2	Wei-Je Huang, Edward J. McCluskey	Transient errors and rollback recovery in LZ compression.	PRDC	2000	DBLP DOI BibTeX RDF	LZ compression, Lempel-Ziv compression, compressed codewords, rollback error recovery schemes, data integrity, data integrity, fault tolerant computing, data compression, error detection, system recovery, transient faults, rollback recovery, compression ratio, lossless data compression, transient errors, data reconstruction, hardware redundancy
2	Bob Janssens, W. Kent Fuchs	The Performance of Cache-Based Error Recovery in Multiprocessors.	IEEE Trans. Parallel Distrib. Syst.	1994	DBLP DOI BibTeX RDF	cache-based error recovery performance, cache-based checkpointing, rollback error recovery, shared-memorymultiprocessors, inherent redundancy, computation state, rollback propagation, EncoreMultimax, recovery schemes, cache-based schemes, low performance overhead, checkpoint interval, performance evaluation, performance evaluation, virtual machines, multiprocessors, redundancy, memory hierarchy, shared memory systems, system recovery, buffer storage, parallel applications, cache coherence protocol, transient errors, cache replacement policy, address traces
1	Ilia Polian, John P. Hayes, Sudhakar M. Reddy, Bernd Becker	Modeling and Mitigating Transient Errors in Logic Circuits.	IEEE Trans. Dependable Sec. Comput.	2011	DBLP DOI BibTeX RDF
1	Li Tang, Shuai Wang, Jie S. Hu, Xiaobo Sharon Hu	Characterizing the L1 Data Cache's Vulnerability to Transient Errors in Chip-Multiprocessors.	ISVLSI	2011	DBLP DOI BibTeX RDF
1	Qiaoyan Yu, Meilin Zhang, Paul Ampadu	Exploiting inherent information redundancy to manage transient errors in NoC routing arbitration.	NOCS	2011	DBLP BibTeX RDF
1	Wei Zhang	Replica victim caching to improve cache reliability against transient errors.	IJHPSA	2010	DBLP DOI BibTeX RDF
1	Long Wang, Zbigniew Kalbarczyk, Ravishankar K. Iyer, Arun Iyengar	Checkpointing virtual machines against transient errors.	IOLTS	2010	DBLP DOI BibTeX RDF
1	Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala	Design of self correcting radiation hardened digital circuits using decoupled ground bus.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	self-repairing circuits, soft errors, radiation hardening
1	Wei Zhang	Boosting the Performance of Software-Based Transient Errors Tolerant Techniques through Compiler Optimizations.	Journal of Circuits, Systems, and Computers	2009	DBLP DOI BibTeX RDF
1	Derek Graham, Per Strid, Scott Roy, Fernando Rodriguez	A low-tech solution to avoid the severe impact of transient errors on the IP interconnect.	DSN	2009	DBLP DOI BibTeX RDF
1	Carmela Noro Grando, Carlos Arthur Lang Lisbôa, Alvaro Freitas Moreira, Luigi Carro	Invariant checkers: An efficient low cost technique for run-time transient errors detection.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Shuo Wang, Lei Wang 0003, Faquir Jain	Towards achieving reliable and high-performance nanocomputing via dynamic redundancy allocation.	JETC	2009	DBLP DOI BibTeX RDF	Nanoscale architecture, hardware reliability, redundancy allocation, performance, redundant design
1	Adeel Israr, Abdulhadi Shoufan, Sorin A. Huss	An efficient reliability evaluation approach for system-level design of embedded systems.	ISQED	2009	DBLP DOI BibTeX RDF
1	Jin Sun, Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang	NBTI aware workload balancing in multi-core systems.	ISQED	2009	DBLP DOI BibTeX RDF
1	Shoubhik Mukhopadhyay, Curt Schurgers, Debashis Panigrahi, Sujit Dey	Model-Based Techniques for Data Reliability in Wireless Sensor Networks.	IEEE Trans. Mob. Comput.	2009	DBLP DOI BibTeX RDF
1	Sobeeh Almukhaizim, Yiorgos Makris, Yu-Shen Yang, Andreas G. Veneris	On the Minimization of Potential Transient Errors and SER in Logic Circuits Using SPFD.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Lin Huang, Feng Yuan, Qiang Xu	On reliable modular testing with vulnerable test access mechanisms.	DAC	2008	DBLP DOI BibTeX RDF	modular testing, test access mechanisms, reliable test
1	Gordon B. Bell, Mikko H. Lipasti	Skewed redundancy.	PACT	2008	DBLP DOI BibTeX RDF	distributed processing, error tolerance, memory-level parallelism
1	Mojtaba Mehrara, Todd M. Austin	Exploiting selective placement for low-cost memory protection.	TACO	2008	DBLP DOI BibTeX RDF	Partial memory protection, selective placement, transient faults, fault-tolerant design, memory system design
1	Matthias May, Matthias Alles, Norbert Wehn	A Case Study in Reliability-Aware Design: A Resilient LDPC Code Decoder.	DATE	2008	DBLP DOI BibTeX RDF
1	Karthik Pattabiraman, Nithin Nakka, Zbigniew Kalbarczyk, Ravishankar K. Iyer	SymPLFIED: Symbolic program-level fault injection and error detection framework.	DSN	2008	DBLP DOI BibTeX RDF
1	Yang Ding, Mahmut T. Kandemir, Padma Raghavan, Mary Jane Irwin	A helper thread based EDP reduction scheme for adapting application execution in CMPs.	IPDPS	2008	DBLP DOI BibTeX RDF
1	Jing Yu, María Jesús Garzarán, Marc Snir	Efficient software checking for fault tolerance.	IPDPS	2008	DBLP DOI BibTeX RDF
1	Mahdi Fazeli, Reza Farivar, Seyed Ghassem Miremadi	Error Detection Enhancement in PowerPC Architecture-based Embedded Processors.	J. Electronic Testing	2008	DBLP DOI BibTeX RDF	Physical fault injection, Power supply disturbances, Concurrent error detection, Control flow checking
1	Jun Yan, Wei Zhang 0002	Evaluating instruction cache vulnerability to transient errors.	SIGARCH Computer Architecture News	2007	DBLP DOI BibTeX RDF
1	Satish Narayanasamy, Ayse Kivilcim Coskun, Brad Calder	Transient fault prediction based on anomalies in processor events.	DATE	2007	DBLP DOI BibTeX RDF
1	Niranjan Soundararajan, Angshuman Parashar, Anand Sivasubramaniam	Mechanisms for bounding vulnerabilities of processor structures.	ISCA	2007	DBLP DOI BibTeX RDF	redundant threading, microarchitecture, transient faults
1	Ismail Kadayif, Mahmut T. Kandemir	Modeling and improving data cache reliability.	SIGMETRICS	2007	DBLP DOI BibTeX RDF	vulnerability factors, reliability, data integrity, soft errors, data caches
1	Kypros Constantinides, Stephen Plaza, Jason A. Blome, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Bin Zhang 0011, Michael Orshansky	Architecting a reliable CMP switch architecture.	TACO	2007	DBLP DOI BibTeX RDF	CMP switch, reliability, defect-tolerance
1	Mehdi Kamal, Somayyeh Koohi, Shaahin Hessabi	Empirical Analysis of the Dependence of Test Power, Delay, Energy and Fault Coverage on the Architecture of LFSR-Based TPGs.	DFT	2007	DBLP DOI BibTeX RDF
1	M. Marshall, G. Russell	A Low Power Information Redundant Concurrent Error Detecting Asynchronous Processor.	DSD	2007	DBLP DOI BibTeX RDF
1	Albert Meixner, Daniel J. Sorin	Error Detection Using Dynamic Dataflow Verification.	PACT	2007	DBLP DOI BibTeX RDF
1	Jing Yu, María Jesús Garzarán	Compiler Optimizations for Fault Tolerance Software Checking.	PACT	2007	DBLP DOI BibTeX RDF
1	Elias Mizan, Tileli Amimeur, Margarida F. Jacome	Self-Imposed Temporal Redundancy: An Efficient Technique to Enhance the Reliability of Pipelined Functional Units.	SBAC-PAD	2007	DBLP DOI BibTeX RDF
1	John P. Hayes, Ilia Polian, Bernd Becker	An Analysis Framework for Transient-Error Tolerance.	VTS	2007	DBLP DOI BibTeX RDF
1	David Brooks, Robert P. Dick, Russ Joseph, Li Shang	Power, Thermal, and Reliability Modeling in Nanometer-Scale Microprocessors.	IEEE Micro	2007	DBLP DOI BibTeX RDF	process variation, power models, reliability models, modeling of computer architecture, thermal analysis
1	Han Liang, Piyush Mishra, Kaijie Wu	Error Correction On-Demand: A Low Power Register Transfer Level Concurrent Error Correction Technique.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	Concurrent error detection, register-transfer level, single-event upsets, hardware redundancy
1	Chong Zhao, Xiaoliang Bai, Sujit Dey	Evaluating Transient Error Effects in Digital Nanometer Circuits.	IEEE Transactions on Reliability	2007	DBLP DOI BibTeX RDF
1	Jun Won Choi, Byonghyo Shim, Andrew C. Singer, Nam Ik Cho	Low-Power Filtering Via Minimum Power Soft Error Cancellation.	IEEE Transactions on Signal Processing	2007	DBLP DOI BibTeX RDF
1	Hüseyin Hacihabiboglu, Banu Gunel, Ahmet M. Kondoz	Analysis of Root Displacement Interpolation Method for Tunable Allpass Fractional-Delay Filters.	IEEE Transactions on Signal Processing	2007	DBLP DOI BibTeX RDF
1	João Muranho, Paula Prata, Mário Zenha Rela, João Gabriel Silva	Failure Boundedness in Discrete Applications.	LADC	2007	DBLP DOI BibTeX RDF	Failure avoidance, Discrete applications, Fail-bounded model, Experimental Dependability Evaluation, Petri nets
1	Jing Yu, María Jesús Garzarán, Marc Snir	Techniques for Efficient Software Checking.	LCPC	2007	DBLP DOI BibTeX RDF
1	Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin	Reliability-aware Co-synthesis for Embedded Systems.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	design methodology, scheduling algorithm, embedded system design
1	Guilin Chen, Mahmut T. Kandemir, Feihui Li	Energy-aware computation duplication for improving reliability in embedded chip multiprocessors.	ASP-DAC	2006	DBLP DOI BibTeX RDF
1	Vladimir Stojanovic, R. Iris Bahar, Jennifer Dworak, Richard Weiss	A cost-effective implementation of an ECC-protected instruction queue for out-of-order microprocessors.	DAC	2006	DBLP DOI BibTeX RDF	instruction queue, reliability, error correcting codes
1	Kypros Constantinides, Stephen Plaza, Jason A. Blome, Bin Zhang 0011, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Michael Orshansky	BulletProof: a defect-tolerant CMP switch architecture.	HPCA	2006	DBLP DOI BibTeX RDF
1	Chong Zhao, Sujit Dey	Improving Transient Error Tolerance of Digital VLSI Circuits Using RObustness COmpiler (ROCO).	ISQED	2006	DBLP DOI BibTeX RDF
1	Oguz Ergin, Osman S. Unsal, Xavier Vera, Antonio González	Exploiting Narrow Values for Soft Error Tolerance.	Computer Architecture Letters	2006	DBLP DOI BibTeX RDF
1	Joseph J. Sharkey, Nayef Abu-Ghazeleh, Dmitry V. Ponomarev, Kanad Ghose, Aneesh Aggarwal	Trade-Offs in Transient Fault Recovery Schemes for Redundant Multithreaded Processors.	HiPC	2006	DBLP DOI BibTeX RDF
1	Richard Banach, Marco Bozzano	Retrenchment, and the Generation of Fault Trees for Static, Dynamic and Cyclic Systems.	SAFECOMP	2006	DBLP DOI BibTeX RDF
1	Guangyu Chen, Mahmut T. Kandemir	Improving java virtual machine reliability for memory-constrained embedded systems.	DAC	2005	DBLP DOI BibTeX RDF	dual execution, java virtual machine, transient error
1	Subhasish Mitra, Tanay Karnik, Norbert Seifert, Ming Zhang	Logic soft errors in sub-65nm technologies design and CAD challenges.	DAC	2005	DBLP DOI BibTeX RDF	architectural vulnerability factor, built-in soft error resilience, derating, error blocking, error detection, recovery, soft error
1	Jun Yan, Wei Zhang 0002	Compiler-guided register reliability improvement against soft errors.	EMSOFT	2005	DBLP DOI BibTeX RDF	register lifetime, reliability, soft errors, register file
1	Donald J. Berndt, Alison Watkins	High Volume Software Testing using Genetic Algorithms.	HICSS	2005	DBLP DOI BibTeX RDF
1	M. Wasiur Rashid, Edwin J. Tan, Michael C. Huang, David H. Albonesi	Exploiting Coarse-Grain Verification Parallelism for Power-Efficient Fault Tolerance.	IEEE PACT	2005	DBLP DOI BibTeX RDF
1	Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee, Cecilia Metra	Load and Logic Co-Optimization for Design of Soft-Error Resistant Nanometer CMOS Circuits.	IOLTS	2005	DBLP DOI BibTeX RDF
1	Subhasish Mitra, Norbert Seifert, Ming Zhang, Quan Shi, Kee Sup Kim	Subhasish Mitra, Norbert Seifert, Ming Zhang, Quan Shi, Kee Sup Kim.	IEEE Computer	2005	DBLP DOI BibTeX RDF
1	R. Iris Bahar, Mehdi Baradaran Tahoori, Sandeep K. Shukla, Fabrizio Lombardi	Guest Editors' Introduction: Challenges for Reliable Design at the Nanoscale.	IEEE Design & Test of Computers	2005	DBLP DOI BibTeX RDF	nanoscale design, defect rates, reliability, verification, redundancy, Moore's Law
1	Ravishankar K. Iyer, Nithin Nakka, Zbigniew Kalbarczyk, Subhasish Mitra	Recent Advances and New Avenues in Hardware-Level Reliability Support.	IEEE Micro	2005	DBLP DOI BibTeX RDF	Reliability, Error-checking, Testing and Fault-Tolerance, Redundant design
1	M. Wasiur Rashid, Edwin J. Tan, Michael C. Huang, David H. Albonesi	Power-Efficient Error Tolerance in Chip Multiprocessors.	IEEE Micro	2005	DBLP DOI BibTeX RDF	Fault-tolerance, low-power design
1	Crescenzo D'Alessandro, Delong Shang, Alexandre V. Bystrov, Alexandre Yakovlev	PSK Signalling on NoC Buses.	PATMOS	2005	DBLP DOI BibTeX RDF
1	Guilin Chen, Mahmut T. Kandemir, Mustafa Karaköy	Memory Space Conscious Loop Iteration Duplication for Reliable Execution.	SAS	2005	DBLP DOI BibTeX RDF
1	Shuo Chen, Jun Xu, Zbigniew Kalbarczyk, Ravishankar K. Iyer, Keith Whisnant	Modeling and evaluating the security threats of transient errors in firewall software.	Perform. Eval.	2004	DBLP DOI BibTeX RDF
1	P. D. Hyde, G. Russell	ASSEC: An Asynchronous Self-Checking RISC-based Processor.	DSD	2004	DBLP DOI BibTeX RDF
1	A. J. KleinOsowski, Kevin KleinOsowski, Vijay Rangarajan, Priyadarshini Ranganath, David J. Lilja	The Recursive NanoBox Processor Grid: A Reliable System Architecture for Unreliable Nanotechnology Devices.	DSN	2004	DBLP DOI BibTeX RDF	architecture, VLSI, fault-injection, nanotechnology, fault-masking
1	Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee, Adit D. Singh	Sizing CMOS Circuits for Increased Transient Error Tolerance.	IOLTS	2004	DBLP DOI BibTeX RDF
1	P. D. Hyde, G. Russell	A Comparative Study of the Design of Synchronous and Asynchronous Self-Checking RISC Processors.	IOLTS	2004	DBLP DOI BibTeX RDF
1	Atif M. Memon, Qing Xie	Using Transient/Persistent Errors to Develop Automated Test Oracles for Event-Driven Software.	ASE	2004	DBLP DOI BibTeX RDF
1	Alan Messer, Philippe Bernadat, Guangrui Fu, DeQing Chen, Zoran Dimitrijevic, David Jeun Fung Lie, Durga Mannaru, Alma Riska, Dejan S. Milojicic	Susceptibility of Commodity Systems and Software to Memory Soft Errors.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF	commodity, Java, operating systems, recovery, Soft errors, memory errors
1	S. Goldberg, Shambhu J. Upadhyaya, W. Kent Fuchs	Recovery schemes for mesh arrays utilizing dedicated spares.	IEEE Transactions on Reliability	2004	DBLP DOI BibTeX RDF
1	Warren A. Hunt Jr.	Mechanical Mathematical Methods for Microprocessor Verification.	CAV	2004	DBLP DOI BibTeX RDF
1	Parag K. Lala, B. Kiran Kumar	An Architecture for Self-Healing Digital Systems.	J. Electronic Testing	2003	DBLP DOI BibTeX RDF	B-cell, T-cell, cloning, transient errors, genetic code
1	Parag K. Lala, B. Kiran Kumar	An FPGA architecture with built-in error correction capability.	FPGA	2003	DBLP DOI BibTeX RDF
1	Zdenek Pohl, Rudolf Matousek, Jiri Kadlec, Milan Tichý, Miroslav Lícko	Lattice adaptive filter implementation for FPGA.	FPGA	2003	DBLP DOI BibTeX RDF
1	O. Goloubeva, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante	Soft-Error Detection Using Control Flow Assertions.	DFT	2003	DBLP DOI BibTeX RDF
1	D. J. Beauregard, Zbigniew Kalbarczyk, Ravishankar K. Iyer, Savio N. Chau, Leon Alkalai	Error-Injection-Based Failure Characterization of the IEEE 1394 Bus.	IOLTS	2003	DBLP DOI BibTeX RDF
1	Shuo Chen, Jun Xu, Ravishankar K. Iyer, Keith Whisnant	Evaluating the Security Threat of Firewall Data Corruption Caused by Transient Errors.	DSN	2002	DBLP DOI BibTeX RDF
1	R. S. Srivatsa, W. Kenneth Jenkins	Learning characteristics of adaptive fault tolerant filters in the presence of transient errors.	ISCAS	2002	DBLP DOI BibTeX RDF
1	Christian Galke, Matthias Pflanz, Heinrich Theodor Vierhaus	On-line Detection and Compensation of Transient Errors in Processor Pipeline-Structures.	IOLTW	2002	DBLP DOI BibTeX RDF
1	Shih-Chang Lai, Shih-Lien Lu, Jih-Kwon Peir	Ditto Processor.	DSN	2002	DBLP DOI BibTeX RDF
1	Henrique Madeira, Raphael R. Some, Francisco Moreira, Diamantino Costa, David A. Rennels	Experimental Evaluation of a COTS System for Space Application.	DSN	2002	DBLP DOI BibTeX RDF
1	Nahmsuk Oh, Edward J. McCluskey	Procedure Call Duplication: Minimization of Energy Consumption with Constrained Error Detection Latency. (PDF / PS)	DFT	2001	DBLP DOI BibTeX RDF	software error detection, low power technique, low energy technique, procedure duplication and instruction duplication, Fault tolerance
1	David A. Rennels, Riki Hwang	Recovery in Fault-Tolerant Distributed Microcontrollers.	DSN	2001	DBLP DOI BibTeX RDF
1	Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Marco Torchiano	A Source-to-Source Compiler for Generating Dependable Software.	SCAM	2001	DBLP DOI BibTeX RDF
1	Avi Mendelson, Neeraj Suri	Designing High-Performance & Reliable Superscalar Architectures: The out of Order Reliable Superscalar (O3RS) Approach.	DSN	2000	DBLP DOI BibTeX RDF	Transient Errors/Recovery, Pipelines, Superscalar architectures
1	Kishor S. Trivedi, Kalyanaraman Vaidyanathan, Katerina Goseva-Popstojanova	Modeling and Analysis of Software Aging and Rejuvenation.	Annual Simulation Symposium	2000	DBLP DOI BibTeX RDF	Pro-active Fault Management, Transactions-based Software Systems, Markov Regenerative Models, Measurement-based Dependability Evaluation, Software Aging
1	Maurizio Rebaudengo, Matteo Sonza Reorda, Marco Torchiano, Massimo Violante	An Experimental Evaluation of the Effectiveness of Automatic Rule-Based Transformations for Safety-Critical Applications. (PDF / PS)	DFT	2000	DBLP DOI BibTeX RDF
1	Wei-Je Huang, Nirmal R. Saxena, Edward J. McCluskey	A Reliable LZ Data Compressor on Reconfigurable Coprocessors.	FCCM	2000	DBLP DOI BibTeX RDF
1	Alain Fagot, Jacques Chassin de Kergommeaux	Systematic Assessment of the Overhead of Tracing Parallel Programs.	PDP	1996	DBLP DOI BibTeX RDF	Instant Replay, Performance Evaluation, Remote Procedure Calls, Parallel Debugging
1	Jennifer Rexford, Niraj K. Jha	Partitioned Encoding Schemes for Algorithm-Based Fault Tolerance in Massively Parallel Systems.	IEEE Trans. Parallel Distrib. Syst.	1994	DBLP DOI BibTeX RDF	error detectioncodes, massivelyparallel systems, partitioned encoding, matrix algorithms, partitionedscheme, checksum code, scalability, parallel architectures, fault tolerant computing, software reliability, error correction codes, error detection, error correction, matrix algebra, algorithm based fault tolerance, ABET, transient errors
1	Marco Schneider	Self-Stabilization.	ACM Comput. Surv.	1993	DBLP DOI BibTeX RDF	fault tolerance, stabilization, convergence, self-stabilization, transient errors, self-stabilizing systems, transient failures