Search results for "ultra low voltage"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Kaushik Roy	Ultra low voltage CMOS.	ISLPED	2009	DBLP DOI BibTeX RDF	adaptive supply scaling, nano-scale cmos system, ultra low voltage design, ultra-dynamic voltage scaling
3	Omid Mirmotahari, Yngvar Berg	Ultra Low Voltage High Speed Differential CMOS Inverter.	PATMOS	2008	DBLP DOI BibTeX RDF	Floating-Gate (FG), High-Speed, Ultra Low Voltage (ULV)
2	Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott A. Mahlke	Enabling ultra low voltage system operation by tolerating on-chip cache failures.	ISLPED	2009	DBLP DOI BibTeX RDF	fault-tolerant cache, low voltage operation, dynamic voltage scaling
2	Yngvar Berg, Omid Mirmotahari	Ultra low-voltage switched current mirror.	DDECS	2009	DBLP DOI BibTeX RDF
2	Fady Abouzeid, Sylvain Clerc, Fabian Firmin, Marc Renaudin, Gilles Sicard	A 45nm CMOS 0.35v-optimized standard cell library for ultra-low power applications.	ISLPED	2009	DBLP DOI BibTeX RDF	bose choudhury hocquenghem, design, low power, methodology, logic, energy, cmos, library, circuit, subthreshold, ultra low voltage
2	Burak Çatli, Mona Mostafa Hella	A 0.5-V 3.6/5.2 GHz CMOS multi-band LC VCO for ultra low-voltage wireless applications.	ISCAS	2008	DBLP DOI BibTeX RDF
2	Omid Mirmotahari, Yngvar Berg	Low Voltage Design against Power Analysis Attacks.	DELTA	2008	DBLP DOI BibTeX RDF	Low Voltage (LV), Floating-Gate (FG) and supply current analysis, Differential Power Analysis (DPA), Ultra Low Voltage (ULV)
2	Masaaki Iijima, Masayuki Kitamura, Masahiro Numa, Akira Tada, Takashi Ipposhi	Ultra Low Voltage Operation with Bootstrap Scheme for Single Power Supply SOI-SRAM.	VLSI Design	2007	DBLP DOI BibTeX RDF
2	S. Alireza Zabihian, Reza Lotfi	Ultra-Low-Voltage, Low-Power, High-Speed Operational Amplifiers Using Body-Driven Gain-Boosting Technique.	ISCAS	2007	DBLP DOI BibTeX RDF
2	Vivienne Sze, Anantha P. Chandrakasan	A 0.4-V UWB baseband processor.	ISLPED	2007	DBLP DOI BibTeX RDF	baseband processor, parallelism, ultra-wideband, ultra-low voltage
2	Luis H. C. Ferreira, Tales Cleber Pimenta, Robson L. Moreno, Wilhelmus A. M. Van Noije	Ultra low-voltage ultra low-power CMOS threshold voltage reference.	SBCCI	2006	DBLP DOI BibTeX RDF	low power, CMOS, low voltage, threshold voltage, voltage reference
2	Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino	Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Paul Ampadu	Ultra-low voltage VLSI: are we there yet?	ISCAS	2006	DBLP DOI BibTeX RDF
2	Kiyoo Itoh, Masashi Horiguchi, Takayuki Kawahara	Ultra-low voltage nano-scale embedded RAMs.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Jiangmin Gu, Chip-Hong Chang	Ultra low voltage, low power 4-2 compressor for high speed multiplications.	ISCAS	2003	DBLP DOI BibTeX RDF
2	Saeid Mehrmanesh, Mohammad B. Vahidfar, Hesam Amir Aslanzadeh, Seyed Mojtaba Atarodi	An ultra low-voltage Gm-C filter for video applications.	ISCAS	2003	DBLP DOI BibTeX RDF
2	Hesam Amir Aslanzadeh, Saeid Mehrmanesh, Mohammad B. Vahidfar, Amin Quasem Safarian, Reza Lotfi	A 1-V 1-mW high-speed class AB operational amplifier for high-speed low power pipelined A/D converters using "Slew Boost" technique.	ISLPED	2003	DBLP DOI BibTeX RDF	CMOS analog circuit, Slew Boost technique, class AB, low power, high speed, operational amplifier, pipelined analog to digital converter, ultra low voltage
2	Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin	Exploiting sinh and tanh shaped ultra low-voltage floating-gate transconductance amplifiers to reduce harmonic distortion.	ISCAS	2001	DBLP DOI BibTeX RDF
2	Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin	Floating-gate CMOS differential analog inverter for ultra low-voltage applications.	ISCAS	2001	DBLP DOI BibTeX RDF
2	Martin Margala, Srdjan Dragic, Ahmed El-Abasiry, Samuel Ekpe, Viera Stopjaková	I-V Fast IDDQ Current Sensor for On-Line Mixed-Signal/Analog Test.	IOLTW	2000	DBLP DOI BibTeX RDF	VLSI, Testing, Sensors, Iddq, Ultra-Low-Voltage, Current
2	Yngvar Berg, Tor Sverre Lande	Tunable current mirrors for ultra low voltage.	ISCAS	1999	DBLP DOI BibTeX RDF
2	C.-H. Lin, M. Ismail	Design and analysis of an ultra low-voltage CMOS class-AB V-I converter for dynamic range enhancement.	ISCAS	1999	DBLP DOI BibTeX RDF
1	Alexander Edward, Pak Kwong Chan	An Ultra-Low Voltage Analog Front End for Strain Gauge Sensory System Application in 0.18 µm CMOS.	IEICE Transactions	2012	DBLP BibTeX RDF
1	Yongtae Kim, Peng Li	An ultra-low voltage digitally controlled low-dropout regulator with digital background calibration.	ISQED	2012	DBLP DOI BibTeX RDF
1	Tadashi Yasufuku, Koji Hirairi, Yu Pu, Yun Fei Zheng, Ryo Takahashi, Masato Sasaki, Hiroshi Fuketa, Atsushi Muramatsu, Masahiro Nomura, Hirofumi Shinohara, Makoto Takamiya, Takayasu Sakurai	24% Power reduction by post-fabrication dual supply voltage control of 64 voltage domains in VDDmin limited ultra low voltage logic circuits.	ISQED	2012	DBLP DOI BibTeX RDF
1	Bojan Maric, Jaume Abella, Mateo Valero	ADAM: an efficient data management mechanism for hybrid high and ultra-low voltage operation caches.	ACM Great Lakes Symposium on VLSI	2012	DBLP DOI BibTeX RDF
1	David Bol, Julien De Vos, Cédric Hocquet, Francois Botman, François Durvaux, Sarah Boyd, Denis Flandre, Jean-Didier Legat	A 25MHz 7μW/MHz ultra-low-voltage microcontroller SoC in 65nm LP/GP CMOS for low-carbon wireless sensor nodes.	ISSCC	2012	DBLP DOI BibTeX RDF
1	Michael B. Henry, Leyla Nazhandali	Design techniques for functional-unit power gating in the Ultra-Low-Voltage region.	ASP-DAC	2012	DBLP DOI BibTeX RDF
1	Arash Ahmadpour	An Ultra Low-Voltage and Low-Power OTA Using Bulk-Input Technique and Its Application in Active-RC Filters.	Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Farzan Rezaei, Seyed Javad Azhari	Ultra low voltage, high performance operational transconductance amplifier and its application in a tunable Gm-C filter.	Microelectronics Journal	2011	DBLP DOI BibTeX RDF
1	Ajay Balankutty, Peter R. Kinget	An Ultra-Low Voltage, Low-Noise, High Linearity 900-MHz Receiver With Digitally Calibrated In-Band Feed-Forward Interferer Cancellation in 65-nm CMOS.	J. Solid-State Circuits	2011	DBLP DOI BibTeX RDF
1	Cédric Hocquet, Dina Kamel, Francesco Regazzoni, Jean-Didier Legat, Denis Flandre, David Bol, François-Xavier Standaert	Harvesting the potential of nano-CMOS for lightweight cryptography: an ultra-low-voltage 65 nm AES coprocessor for passive RFID tags.	J. Cryptographic Engineering	2011	DBLP DOI BibTeX RDF
1	Hsieh-Hung Hsieh, Huan-Sheng Chen, Ping-Hsi Hung, Liang-Hung Lu	Experimental 5-GHz RF Frontends for Ultra-Low-Voltage and Ultra-Low-Power Operations.	IEEE Trans. VLSI Syst.	2011	DBLP DOI BibTeX RDF
1	Massimo Alioto	Impact of NMOS/PMOS imbalance in Ultra-Low Voltage CMOS standard cells.	ECCTD	2011	DBLP DOI BibTeX RDF
1	Snorre Aunet	On the reliability of ultra low voltage circuits built from minority-3 gates.	ECCTD	2011	DBLP DOI BibTeX RDF
1	Takayasu Sakurai	Designing ultra-low voltage logic.	ISLPED	2011	DBLP BibTeX RDF
1	Xin Zhao, Jeremy R. Tolbert, Chang Liu, Saibal Mukhopadhyay, Sung Kyu Lim	Variation-aware clock network design methodology for ultra-low voltage (ULV) circuits.	ISLPED	2011	DBLP BibTeX RDF
1	Toshiro Hiramoto	Ultra-low-voltage operation: device perspective.	ISLPED	2011	DBLP BibTeX RDF
1	Ryota Sekimoto, Akira Shikata, Tadahiro Kuroda, Hiroki Ishikuro	A 40nm 50S/s-8MS/s ultra low voltage SAR ADC with timing optimized asynchronous clock generator.	ESSCIRC	2011	DBLP DOI BibTeX RDF
1	Nathan Ickes, Yildiz Sinangil, Francesco Pappalardo 0002, Elio Guidetti, Anantha P. Chandrakasan	A 10 pJ/cycle ultra-low-voltage 32-bit microprocessor system-on-chip.	ESSCIRC	2011	DBLP DOI BibTeX RDF
1	Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester	Pipeline strategy for improving optimal energy efficiency in ultra-low voltage design.	DAC	2011	DBLP DOI BibTeX RDF
1	Ken Takeuchi, Ken Chang, Kevin Zhang, Tadaaki Yamauchi, Roberto Gastaldi	Ultra-low voltage VLSIs for energy efficient systems.	ISSCC	2011	DBLP DOI BibTeX RDF
1	Abbas BanaiyanMofrad, Houman Homayoun, Nikil Dutt	FFT-cache: a flexible fault-tolerant cache architecture for ultra low voltage operation.	CASES	2011	DBLP DOI BibTeX RDF
1	Wei Deng, Kenichi Okada, Akira Matsuzawa	An ultra-low-voltage LC-VCO with a frequency extension circuit for future 0.5-V clock generation.	ASP-DAC	2011	DBLP DOI BibTeX RDF
1	Hans Kristian Otnes Berge, Snorre Aunet	Multi-objective optimization of minority-3 functions for ultra-low voltage supplies.	ISCAS	2011	DBLP DOI BibTeX RDF
1	Sylvain Clerc, Fady Abouzeid, Fabrice Argoud, Abhay Kumar, Rajesh Kumar, Philippe Roche	A 240mV 1MHz, 340mV 10MHz, 40nm CMOS, 252 bits frame decoder using ultra-low voltage circuit design platform.	ICECS	2011	DBLP DOI BibTeX RDF
1	Hans Kristian Otnes Berge, Amir Hasanbegovic, Snorre Aunet	Muller C-elements based on minority-3 functions for ultra low voltage supplies.	DDECS	2011	DBLP DOI BibTeX RDF
1	Farzan Rezaei, Seyed Javad Azhari	Ultra low-voltage, rail-to-rail input/output stage Operational Transconductance Amplifier (OTA) with high linearity and its application in a Gm-C filter.	ISQED	2010	DBLP DOI BibTeX RDF
1	Yngvar Berg	Novel ultra low-voltage and high speed domino CMOS logic.	VLSI-SoC	2010	DBLP DOI BibTeX RDF
1	Yngvar Berg	Static ultra-low-voltage high-speed CMOS logic and latches.	VLSI-SoC	2010	DBLP DOI BibTeX RDF
1	Yngvar Berg	Ultra low voltage and high speed CMOS flip-flop using floating-gates.	VLSI-SoC	2010	DBLP DOI BibTeX RDF
1	Meng-Fan Chang, Shu-Meng Yang, Chih-Wei Liang, Chih-Chyuang Chiang, Pi-Feng Chiu, Ku-Feng Lin, Yuan-Hua Chu, Wen-Chin Wu, Hiroyuki Yamauchi	A 0.29V embedded NAND-ROM in 90nm CMOS for ultra-low-voltage applications.	ISSCC	2010	DBLP DOI BibTeX RDF
1	Travis Kleeburg, Jeffrey Loo, Nathaniel J. Guilar, Erin G. Fong, Rajeevan Amirtharajah	Ultra-low-voltage circuits for sensor applications powered by free-space optics.	ISSCC	2010	DBLP DOI BibTeX RDF
1	Chao Lu, Sang Phill Park, Vijay Raghunathan, Kaushik Roy	Efficient power conversion for ultra low voltage micro scale energy transducers.	DATE	2010	DBLP BibTeX RDF
1	Christian Peters, Jonas Handwerker, Dominic Maurath, Yiannos Manoli	An ultra-low-voltage active rectifier for energy harvesting applications.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Yngvar Berg	Ultra low voltage static carry generate circuit.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Kyung Ki Kim, Haiqing Nan, Ken Choi	Power gating for ultra-low voltage nanometer ICs.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Yngvar Berg	Novel ultra low voltage transconductance amplifier.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Yngvar Berg	Novel high speed and ultra low voltage CMOS flip-flops.	ICECS	2010	DBLP DOI BibTeX RDF
1	Yngvar Berg	Ultra low-voltage bidirectional current mirror using clocked semi-floating-gate transistors.	DDECS	2010	DBLP DOI BibTeX RDF
1	Amara Amara, Bastien Giraud, Olivier Thomas	An Innovative 6T Hybrid SRAM Cell in sub-32 nm Double-Gate MOS Technology.	DELTA	2010	DBLP DOI BibTeX RDF	SRAM cell, Planar Double-Gate (DG), Fully Depleted SOI (FD-SOI), read and write tradeoffs, Ultra Low Voltage (ULV)
1	Yifan He, Yu Pu, Richard P. Kleihorst, Zhenyu Ye, Anteneh A. Abbo, Sebastian M. Londono, Henk Corporaal	Xetal-Pro: an ultra-low energy and high throughput SIMD processor.	DAC	2010	DBLP DOI BibTeX RDF	Xetal-Pro, hybrid memory system, SIMD, low-energy
1	Mingoo Seok, David Blaauw, Dennis Sylvester	Clock network design for ultra-low power applications.	ISLPED	2010	DBLP DOI BibTeX RDF	ultra-low power, robust design, clock network
1	Yu-lung Lo, Wei-Bin Yang, Ting-Sheng Chao, Kuo-Hsing Cheng	High-Speed and Ultra-Low-Voltage Divide-by-4/5 Counter for Frequency Synthesizer.	IEICE Transactions	2009	DBLP BibTeX RDF
1	Raj Amirtharajah	Ultra-low-voltage-circuit design.	ISSCC	2009	DBLP DOI BibTeX RDF
1	Yngvar Berg	Novel high speed and ultra low voltage CMOS flip-flop.	ICECS	2009	DBLP DOI BibTeX RDF
1	Yngvar Berg	Ultra low voltage semi-floating-gate transconductance amplifier based on binary inverters.	ICECS	2009	DBLP DOI BibTeX RDF
1	Zihua Qu, Meng Zhang, Jianhui Wu	A switched-capacitor CMOS voltage reference for ultra low-voltage and ultra low-power operation.	ICECS	2009	DBLP DOI BibTeX RDF
1	Yngvar Berg, Omid Mirmotahari	Clocked semi-floating-gate ultra low-voltage inverting current mirror.	SoCC	2009	DBLP DOI BibTeX RDF
1	Yngvar Berg, Omid Mirmotahari	Clocked semi-floating-gate ultra low-voltage symmetric and bidirectional current mirror.	SoCC	2009	DBLP DOI BibTeX RDF
1	Yngvar Berg, Omid Mirmotahari	Low voltage precharge CMOS logic.	DDECS	2009	DBLP DOI BibTeX RDF
1	Luis H. C. Ferreira, Tales Cleber Pimenta, Robson L. Moreno	An Ultra-Low-Voltage Ultra-Low-Power Weak Inversion Composite MOS Transistor: Concept and Applications.	IEICE Transactions	2008	DBLP DOI BibTeX RDF
1	Ranjith Kumar, Volkan Kursun	Temperature-adaptive voltage tuning for enhanced energy efficiency in ultra-low-voltage circuits.	Microelectronics Journal	2008	DBLP DOI BibTeX RDF
1	Yngvar Berg, Omid Mirmotahari, Johannes Goplen Lomsdalen, Snorre Aunet	High Speed Ultra Low Voltage CMOS inverter.	ISVLSI	2008	DBLP DOI BibTeX RDF
1	Jaydeep P. Kulkarni, Keejong Kim, Sang Phill Park, Kaushik Roy	Process variation tolerant SRAM array for ultra low voltage applications.	DAC	2008	DBLP DOI BibTeX RDF	Schmitt trigger SRAM, low voltage/sub-threshold SRAM, process tolerance
1	Chien-Hung Kuo, Huai-Juan Xie	An ultra low-voltage multibit delta-sigma modulator for audio-band application.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Farshad Moradi, Dag T. Wisland, Snorre Aunet, Hamid Mahmoodi, Tuan Vu Cao	65NM sub-threshold 11T-SRAM for ultra low voltage applications.	SoCC	2008	DBLP DOI BibTeX RDF
1	Martin Donoval, Martin Daricek, Viera Stopjaková, Juraj Marek	On-chip Integration of Magnetic Force Sensing Current Monitors.	DDECS	2008	DBLP DOI BibTeX RDF
1	Jorg Daniels, Wim Dehaene, Michiel Steyaert, Andreas Wiesbauer	A/D conversion using an Asynchronous Delta-Sigma Modulator and a time-to-digital converter.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Taro Niiyama, Piao Zhe, Koichi Ishida, Masami Murakata, Makoto Takamiya, Takayasu Sakurai	Dependence of Minimum Operating Voltage (VDDmin) on Block Size of 90-nm CMOS Ring Oscillators and its Implications in Low Power DFM.	ISQED	2008	DBLP DOI BibTeX RDF
1	Mu-Tien Chang, Po-Tsang Huang, Wei Hwang	A robust ultra-low power asynchronous FIFO memory with self-adaptive power control.	SoCC	2008	DBLP DOI BibTeX RDF
1	Jawar Singh, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty	A subthreshold single ended I/O SRAM cell design for nanometer CMOS technologies.	SoCC	2008	DBLP DOI BibTeX RDF
1	Masaaki Iijima, Masayuki Kitamura, Masahiro Numa, Akira Tada, Takashi Ipposhi, Shigeto Maegawa	Boosted Voltage Scheme with Active Body-Biasing Control on PD-SOI for Ultra Low Voltage Operation.	IEICE Transactions	2007	DBLP DOI BibTeX RDF
1	Luis H. C. Ferreira, Tales Cleber Pimenta, Robson L. Moreno	An Ultra Low-Voltage Ultra Low-Power CMOS Threshold Voltage Reference.	IEICE Transactions	2007	DBLP DOI BibTeX RDF
1	Bo Fu, Paul Ampadu	Comparative Analysis of Ultra-Low Voltage Flip-Flops for Energy Efficiency.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Shouri Chatterjee, Yannis P. Tsividis, Peter R. Kinget	Ultra-Low Voltage Analog Integrated Circuits.	IEICE Transactions	2006	DBLP DOI BibTeX RDF
1	Chi-Ying Tsui, Hui Shao, Wing-Hung Ki, Feng Su	Ultra-low voltage power management circuit and computation methodology for energy harvesting applications.	ASP-DAC	2006	DBLP DOI BibTeX RDF
1	M. Abdulai, Peter R. Kinget	A 0.5 V fully differential gate-input operational transconductance amplifier with intrinsic common-mode rejection.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Chih-Jen Cheng, Shuenn-Yuh Lee	A low-voltage adaptive switched-current SDM for bio-acquisition microsystems.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Olivier Thomas, Amara Amara	Ultra low voltage design considerations of SOI SRAM memory cells.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Stephen C. Terry, Mohammad M. Mojarradi, Benjamin J. Blalock, Jesse A. Richmond	Adaptive gate biasing: a new solution for body-driven current mirrors.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	SOI analog, body driving, current mirrors, ultra-low-voltage analog circuit design
1	Yanjie Wang, M. Zamin Khan, Kris Iniewski	A 0.65V, 1.9mW CMOS Low-Noise Amplifier at 5GHz.	IWSOC	2005	DBLP DOI BibTeX RDF
1	Quoc-Hoang Duong, Trung-Kien Nguyen, Sang-Gug Lee	Ultra low-voltage low-power exponential voltage-mode circuit with tunable output range.	ISCAS	2004	DBLP BibTeX RDF
1	Olivier Thomas, Amara Amara	An SOI 4 transistors self-refresh ultra-low-voltage memory cell.	ISCAS	2003	DBLP DOI BibTeX RDF
1	Yngvar Berg, Snorre Aunet, Øivind Næss, Johannes Goplen Lomsdalen, Mats Høvin	Exploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiers.	ISCAS	2003	DBLP DOI BibTeX RDF
1	Yamu Hu, Mohumud Sowan	A 900 mV 25µW high PSRR CMOS voltage reference dedicated to implantable micro-devices.	ISCAS	2003	DBLP DOI BibTeX RDF
1	Wanli Jiang, Eric Peterson	Performance Comparison of VLV, ULV, and ECR Tests.	J. Electronic Testing	2003	DBLP DOI BibTeX RDF	very low voltage test, dynamic current test, test threshold, test effectiveness, test efficiency
1	S. S. Rajput, S. S. Jamuar	Ultra low voltage current mirror op amp and its applications.	APCCAS	2002	DBLP DOI BibTeX RDF
1	Wanli Jiang, Erik Peterson	Performance Comparison of VLV, ULV, and ECR Tests.	VTS	2002	DBLP DOI BibTeX RDF
1	Yngvar Berg, Snorre Aunet, Øivind Næss, Henning Gundersen, Mats Høvin	Extreme low-voltage floating-gate CMOS transconductance amplifier.	ISCAS	2001	DBLP DOI BibTeX RDF