Search results for "verification"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
7	S. K. Panda, Arnab Roy, P. P. Chakrabarti, Rajeev Kumar	Simulation-based verification using Temporally Attributed Boolean Logic.	ACM Trans. Design Autom. Electr. Syst.	2008	DBLP DOI BibTeX RDF	Bus verification, instruction semantics verification, interrupt testing, offline-online verification algorithm, simulation based verification, temporal logic, timing verification
7	Grant Martin	Verification by the pound.	IEEE Design & Test of Computers	2005	DBLP DOI BibTeX RDF	complex ICs, dynamic verification, verification methodologies, hardware verification languages, formal verification, functional verification
7	Pao-Ann Hsiung, Farn Wang, Ruey-Cheng Chen	On the verification of Wireless Transaction Protocol using SGM and RED. (PDF / PS)	RTCSA	2000	DBLP DOI BibTeX RDF	Wireless Transaction Protocol verification, SGM, process concurrency, clock variables, discrete variables, intelligent permutation, explosion factors, scalable verification, State-Graph Manipulators, world standard, large clock constants, large discrete constants, Region Encoding Diagram, state-space size explosions, WTP verification, real time systems, protocols, data structures, data structures, formal verification, formal verification, mobile communication, Wireless Application Protocol, state spaces, RED, state-space methods, reduction techniques
6	Harry Foster	Assertion-Based Verification: Industry Myths to Realities (Invited Tutorial).	CAV	2008	DBLP DOI BibTeX RDF	Simulation, Formal Verification, Debugging, Assertion, Functional Verification, Property Specification, Assertion-Based Verification
6	Brigitte Wirtz	Average prototypes for stroke-based signature verification.	ICDAR	1997	DBLP DOI BibTeX RDF	stroke-based signature verification, average prototypes, enrolment subsystem, verification subsystem, reference construction, verification rates, position-based averaging, time-based averaging, representative input signatures, varying stroke structures, missing strokes, additional strokes, natural stroke structure, input signatures, handwriting recognition, error rate, dynamic signature verification
6	S. Yamane	The verification technique of real-time systems using probabilities. (PDF / PS)	RTCSA	1996	DBLP DOI BibTeX RDF	performance properties, dense time model, dense time statecharts, automatic verification method, dense time model checking, real-time systems, reliability, formal specification, formal verification, formal verification, temporal logic, probabilities, verification technique
6	Luan Ling Lee, Toby Berger, Erez Aviczer	Reliable On-Line Human Signature Verification Systems. (PDF / PS)	IEEE Trans. Pattern Anal. Mach. Intell.	1996	DBLP DOI BibTeX RDF	human signature verification, point-of-sale, point-of-delivery, Signature verification, forgery, on-line signature verification, dynamic signature verification
6	David Cyrluk, Mandayam K. Srivas	Theorem proving: not an esoteric diversion, but the unifying framework for industrial verification. (PDF / PS)	ICCD	1995	DBLP DOI BibTeX RDF	industrial hardware verification, industrial verification, formal verification, logic testing, theorem proving, theorem prover, hardware verification
6	Ajay J. Daga, William P. Birmingham	A symbolic-simulation approach to the timing verification of interacting FSMs. (PDF / PS)	ICCD	1995	DBLP DOI BibTeX RDF	symbolic-simulation approach, interacting FSMs, timing verifier, complex sequential circuit verification, combinational paths, inherently modular nature, symbolic simulation verification methodology, formal verification, logic testing, finite state machines, finite state machines, sequential circuits, circuit analysis computing, timing verification
6	Jainendra Kumar, Noel R. Strader, Jeff Freeman, Michael Miller	Emulation verification of the Motorola 68060. (PDF / PS)	ICCD	1995	DBLP DOI BibTeX RDF	emulation verification, Motorola 68060, hardware logic emulation, configurable hardware, circuit verification, pseudo-random verification vectors, software application programs, formal verification, microprocessors, logic CAD, reconfigurable architectures, digital simulation, circuit analysis computing, hardware description languages, hardware description language, RTL, microprocessor chips, HDL, gate-level
5	Aythami Morales, Miguel Angel Ferrer-Ballester, Marcos Faúndez-Zanuy, Joan Fabregas, Guillermo Gonzalez, Javier Garrido, Ricardo Ribalda, Javier Ortega, Manuel Freire	Biometric System Verification Close to "Real World" Conditions.	COST 2101/2102 Conference	2009	DBLP DOI BibTeX RDF	hand-geometry verification, contact-less, online signature verification, speech verification, Biometric, face verification
5	Pradip A. Thaker	Holistic verification: myth or magic bullet?	DAC	2009	DBLP DOI BibTeX RDF	SoC verification, mixed-signal verification, power management verification, emulation
5	Geoffrey Ying, Andreas Kuehlmann, Kenneth S. Kundert, Georges G. E. Gielen, Eric Grimme, Martin O'Leary, Sandeep Tare, Warren Wong	Guess, solder, measure, repeat: how do I get my mixed-signal chip right?	DAC	2009	DBLP DOI BibTeX RDF	Verilog-AMS, analog behavioral modeling, low power verification, mixed-signal verification, VHDL, SPICE, functional verification, Verilog, performance verification
5	Robert Beers	Pre-RTL formal verification: an intel experience.	DAC	2008	DBLP DOI BibTeX RDF	TLC, explicit state enumeration, microarchitecture verification, formal verification, protocol verification, TLA+
5	Alicia Strang, David Potts, Shankar Hemmady	A Holistic Approach to SoC Verification.	ISQED	2008	DBLP DOI BibTeX RDF	holistic verification, verification management, right-brained thinking, verification, debug, SoC, visualization environments
5	Ahmed Bouajjani, Peter Habermehl, Tomás Vojnar	Verification of parametric concurrent systems with prioritised FIFO resource management.	Formal Methods in System Design	2008	DBLP DOI BibTeX RDF	Parameterised verification, Infinite-state system verification, Cut off, Parameterised networks of processes, Model checking, Formal verification, Resource sharing
5	Pavlína Vareková, Pavel Moravec 0002, Ivana Cerná, Barbora Zimmerova	Effective verification of systems with a dynamic number of components.	SAVCBS	2007	DBLP DOI BibTeX RDF	dynamic number of components, formal verification, software verification, component-based systems, finite-state systems
5	Claude Marché	Jessie: an intermediate language for Java and C verification.	PLPV	2007	DBLP DOI BibTeX RDF	behavioral properties, verification conditions generator, verification
5	Haiyan Xiong, Paul Curzon, Sofiène Tahar, Ann Blandford	Providing a formal linkage between MDG and HOL.	Formal Methods in System Design	2007	DBLP DOI BibTeX RDF	Verification system correctness, Hybrid verification systems, Formal hardware verification, Usability verification
5	Kanna Shimizu, Sanjay Gupta, Tatsuya Koyama, Takashi Omizo, Jamee Abdulhafiz, Larry McConville, Todd Swanson	Verification of the cell broadband engineTM processor.	DAC	2006	DBLP DOI BibTeX RDF	directed random verification, processor reference model, trace-based verification, hierarchical verification
5	Edgar L. Romero, Marius Strum, Wang Jiang Chau	Comparing two testbench methods for hierarchical functional verification of a bluetooth baseband adaptor.	CODES+ISSS	2005	DBLP DOI BibTeX RDF	verification strategy, optimization, functional verification, coverage analysis, hierarchical verification
5	Sergey Polyakov, Assaf Schuster	Verification of the Java Causality Requirements.	Haifa Verification Conference	2005	DBLP DOI BibTeX RDF	Java, Verification, Complexity, Concurrency, Multithreading, Shared Memory, Memory Model
5	I. S. W. B. Prasetya, A. Azurat, Tanja E. J. Vos, Arthur van Leeuwen	Building Verification Condition Generators by Compositional Extensions.	SEFM	2005	DBLP DOI BibTeX RDF	modular verification, verification tool, verification technique
5	Victor Berman	An update on IEEE P1647: The e system verification language.	IEEE Design & Test of Computers	2005	DBLP DOI BibTeX RDF	IEEE P1647, e language, verification process automation, verification, standardization, functional verification
5	Iñigo Ugarte, Pablo Sanchez	Verification of Embedded Systems Based on Interval Analysis.	International Journal of Parallel Programming	2005	DBLP DOI BibTeX RDF	Embedded system verification, design for verification, interval analysis, assertion-based verification
5	Flor Ramírez Rioja, Mariko Nakano-Miyatake, Héctor M. Pérez Meana, Karina Toscano	Dynamics features Extraction for on-Line Signature verification. (PDF / PS)	CONIELECOMP	2004	DBLP DOI BibTeX RDF	dynamics verification, extraction of dynamics characteristics, forgery detection and off-line signature verification, Signature verification
5	Issa Traoré, Demissie B. Aredo	Enhancing Structured Review with Model-Based Verification. (PDF / PS)	IEEE Trans. Software Eng.	2004	DBLP DOI BibTeX RDF	Structured review, prototype verification system (PVS), model-based verification, UML, formal methods, OCL, validation and verification
5	Dariusz Z. Lejtman, Susan E. George	On-line Handwritten Signature Verification Using Wavelets and Back-propagation Neural Networks. (PDF / PS)	ICDAR	2001	DBLP DOI BibTeX RDF	Handwritten signature verification, Neural networks, Pattern recognition, Wavelet transform, On-line signature verification, Dynamic signature verification
5	Balkhis Abu Bakar, Tomasz Janowski	Automated Result Verification with AWK. (PDF / PS)	ICECCS	2000	DBLP DOI BibTeX RDF	AWK, result-verification, result-based specifications, result verification, formal specification, formal verification, specification, software components, error detection, program generators
5	Vangalur S. Alagar, D. Muthiayen	Towards a mechanical verification of real-time reactive systems modeled in UML. (PDF / PS)	RTCSA	2000	DBLP DOI BibTeX RDF	Prototype Verification System, real-time systems, UML, Unified Modeling Language, formal specification, object-oriented programming, program verification, specification languages, PVS, notation, safety-critical applications, real-time reactive systems, mechanical verification, design analysis, object-based systems
5	Pei-Hsin Ho, Adrian J. Isles, Timothy Kam	Formal verification of pipeline control using controlled token nets and abstract interpretation.	ICCAD	1998	DBLP DOI BibTeX RDF	controlled token net, pipeline control verification, model checking, formal verification, computer-aided design, abstract interpretation, functional verification, processor verification
5	Eric Y. T. Juan, Jeffrey J. P. Tsai, Tadao Murata	A new compositional method for condensed state-space verification. (PDF / PS)	HASE	1996	DBLP DOI BibTeX RDF	compositional method, condensed state-space verification, large-scale systems analysis, condensation rules, tightly coupled modules, reachable marking detection, Petri nets, program verification, reachability analysis, concurrent systems, compositional verification, deadlock detection, dynamic behavior, dynamic properties, state space explosion
5	Florian Krohm, Andreas Kuehlmann, Arjen Mets	The use of random simulation in formal verification. (PDF / PS)	ICCD	1996	DBLP DOI BibTeX RDF	random simulation, BDD-based verification, counter example pattern, design partitioning, Boolean reasoning, formal verification, formal verification, hardware designs, functional equivalence
5	Radu Negulescu, Janusz A. Brzozowski	Relative liveness: from intuition to automated verification. (PDF / PS)	ASYNC	1995	DBLP DOI BibTeX RDF	relative liveness, finite trace theory, safety condition, hierarchical verification theorems, program verification, safety, multiprocessing systems, automata, finite automata, liveness, equivalence, multiprocessing programs, automated verification
5	Riccardo Focardi, Roberto Gorrieri, V. Panini	The security checker: a semantics-based tool for the verification of security properties. (PDF / PS)	CSFW	1995	DBLP DOI BibTeX RDF	security checker, semantics-based tool, security properties verification, security process algebra, concurrency workbench, formal specification, formal verification, specifications, process algebra, confidentiality, security of data, automatic verification
5	Yatin Vasant Hoskote, Dinos Moundanos, Jacob A. Abraham	Automatic extraction of the control flow machine and application to evaluating coverage of verification vectors. (PDF / PS)	ICCD	1995	DBLP DOI BibTeX RDF	control flow machine, verification vectors, formal verification, logic testing, digital simulation, circuit analysis computing, design verification, functional specification
5	Xu-Hong Xiao, Ru-Wei Dai	A hierarchical on-line Chinese signature verification system. (PDF / PS)	ICDAR	1995	DBLP DOI BibTeX RDF	Chinese signature verification, static features, dynamic features, statistic decision, input primitive string, reference primitive string, attributed automaton, reference databases, feature extraction, feature extraction, handwriting recognition, template matching, on-line, signature verification, verification processes
5	H. Samsom, Frank H. M. Franssen, Francky Catthoor, Hugo De Man	System level verification of video and image processing specifications.	ISSS	1995	DBLP DOI BibTeX RDF	formal verification method, front-end telecom, image processing specifications, loop ordering, system level verification, image processing, computational complexity, formal specification, complexity, formal verification, video processing, numerical computing
5	Nicolas Halbwachs, Fabienne Lagnier, Christophe Ratel	Programming and Verifying Real-Time Systems by Means of the Synchronous Data-Flow Language LUSTRE. (PDF / PS)	IEEE Trans. Software Eng.	1992	DBLP DOI BibTeX RDF	data-flow language LUSTRE, synchronous data-flow language, critical real-time systems, ergonomy, dataflow approach, traditional description tools, verification tool LESAR, critical properties, real-time systems, parallel programming, program verification, program verification, parallel languages, verification methods, formal design
5	Bernard Berthomieu, Michel Diaz	Modeling and Verification of Time Dependent Systems Using Time Petri Nets. (PDF / PS)	IEEE Trans. Software Eng.	1991	DBLP DOI BibTeX RDF	time dependent systems, explicit values, time-dependent systems, verification, formal specification, parallel programming, Petri nets, protocols, formal verification, specification, program verification, concurrent systems, time Petri nets, communication systems, alternating bit protocol
4	Jaeha Kim	Mixed-Signal System Verification: A High-Speed Link Example.	CAV	2009	DBLP DOI BibTeX RDF	analog and mixed-signal verification, analog design intent, linear system models
4	Rajeev K. Ranjan, Claudionor Coelho, Sebastian Skalberg	Beyond verification: leveraging formal for debugging.	DAC	2009	DBLP DOI BibTeX RDF	behavioral indexing, post-silicon debugging, traceless debugging, formal verification, debugging, property verification
4	Jean Souyris, Virginie Wiels, David Delmas, Hervé Delseny	Formal Verification of Avionics Software Products.	FM	2009	DBLP DOI BibTeX RDF	avionics software, verification, formal verification, static analysis, Abstract Interpretation, safety, development process
4	Bernadette Dorizzi, Raffaele Cappelli, Matteo Ferrara, Dario Maio, Davide Maltoni, Nesma Houmani, Sonia Garcia-Salicetti, Aurélien Mayoue	Fingerprint and On-Line Signature Verification Competitions at ICB 2009.	ICB	2009	DBLP DOI BibTeX RDF	Technical Evaluations, Signature Categorization, Entropy, Fingerprint Verification, On-line signature Verification
4	Walid Karam, Chafic Mokbel, Hanna Greige, Gérard Chollet	Audio-Visual Identity Verification and Robustness to Imposture.	ICB	2009	DBLP DOI BibTeX RDF	audio-visual forgery, talking-face imposture, voice conversion, biometric verification robustness, Identity verification, face animation
4	Edison Mera, Pedro López-García, Manuel V. Hermenegildo	Integrating Software Testing and Run-Time Checking in an Assertion Verification Framework.	ICLP	2009	DBLP DOI BibTeX RDF	static/dynamic debugging, program verification, unit testing, assertions, run-time verification
4	Chien-Ju Ho, Kuan-Ta Chen	On formal models for social verification.	KDD Workshop on Human Computation	2009	DBLP DOI BibTeX RDF	Amazon Mechanical Turk, sequential verification, simultaneous verification, game theory, human computation, games with a purpose
4	Howard Barringer, Klaus Havelund, David E. Rydeheard, Alex Groce	Rule Systems for Runtime Verification: A Short Tutorial.	RV	2009	DBLP DOI BibTeX RDF	Java, temporal logic, AspectJ, Python, Runtime verification, log file analysis, code instrumentation, rule systems
4	Ingo Feinerer, Gernot Salzer	A comparison of tools for teaching formal software verification.	Formal Asp. Comput.	2009	DBLP DOI BibTeX RDF	Formal software verification, Frege Program Prover, Key system, Perfect developer, Prototype verification system
4	Eyad Alkassar, Mark A. Hillebrand, Dirk Leinenbach, Norbert Schirmer, Artem Starostin, Alexandra Tsyban	Balancing the Load.	J. Autom. Reasoning	2009	DBLP DOI BibTeX RDF	Pervasive formal verification, Software verification, Systems verification
4	Huu Hai Nguyen, Wei-Ngan Chin	Enhancing Program Verification with Lemmas.	CAV	2008	DBLP DOI BibTeX RDF	Lemma Proving, Lemma Application, Program Verification, Separation Logic, Entailment
4	Ekaterina Auer, Wolfram Luther	Numerical Verification Assessment in Computational Biomechanics.	Numerical Validation in Current Hardware Architectures	2008	DBLP DOI BibTeX RDF	Numerical verification assessment, result verification, validation, uncertainty
4	Leila Jemni Ben Ayed, Fatma Siala	Specification and Verification of Multi-agent Systems Interaction Protocols Using a Combination of AUML and Event B.	DSV-IS	2008	DBLP DOI BibTeX RDF	Multi-Agent System, verification, specification, Event B, AUML
4	Yoav Hollander	Is Verification Getting Too Complex?	Haifa Verification Conference	2008	DBLP DOI BibTeX RDF
4	Daniel Jackson	Hazards of Verification.	Haifa Verification Conference	2008	DBLP DOI BibTeX RDF
4	Bican Xia, Lu Yang, Naijun Zhan	Program Verification by Reduction to Semi-algebraic Systems Solving.	ISoLA	2008	DBLP DOI BibTeX RDF	Semi-Algebraic Systems, Program Verification, Invariants, Quantifier Elimination, Ranking Functions, Polynomial Programs
4	Manfred Broy	Architecture Based Specification and Verification of Embedded Software Systems (Work in Progress).	ISoLA	2008	DBLP DOI BibTeX RDF	Large Scale Embedded Software Systems, Comprehensive Architecture, Verification, Specification
4	Donato Impedovo, Giuseppe Pirlo, Mario Refice	Handwritten Signature and Speech: Preliminary Experiments on Multiple Source and Classifiers for Personal Identity Verification.	IWCF	2008	DBLP DOI BibTeX RDF	Biometry, Signature Verification, Speaker Verification, Personal Authentication, Multi-expert system
4	Wonhong Nam, P. Madhusudan, Rajeev Alur	Automatic symbolic compositional verification by learning assumptions.	Formal Methods in System Design	2008	DBLP DOI BibTeX RDF	Regular language learning, Formal verification, Symbolic model checking, Compositional verification, Assume-guarantee reasoning, Hypergraph partitioning
4	Anubhav Gupta, Kenneth L. McMillan, Zhaohui Fu	Automated assumption generation for compositional verification.	Formal Methods in System Design	2008	DBLP DOI BibTeX RDF	L*, Model checking, Formal verification, Decision tree, SAT, Compositional verification, Assume-guarantee
4	Joonhyuk Yoo, Manoj Franklin	Hierarchical Verification for Increasing Performance in Reliable Processors.	J. Electronic Testing	2008	DBLP DOI BibTeX RDF	Active verification management, Filter checker, Correctness non-critically, Fault tolerance, Performance, Hierarchical verification
4	André Platzer, Edmund M. Clarke	Computing Differential Invariants of Hybrid Systems as Fixedpoints.	CAV	2008	DBLP DOI BibTeX RDF	verification of hybrid systems, verification logic, fixedpoint engine, differential invariants
4	Domagoj Babic, Alan J. Hu	Exploiting Shared Structure in Software Verification Conditions.	Haifa Verification Conference	2007	DBLP DOI BibTeX RDF
4	Aarti Gupta	From Hardware Verification to Software Verification: Re-use and Re-learn.	Haifa Verification Conference	2007	DBLP DOI BibTeX RDF
4	Robert P. Kurshan	Scaling Commercial Verification to Larger Systems.	Haifa Verification Conference	2007	DBLP DOI BibTeX RDF
4	Mark A. Hillebrand, Wolfgang J. Paul	On the Architecture of System Verification Environments.	Haifa Verification Conference	2007	DBLP DOI BibTeX RDF
4	Elliot Barlas, Tevfik Bultan	Netstub: a framework for verification of distributed java applications.	ASE	2007	DBLP DOI BibTeX RDF	testing and verification of, model checking, automated verification
4	Patrice Chalin, Perry R. James, George Karabotsos	An integrated verification environment for JML: architecture and early results.	SAVCBS	2007	DBLP DOI BibTeX RDF	JML4, integrated verification environment, Eclipse, java modeling language
4	Judith A. Markowitz	The Many Roles of Speaker Classification in Speaker Verification and Identification.	Speaker Classification	2007	DBLP DOI BibTeX RDF	speaker authentication, SIV, anti-speaker, disguised voice, speaker variability, verification, authentication, biometric, identification, speaker identification, speaker verification, speaker segmentation, speaker clustering, speaker classification
4	Omar Ochoa, Irbis Gallegos, Steve Roach, Ann Q. Gates	Towards a Tool for Generating Aspects from MEDL and PEDL Specifications for Runtime Verification.	RV	2007	DBLP DOI BibTeX RDF	Java-MaC, Software Assurance, Aspect Oriented Programming, Runtime Verification, Runtime Monitoring
4	Devinder Thapa, Sang C. Park, Chang Mok Park, Gi-Nam Wang	Modeling, verification, and implementation of PLC program using timed-MPSG.	SCSC	2007	DBLP DOI BibTeX RDF	modeling and verification (M&V), symbolic model verification (SMV), timed-MPSG (message based part state graph), programmable logic controller (PLC)
4	Praveen Tiwari, Raj S. Mitra	Hybrid Verification of Protocol Bridges.	IEEE Design & Test of Computers	2007	DBLP DOI BibTeX RDF	serial protocol, hybrid verification, protocol bridge, model checking, formal verification
4	Abdul Wahab, Geok See Ng, A. Jonatan	Integrated Biometric Verification System Using Soft Computing Approach.	Neural Processing Letters	2007	DBLP DOI BibTeX RDF	biometric verification, false acceptance, false rejection, fuzzy neural network, fingerprint verification, minutiae
4	Alper Sen, Vijay K. Garg	Formal Verification of Simulation Traces Using Computation Slicing.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	Simulation, formal verification, temporal logic, partial order, runtime verification, lattice theory
4	Kun Peng, Colin Boyd, Ed Dawson	Batch zero-knowledge proof and verification and its applications.	ACM Trans. Inf. Syst. Secur.	2007	DBLP DOI BibTeX RDF	Batch proof and verification of reencryption, batch proof and verification of decryption, mix network
4	J. Bergeron, H. Foster, A. Piziali, R. S. Mitra, C. Ahlschlager, D. Stein	Building a verification test plan: trading brute force for finesse.	DAC	2006	DBLP DOI BibTeX RDF	verification test plan, formal verification, coverage, design verification, functional simulation
4	Stuart Swan	SystemC transaction level models and RTL verification.	DAC	2006	DBLP DOI BibTeX RDF	RTL verification, hardware/software co-verification, systemC, hardware/software co-design, transaction level model, TLM
4	Daniel Große, Ulrich Kühne, Rolf Drechsler	HW/SW co-verification of embedded systems using bounded model checking.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	hardware/software co-verification, embedded systems, formal verification, SystemC, bounded model checking, PSL
4	Tobias Schüle, Klaus Schneider	Verification of Data Paths Using Unbounded Integers: Automata Strike Back.	Haifa Verification Conference	2006	DBLP DOI BibTeX RDF
4	Shmuel Ur	A Panel: Unpaved Road Between Hardware Verification and Software Testing Techniques.	Haifa Verification Conference	2006	DBLP DOI BibTeX RDF
4	Itai Yarom, Viji Patil	Smart-Lint: Improving the Verification Flow.	Haifa Verification Conference	2006	DBLP DOI BibTeX RDF
4	Maciej J. Ciesielski, Priyank Kalla, Serkan Askar	Taylor Expansion Diagrams: A Canonical Representation for Verification of Data Flow Designs.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	Register transfer level—design aids, arithmetic and logic structures—verification, symbolic and algebraic manipulation, verification
4	Guy Edward Gallasch, Jonathan Billington	Using Parametric Automata for the Verification of the Stop-and-Wait Class of Protocols.	ATVA	2005	DBLP DOI BibTeX RDF	Stop and Wait Protocols, Symbolic Automata, Language Equivalence, Coloured Petri Nets, Parametric Verification, Symbolic Reachability Graphs
4	Allon Adir, Yaron Arbetman, Bella Dubrov, Yossi Lichtenstein, Michal Rimon, Michael Vinov, Massimo A. Calligaro, Andrew Cofler, Gabriel Duffy	VLIW: a case study of parallelism verification.	DAC	2005	DBLP DOI BibTeX RDF	parallelism, test generation, VLIW, functional verification, processor verification
4	Francine Bacchini, Gabe Moretti, Harry Foster, Janick Bergeron, Masayuki Nakamura, Shrenik Mehta, Laurent Ducousso	Is methodology the highway out of verification hell?	DAC	2005	DBLP DOI BibTeX RDF	verification, formal verification, methodology, assertions
4	Milind Kulkarni, J. Benita Bommi	Assertion-Based Verification for the SpaceCAKE Multiprocessor - A Case Study.	Haifa Verification Conference	2005	DBLP DOI BibTeX RDF
4	Jayanta Bhadra, Andrew K. Martin, Jacob A. Abraham	A Formal Framework for Verification of Embedded Custom Memories of the Motorola MPC7450 Microprocessor.	Formal Methods in System Design	2005	DBLP DOI BibTeX RDF	efficient memory models, embedded memory verification, custom circuit verification, equivalence checking, symbolic trajectory evaluation
4	Cindy Eisner	Formal verification of software source code through semi-automatic modeling.	Software and System Modeling	2005	DBLP DOI BibTeX RDF	Program verification, Software verification, Functional verification, Software model checking
4	Reiner Dojen, Tom Coffey	The concept of layered proving trees and its application to the automation of security protocol verification.	ACM Trans. Inf. Syst. Secur.	2005	DBLP DOI BibTeX RDF	automated protocol verification, logic-based verification of security protocols, cryptography, Security protocols, cryptographic protocols
4	Wen-Kui Chang, Chun-Yuan Chen	Integrity-Enhanced Verification Scheme for Software-Intensive Organizations.	ATVA	2004	DBLP DOI BibTeX RDF	Software Capability Level, Software Integrity Level, ISO 9001:2000, Software Process Improvement (SPI), CMMI, Software Verification and Validation
4	Michael L. Behm, John M. Ludden, Yossi Lichtenstein, Michal Rimon, Michael Vinov	Industrial experience with test generation languages for processor verification.	DAC	2004	DBLP DOI BibTeX RDF	test generation, functional verification, processor verification
4	Philip W. L. Fong	Pluggable verification modules: an extensible protection mechanism for the JVM.	OOPSLA	2004	DBLP DOI BibTeX RDF	Aegis VM, extensible protection mechanism, pluggable verification modules, proof linking, Java virtual machine, bytecode verification, extensible systems, mobile code security
4	Tamarah Arons, Jozef Hooman, Hillel Kugler, Amir Pnueli, Mark van der Zwaag	Deductive Verification of UML Models in TLPVS.	UML	2004	DBLP DOI BibTeX RDF	Deductive Verification, UML, Semantics, Formal Verification, Temporal Logic, State Machines, PVS
4	Saddek Bensalem, Susanne Graf, Yassine Lakhnech	Abstraction as the Key for Invariant Verification.	Verification: Theory and Practice	2003	DBLP DOI BibTeX RDF
4	Manfred Broy	A Functional Calculus for Specification and Verification of Nondeterministic Interactive Systems.	Verification: Theory and Practice	2003	DBLP DOI BibTeX RDF
4	Patrick Cousot	Verification by Abstract Interpretation.	Verification: Theory and Practice	2003	DBLP DOI BibTeX RDF
4	Amir Pnueli, Tamarah Arons	TLPVS: A PVS-Based LTL Verification System.	Verification: Theory and Practice	2003	DBLP DOI BibTeX RDF
4	Wei-Tek Tsai, Lian Yu, Feng Zhu, Raymond A. Paul	Rapid Verification of Embedded Systems Using Patterns. (PDF / PS)	COMPSAC	2003	DBLP DOI BibTeX RDF	Verification patterns, model checking, verification, embedded systems, testing
4	Yu Huang, Wu-Tung Cheng	Using embedded infrastructure IP for SOC post-silicon verification.	DAC	2003	DBLP DOI BibTeX RDF	FPGA core, infrastructure IP (I-IP), post-silicon verification, transaction-based verification
4	Laurent Granvilliers, Vladik Kreinovich, Norbert Th. Müller	Novel Approaches to Numerical Software with Result Verification.	Numerical Software with Result Verification	2003	DBLP DOI BibTeX RDF