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1953-1960 (28) 1961-1962 (26) 1963-1964 (27) 1965-1966 (23) 1967 (25) 1968 (23) 1969 (23) 1970-1972 (20) 1973 (28) 1974 (65) 1975 (46) 1976 (66) 1977 (49) 1978 (69) 1979 (61) 1980 (82) 1981 (62) 1982 (86) 1983 (98) 1984 (120) 1985 (190) 1986 (167) 1987 (299) 1988 (430) 1989 (457) 1990 (582) 1991 (413) 1992 (511) 1993 (563) 1994 (739) 1995 (991) 1996 (1007) 1997 (1276) 1998 (1393) 1999 (2138) 2000 (2675) 2001 (3359) 2002 (3938) 2003 (4721) 2004 (6380) 2005 (7644) 2006 (9041) 2007 (9376) 2008 (10902) 2009 (7437) 2010 (1338) 2011 (588) 2012 (574) 2013 (580) 2014 (689) 2015 (653) 2016 (341)
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Found 82428 publication records. Showing 82419 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Baoyong Chi, Bingxue Shi A 1.8V 2.4GHz CMOS on-chip impedance matching low noise amplifier for WLAN applications. Search on Bibsonomy ISCAS (2) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
2Thomas Janik, Eric Liau, H. Lorenz, Manfred Menke, E. Plaettner, J. Schweden, H. Seitz, E. Vega-Ordonez A 1.8V p(seudo)SRAM using standard 140nm DRAM technology with self adapting clocked standby operation. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Hamid Charkhkar, Alireza Asadi, R. Lotfi A 1.8V, 10-bit, 40MS/s MOSFET-only pipeline analog-to-digital converter. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Sumio Morioka, Akashi Satoh A 10 Gbps Full-AES Crypto Design with a Twisted-BDD S-Box Architecture. Search on Bibsonomy ICCD The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
1J. Talebzadeh, M. R. Hasanzadeh, Mohammad Yavari, Omid Shoaei A 10-bit 150-MS/s, parallel pipeline A/D converter in 0.6-µm CMOS. Search on Bibsonomy ISCAS (3) The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
7Hironobu Akita, Takahisa Yoshimoto, Hirofumi Yamamoto, Nobuaki Matsudaira, Shigeki Ohtsuka, Shinichirou Taguchi A 10-bit fast lock all-digital data recovery with CR oscillator reference for automotive network. Search on Bibsonomy ISCAS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
2Babak Nejati, Omid Shoaei A 10-bit, 2.5-V, 40 M sample/s, pipelined analog-to-digital converter in 0.6-um CMOS. Search on Bibsonomy ISCAS (1) The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
1Sumio Morioka, Akashi Satoh A 10-Gbps full-AES crypto design with a twisted BDD S-Box architecture. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
7Panduka Wijetunga A 10.0Gb/s all-active LVDS receiver in 0.18µm CMOS technology. Search on Bibsonomy IEICE Electronic Express The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
7Saqib Subhan, Eric A. M. Klumperink, Amir Ghaffari, Gerard J. M. Wienk, Bram Nauta A 100-800 MHz 8-Path Polyphase Transmitter With Mixer Duty-Cycle Control Achieving $<-$40 dBc for ALL Harmonics. Search on Bibsonomy J. Solid-State Circuits The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Edward C. Lin, Kai Yu, Rob A. Rutenbar, Tsuhan Chen A 1000-word vocabulary, speaker-independent, continuous live-mode speech recognizer implemented in a single FPGA. Search on Bibsonomy FPGA The full citation details ... 2007 DBLP  DOI  BibTeX  RDF in silico vox, FPGA, speech recognition, DSP
7Young-Sang Kim, Seon-Kyoo Lee, Hong-June Park, Jae-Yoon Sim A 110 MHz to 1.4 GHz Locking 40-Phase All-Digital DLL. Search on Bibsonomy J. Solid-State Circuits The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Juan Francisco Fernández-Bootello, D. Brandano, R. Castro-López, José Manuel de la Rosa A 12-bit CMOS Current Steering D/A Converter for Embedded Systems. Search on Bibsonomy APCCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
7Farhad Sheikhhosseini, Abdolreza Nabavi A 120dB all CMOS variable gain amplifier based on new exponential equation. Search on Bibsonomy APCCAS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
7Sally Safwat, Ezz El-Din O. Hussein, Maged Ghoneima, Yehea I. Ismail A 12Gbps all digital low power SerDes transceiver for on-chip networking. Search on Bibsonomy ISCAS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
7Feng-Wei Kuo, Ron Chen, Kyle Yen, Hsien-Yuan Liao, Chewnpu Jou, Fu-Lung Hsueh, Masoud Babaie, Robert Bogdan Staszewski A 12mW all-digital PLL based on class-F DCO for 4G phones in 28nm CMOS. Search on Bibsonomy VLSIC The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Pascal Urard, L. Paumier, P. Georgelin, T. Michel, V. Lebars, E. Yeo, B. Gupta A 135Mbps DVB-S2 compliant codec based on 64800-bit LDPC and BCH codes (ISSCC paper 24.3). Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF DVB-S2, FEC (forward error correction), LDPC
2Chua-Chin Wang, Chi-Chun Huang, Jian-Sing Liou, Kuan-Wen Fang A 140-dB CMRR Low-noise Instrumentation Amplifier for Neural Signal Sensing. Search on Bibsonomy APCCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
7Wonsik Yu, KwangSeok Kim, SeongHwan Cho A 148fsrms integrated noise 4MHz bandwidth all-digital second-order ΔΣ time-to-digital converter using gated switched-ring oscillator. Search on Bibsonomy CICC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
7Keith A. Bowman, Sarthak Raina, Todd Bridges, Daniel Yingling, Hoan Nguyen, Brad Appel, Yesh Kolla, Jihoon Jeong, Francois Atallah, David Hansquine A 16 nm All-Digital Auto-Calibrating Adaptive Clock Distribution for Supply Voltage Droop Tolerance Across a Wide Operating Range. Search on Bibsonomy J. Solid-State Circuits The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
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