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1953-1960 (28) 1961-1962 (26) 1963-1964 (27) 1965-1966 (25) 1967 (25) 1968 (23) 1969 (23) 1970-1972 (22) 1973 (31) 1974 (66) 1975 (49) 1976 (67) 1977 (52) 1978 (71) 1979 (62) 1980 (83) 1981 (64) 1982 (88) 1983 (100) 1984 (122) 1985 (193) 1986 (171) 1987 (300) 1988 (431) 1989 (459) 1990 (587) 1991 (414) 1992 (512) 1993 (568) 1994 (740) 1995 (993) 1996 (1011) 1997 (1277) 1998 (1396) 1999 (2138) 2000 (2686) 2001 (3361) 2002 (3943) 2003 (4717) 2004 (6397) 2005 (7660) 2006 (9049) 2007 (9391) 2008 (10911) 2009 (7447) 2010 (1349) 2011 (596) 2012 (588) 2013 (592) 2014 (717) 2015 (684) 2016 (1003) 2017 (544) 2018 (2)
Publication types (Num. hits)
article(18337) book(21) incollection(2749) inproceedings(62697) phdthesis(40) proceedings(37)
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Found 83892 publication records. Showing 83881 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
7Shuai Chen, Hao Li, Liqiong Yang, Zongren Yang, Weiwu Hu, Patrick Yin Chiang A 1.2 pJ/b 6.4 Gb/s 8+1-lane forwarded-clock receiver with PVT-variation-tolerant all-digital clock and data recovery in 28nm CMOS. Search on Bibsonomy CICC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
7Cristina Azcona, Belén Calvo, Nicolás Medrano, Santiago Celma, Cecilia Gimeno A 1.2-V 1.35-μW all MOS temperature sensor for wireless sensor networks. Search on Bibsonomy ISCAS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
7Maciej Kurowski A 1.235 lower bound on the number of points needed to draw all n-vertex planar graphs. Search on Bibsonomy Inf. Process. Lett. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
7Benjamin Moss, Chen Sun, Michael Georgas, Jeffrey Shainline, Jason Orcutt, Jonathan Leu, Mark T. Wade, Yu-Hsin Chen, Kareem Nammari, Xiaoxi Wang, Hanqing Li, Rajeev J. Ram, Milos A. Popovic, Vladimir Stojanovic A 1.23pJ/b 2.5Gb/s monolithically integrated optical carrier-injection ring modulator and all-digital driver circuit in commercial 45nm SOI. Search on Bibsonomy ISSCC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Chua-Chin Wang, Po-Ming Lee, Rong-Chin Lee, Chenn-Jung Huang A 1.25 GHz 32-bit tree-structured carry lookahead adder. Search on Bibsonomy ISCAS (4) The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
7Chi-Shuang Oulee, Rong-Jyi Yang A 1.25Gbps all-digital clock and data recovery circuit with binary frequency acquisition. Search on Bibsonomy APCCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
7Susan M. Schober, John Choma Jr. A 1.25mW 0.8-28.2GHz charge pump PLL with 0.82ps RMS jitter in all-digital 40nm CMOS. Search on Bibsonomy ISCAS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
7Yuki Urano, Won-Joo Yun, Tadahiro Kuroda, Hiroki Ishikuro A 1.26mW/Gbps 8 locking cycles versatile all-digital CDR with TDC combined DLL. Search on Bibsonomy ISCAS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
7Davide De Caro, Carlo Alberto Romani, Nicola Petra, Antonio G. M. Strollo, Claudio Parrella A 1.27 GHz, All-Digital Spread Spectrum Clock Generator/Synthesizer in 65 nm CMOS. Search on Bibsonomy J. Solid-State Circuits The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Zhengming Fu, Eugenio Culurciello A 1.2mW CMOS temporal-difference image sensor for sensor networks. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Xavier Redondo, Jofre Pallares, Francisco Serra-Graells A 1.2V 130µA 10-bit MOS-Only Log-Domain Sigma Delta Modulator. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Sing-Ling Lee, Hann-Jang Ho A 1.5 Approximation Algorithm for Embedding Hyperedges in a Cycle. Search on Bibsonomy IEEE Trans. Parallel Distrib. Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Approximation algorithm, NP-complete, integer linear programming, hypergraph, LP-relaxation
7Michiel C. M. Soer, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet A 1.5-to-5.0GHz input-matched +2dBm P1dB all-passive switched-capacitor beamforming receiver front-end in 65nm CMOS. Search on Bibsonomy ISSCC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
7Julie R. Hu, Richard C. Ruby, Brian P. Otis A 1.56GHz wide-tuning all digital FBAR-based PLL in 0.13µm CMOS. Search on Bibsonomy CICC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
7Huiying Zhuo, Yu Li, Woogeun Rhee, Zhihua Wang A 1.5GHz all-digital frequency-locked loop with 1-bit ΔΣ frequency detection in 0.18μm CMOS. Search on Bibsonomy VLSI-DAT The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
8Tzu-Chiang Chao, Wei Hwang A 1.7mW all digital phase-locked loop with new gain generator and low power DCO. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Jun-Hong Weng, Meng-Ting Tsai, Jung-Mao Lin, Ching-Yuan Yang A 1.8-Gb/s burst-mode clock and data recovery circuit with a 1/4-rate clock technique. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Baoyong Chi, Bingxue Shi A 1.8V 2.4GHz CMOS on-chip impedance matching low noise amplifier for WLAN applications. Search on Bibsonomy ISCAS (2) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
2Thomas Janik, Eric Liau, H. Lorenz, Manfred Menke, E. Plaettner, J. Schweden, H. Seitz, E. Vega-Ordonez A 1.8V p(seudo)SRAM using standard 140nm DRAM technology with self adapting clocked standby operation. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Hamid Charkhkar, Alireza Asadi, R. Lotfi A 1.8V, 10-bit, 40MS/s MOSFET-only pipeline analog-to-digital converter. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
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