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1953-1960 (28) 1961-1962 (26) 1963-1964 (27) 1965-1966 (25) 1967 (25) 1968 (23) 1969 (23) 1970-1972 (20) 1973 (28) 1974 (65) 1975 (46) 1976 (66) 1977 (49) 1978 (69) 1979 (61) 1980 (82) 1981 (62) 1982 (86) 1983 (98) 1984 (120) 1985 (190) 1986 (167) 1987 (299) 1988 (430) 1989 (457) 1990 (582) 1991 (413) 1992 (511) 1993 (563) 1994 (739) 1995 (991) 1996 (1007) 1997 (1276) 1998 (1394) 1999 (2138) 2000 (2675) 2001 (3359) 2002 (3938) 2003 (4721) 2004 (6381) 2005 (7644) 2006 (9041) 2007 (9376) 2008 (10903) 2009 (7437) 2010 (1338) 2011 (588) 2012 (575) 2013 (580) 2014 (691) 2015 (654) 2016 (395)
Publication types (Num. hits)
article(17806) book(18) incollection(2721) inproceedings(61890) phdthesis(15) proceedings(32)
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Found 82491 publication records. Showing 82482 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Vijay Khawshe, Kapil Vyas, Renu Rangnekar, Prateek Goyal, Vijay Krishna, Kashinath Prabhu, Pravin Kumar Venkatesan, Leneesh Raghavan, Rajkumar Palwai, M. Thrivikraman, Kunal Desai, Abhijit Abhyankar A 2.4Gbps-4.8Gbps XDR-DRAM I/O (XIO) Link. Search on Bibsonomy VLSI Design The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Baoyong Chi, Jinke Yao, Shuguang Han, Xiang Xie, Guolin Li, Zhihua Wang A 2.4GHz low power wireless transceiver analog front-end for endoscopy capsule system. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1A. Tamtrakarn, N. Wongkomet A 2.5-V 10-bit 40-MS/S double sampling pipeline A/D converter. Search on Bibsonomy APCCAS (2) The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
7Richard Su, Steven Lanzisera, Kristofer S. J. Pister A 2.6psrms-period-jitter 900MHz all-digital fractional-N PLL built with standard cells. Search on Bibsonomy ESSCIRC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
7Mohammed Abdulaziz, Muhammad Shakir, Ping Lu, Pietro Andreani A 2.7GHz divider-less all digital phase-locked loop with 625Hz frequency resolution in 90nm CMOS. Search on Bibsonomy NORCHIP The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Angelo Nagari, Germano Nicollini A 2.7V 350muW 11-b Algorithmic Analog-to-Digital Converter with Single-Ended Multiplexed Inputs. Search on Bibsonomy DATE The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
7Do-Hwan Oh, Deok-Soo Kim, Suhwan Kim, Deog-Kyoon Jeong, Wonchan Kim A 2.8Gb/s All-Digital CDR with a 10b Monotonic DCO. Search on Bibsonomy ISSCC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
14Yu-Hao Hsu, Min-Sheng Kao, Hou-Cheng Tzeng, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu A 20 Gbps Scalable Load Balanced Birkhoff-von Neumann Symmetric TDM Switch IC with SERDES Interfaces. Search on Bibsonomy ASP-DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Birkhoff-von Neumann symmetric TDM switch IC, SERDES interfaces, load-balanced TDM switch IC, digital TDM switch, 8B10B CODEC, analog SERDES I/O interfaces, dual-mode SERDES, half-rate architectures, all static CMOS gates, wide-band CML buffer, PMOS active load scheme, 20 Gbit/s, high speed networking, CMOS technology, low power consumption, 0.18 micron
1Ching-Te Chiu, Chun-Chieh Chang, Shih-Min Chen, Hou-Cheng Tzeng, Ming-Chang Du, Yu-Ho Hsu, Jen-Ming Wu, Kai-Ming Feng A 20 Gbps Scalable Load-Balanced TDM Switch with CODEC for High Speed Networking Applications. Search on Bibsonomy IWSOC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
7Kyungmin Na, Heedon Jang, Hyunggun Ma, Yunho Choi, Franklin Bien A 200-Mb/s Data Rate 3.1-4.8-GHz IR-UWB All-Digital Pulse Generator With DB-BPSK Modulation. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
7Keith A. Bowman, Carlos Tokunaga, Tanay Karnik, Vivek K. De, James W. Tschanz A 22 nm All-Digital Dynamically Adaptive Clock Distribution for Supply Voltage Droop Tolerance. Search on Bibsonomy J. Solid-State Circuits The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
7Sang-Hyeok Chu, Woo-Rham Bae, Gyu-Seob Jeong, Sungchun Jang, Sungwoo Kim, Jiho Joo, Gyungock Kim, Deog-Kyoon Jeong A 22 to 26.5 Gb/s Optical Receiver With All-Digital Clock and Data Recovery in a 65 nm CMOS Process. Search on Bibsonomy J. Solid-State Circuits The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1T. H. Huang, Ertan Zencir, Numan Sadi Dogan, Andrea Arvas A 22-mW 435-MHz differential CMOS high-gain LNA for subsampling receivers. Search on Bibsonomy ISCAS (4) The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
1Conrad H. Ziesler, Joohee Kim, Visvesh S. Sathe, Marios C. Papaefthymiou A 225 MHz resonant clocked ASIC chip. Search on Bibsonomy ISLPED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF adiabatic logic, resonant LC tank, single phase, VLSI, CMOS, flip-flop, low energy, clock generator
7Chao Lu, Hua Wang, C. H. Peng, Ankush Goel, SangWon Son, Paul C. P. Liang, Ali Niknejad, H. C. Hwang, George Chien A 24.7dBm all-digital RF transmitter for multimode broadband applications in 40nm CMOS. Search on Bibsonomy ISSCC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
7Stepan Sutula, Jofre Pallares Cuxart, Javier Gonzalo-Ruiz, Francesc Xavier Munoz-Pascual, Lluís Terés, Francisco Serra-Graells A 25-µW All-MOS Potentiostatic Delta-Sigma ADC for Smart Electrochemical Sensors. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
8Michael S. McCorquodale, Scott M. Pernia, Sundus Kubba, Gordy A. Carichner, Justin D. O'Day, Eric D. Marsman, Jonathan J. Kuhn, Richard B. Brown A 25MHz all-CMOS reference clock generator for XO-replacement in serial wire interfaces. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1A. Hossein Nejad-Malayeri, T. Manku A 270 MHz, 1.8 V fully differential CMOS operational amplifier for switched capacitor channel select filters in wide-band wireless applications. Search on Bibsonomy ISCAS (1) The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
2Peter Bogner A 28mW 10b 80MS/s pipelined ADC in 0.13µm CMOS. Search on Bibsonomy ISCAS (1) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
7Ting-Chen Wei, Wei-Chang Liu, Chi-Yao Tseng, Syu-Siang Long, Shyh-Jye Jou, Muh-Tian Shiue A 28mW OFDM baseband receiver chip for DVB-T/H with all digital synchronization. Search on Bibsonomy CICC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
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