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1953-1960 (28) 1961-1962 (26) 1963-1964 (27) 1965-1966 (25) 1967 (25) 1968 (23) 1969 (23) 1970-1972 (20) 1973 (31) 1974 (66) 1975 (49) 1976 (67) 1977 (52) 1978 (71) 1979 (62) 1980 (83) 1981 (64) 1982 (88) 1983 (100) 1984 (121) 1985 (193) 1986 (171) 1987 (300) 1988 (431) 1989 (459) 1990 (586) 1991 (414) 1992 (511) 1993 (568) 1994 (740) 1995 (993) 1996 (1011) 1997 (1276) 1998 (1396) 1999 (2138) 2000 (2680) 2001 (3361) 2002 (3942) 2003 (4717) 2004 (6394) 2005 (7655) 2006 (9044) 2007 (9389) 2008 (10911) 2009 (7442) 2010 (1347) 2011 (593) 2012 (585) 2013 (589) 2014 (714) 2015 (677) 2016 (998) 2017 (367)
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Found 83653 publication records. Showing 83643 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
7Ja-Yol Lee, Mi-Jeong Park, Byonghoon Mhin, Seongdo Kim, Moon-Yang Park, Hyunku Yu A 4-GHz all digital fractional-N PLL with low-power TDC and big phase-error compensation. Search on Bibsonomy CICC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
7Ja-Yol Lee, Mi-Jeong Park, Byung-Hun Min, Seongdo Kim, Mun-Yang Park, Hyun-Kyu Yu A 4-GHz All Digital PLL With Low-Power TDC and Phase-Error Compensation. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
7Azaria Paz A 4-State Probablistic Table Approximating All 2-State Probablistic Tables. Search on Bibsonomy A Perspective in Theoretical Computer Science The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
1Mohammad Reza Nakhai, Farrokh Marvasti A 4.1 kb/s hybrid speech coder. Search on Bibsonomy ISCAS (3) The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
7Alan W. L. Ng, Shiyuan Zheng, Howard C. Luong A 4.1GHz-6.5GHz all-digital frequency synthesizer with a 2nd-order noise-shaping TDC and a transformer-coupled QVCO. Search on Bibsonomy ESSCIRC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
7Rakesh Kumar Palani, Ramesh Harjani A 4.6mW, 22dBm IIP3 all MOSCAP based 34-314MHz tunable continuous time filter in 65nm. Search on Bibsonomy CICC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
7I-Ting Lee, Kai-Hui Zeng, Shen-Iuan Liu A 4.8-GHz Dividerless Subharmonically Injection-Locked All-Digital PLL With a FOM of -252.5 dB. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
7N. Skarmoutsos, E. N. Lallas, Dimitris Syvridis, Thomas Sphicopoulos A 40 Gb/s IM payload/2.5 Gb/s header AOLS technique based on an all fiber realization. Search on Bibsonomy Optical Switching and Networking The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
7Chao-Ching Hung, Shen-Iuan Liu A 40-GHz Fast-Locked All-Digital Phase-Locked Loop Using a Modified Bang-Bang Algorithm. Search on Bibsonomy IEEE Trans. on Circuits and Systems The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
7Toshihiro Konishi, Hyeokjong Lee, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi A 40-nm 640-µm2 45-dB opampless all-digital second-order MASH ΔΣ ADC. Search on Bibsonomy ISCAS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
7Frank Opteynde A 40nm CMOS all-digital fractional-N synthesizer without requiring calibration. Search on Bibsonomy ISSCC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
7David D. Wentzloff, Anantha P. Chandrakasan A 47pJ/pulse 3.1-to-5GHz All-Digital UWB Transmitter in 90nm CMOS. Search on Bibsonomy ISSCC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Heidi G. Kuehn A 48-bit pseudo-random generator. Search on Bibsonomy Commun. ACM The full citation details ... 1961 DBLP  DOI  BibTeX  RDF
9Suresh Srinivasan, Sanu Mathew, Vasantha Erraguntla, Ram Krishnamurthy A 4Gbps 0.57pJ/bit Process-Voltage-Temperature Variation Tolerant All-Digital True Random Number Generator in 45nm CMOS. Search on Bibsonomy VLSI Design The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Yongjie Cheng, Craig Petrie, Brent Nordick A 4th order single-loop delta-sigma ADC with 8-bit two-step flash quantization. Search on Bibsonomy ISCAS (1) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
7Sally Safwat, Amr Lotfy, Maged Ghoneima, Yehea I. Ismail A 5-10GHz low power bang-bang all digital PLL based on programmable digital loop filter. Search on Bibsonomy ISCAS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
7Sung-Yong Cho, Sungwoo Kim, Min-Seong Choo, Jinhyung Lee, Han-Gon Ko, Sungchun Jang, Sang-Hyeok Chu, Woo-Rham Bae, Yoonsoo Kim, Deog-Kyoon Jeong A 5-GHz subharmonically injection-locked all-digital PLL with complementary switched injection. Search on Bibsonomy ESSCIRC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Xianyong Fang, Bin Luo, Haifeng Zhao, Yiwen Zhang A 5-Parameter Bundle Adjustment Method for Image Mosaic. Search on Bibsonomy ACIS-ICIS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
9Li-Pu Chuang, Ming-Hung Chang, Po-Tsang Huang, Chih-Hao Kan, Wei Hwang A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
7Nenad Pavlovic, Jos Bergervoet A 5.3GHz digital-to-time-converter-based fractional-N all-digital PLL. Search on Bibsonomy ISSCC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
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