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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/aspdac/LinLH11>
dc:creator <http://dblp.l3s.de/d2r/resource/authors/Hong-Ting_Lin>
dc:creator <http://dblp.l3s.de/d2r/resource/authors/Kuan-Yu_Lin>
dc:creator <http://dblp.l3s.de/d2r/resource/authors/Tsung-Yi_Ho>
foaf:homepage <http://dx.doi.org/10.1109%2FASPDAC.2011.5722304>
foaf:homepage <http://dx.doi.org/10.1109/ASPDAC.2011.5722304>
dc:identifier DBLP conf/aspdac/LinLH11 (xsd:string)
dc:identifier DOI 10.1109%2FASPDAC.2011.5722304 (xsd:string)
dcterms:issued 2011 (xsd:gYear)
rdfs:label An efficient algorithm of adjustable delay buffer insertion for clock skew minimization in multiple dynamic supply voltage designs. (xsd:string)
foaf:maker <http://dblp.l3s.de/d2r/resource/authors/Hong-Ting_Lin>
foaf:maker <http://dblp.l3s.de/d2r/resource/authors/Kuan-Yu_Lin>
foaf:maker <http://dblp.l3s.de/d2r/resource/authors/Tsung-Yi_Ho>
swrc:pages 825-830 (xsd:string)
dcterms:partOf <http://dblp.l3s.de/d2r/resource/publications/conf/aspdac/2011>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/aspdac/LinLH11/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/aspdac/LinLH11>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/aspdac/aspdac2011.html#LinLH11>
rdfs:seeAlso <http://dx.doi.org/10.1109/ASPDAC.2011.5722304>
swrc:series <http://dblp.l3s.de/d2r/resource/conferences/aspdac>
dc:title An efficient algorithm of adjustable delay buffer insertion for clock skew minimization in multiple dynamic supply voltage designs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document