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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/icpp/LiHC11>
dc:creator <http://dblp.l3s.de/d2r/resource/authors/Chin-Ling_Huang>
dc:creator <http://dblp.l3s.de/d2r/resource/authors/Chung-Ping_Chung>
dc:creator <http://dblp.l3s.de/d2r/resource/authors/Walter_Yuan-Hwa_Li>
foaf:homepage <http://doi.ieeecomputersociety.org/10.1109/ICPP.2011.73>
foaf:homepage <http://dx.doi.org/10.1109%2FICPP.2011.73>
dc:identifier DBLP conf/icpp/LiHC11 (xsd:string)
dc:identifier DOI 10.1109%2FICPP.2011.73 (xsd:string)
dcterms:issued 2011 (xsd:gYear)
rdfs:label Tolerating Load Miss-Latency by Extending Effective Instruction Window with Low Complexity. (xsd:string)
foaf:maker <http://dblp.l3s.de/d2r/resource/authors/Chin-Ling_Huang>
foaf:maker <http://dblp.l3s.de/d2r/resource/authors/Chung-Ping_Chung>
foaf:maker <http://dblp.l3s.de/d2r/resource/authors/Walter_Yuan-Hwa_Li>
swrc:pages 83-92 (xsd:string)
dcterms:partOf <http://dblp.l3s.de/d2r/resource/publications/conf/icpp/2011>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/icpp/LiHC11/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/icpp/LiHC11>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/icpp/icpp2011.html#LiHC11>
rdfs:seeAlso <http://doi.ieeecomputersociety.org/10.1109/ICPP.2011.73>
swrc:series <http://dblp.l3s.de/d2r/resource/conferences/icpp>
dc:subject Processor Architecture, Instruction-Level Parallelism, Memory-Level Parallelism, Runahead Execution, Execute Ahead, Hardware Speculation (xsd:string)
dc:title Tolerating Load Miss-Latency by Extending Effective Instruction Window with Low Complexity. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document