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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/islped/EfthymiouG02>
dc:creator <http://dblp.l3s.de/d2r/resource/authors/Aristides_Efthymiou>
dc:creator <http://dblp.l3s.de/d2r/resource/authors/Jim_D._Garside>
foaf:homepage <http://doi.acm.org/10.1145/566408.566445>
foaf:homepage <http://dx.doi.org/10.1145%2F566408.566445>
dc:identifier DBLP conf/islped/EfthymiouG02 (xsd:string)
dc:identifier DOI 10.1145%2F566408.566445 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
rdfs:label An adaptive serial-parallel CAM architecture for low-power cache blocks. (xsd:string)
foaf:maker <http://dblp.l3s.de/d2r/resource/authors/Aristides_Efthymiou>
foaf:maker <http://dblp.l3s.de/d2r/resource/authors/Jim_D._Garside>
swrc:pages 136-141 (xsd:string)
dcterms:partOf <http://dblp.l3s.de/d2r/resource/publications/conf/islped/2002>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/islped/EfthymiouG02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/islped/EfthymiouG02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/islped/islped2002.html#EfthymiouG02>
rdfs:seeAlso <http://doi.acm.org/10.1145/566408.566445>
swrc:series <http://dblp.l3s.de/d2r/resource/conferences/islped>
dc:subject CAM, VLSI, asynchronous circuits, cache design, low energy, low power (xsd:string)
dc:title An adaptive serial-parallel CAM architecture for low-power cache blocks. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document