Layout-Driven Timing Optimization by Generalized De Morgan Transform. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/ChakrabortyM02>
dc:creator	<http://dblp.l3s.de/d2r/resource/authors/Rajeev_Murgai>
dc:creator	<http://dblp.l3s.de/d2r/resource/authors/Supratik_Chakraborty>
foaf:homepage	<http://doi.ieeecomputersociety.org/10.1109/ASPDAC.2002.995009>
foaf:homepage	<http://dx.doi.org/10.1109%2FASPDAC.2002.995009>
dc:identifier	DBLP conf/vlsid/ChakrabortyM02 (xsd:string)
dc:identifier	DOI 10.1109%2FASPDAC.2002.995009 (xsd:string)
dcterms:issued	2002 (xsd:gYear)
rdfs:label	Layout-Driven Timing Optimization by Generalized De Morgan Transform. (xsd:string)
foaf:maker	<http://dblp.l3s.de/d2r/resource/authors/Rajeev_Murgai>
foaf:maker	<http://dblp.l3s.de/d2r/resource/authors/Supratik_Chakraborty>
swrc:pages	647-654 (xsd:string)
dcterms:partOf	<http://dblp.l3s.de/d2r/resource/publications/conf/vlsid/2002>
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/conf/vlsid/ChakrabortyM02/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/conf/vlsid/ChakrabortyM02>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/vlsid/vlsid2002.html#ChakrabortyM02>
rdfs:seeAlso	<http://doi.ieeecomputersociety.org/10.1109/ASPDAC.2002.995009>
swrc:series	<http://dblp.l3s.de/d2r/resource/conferences/vlsid>
dc:subject	Timing optimization, timing closure, layout-driven optimization, in-place circuit optimization, DeMorgan transformation, deep sub-micron design (xsd:string)
dc:title	Layout-Driven Timing Optimization by Generalized De Morgan Transform. (xsd:string)
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rdf:type	swrc:InProceedings
rdf:type	foaf:Document