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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/3dic/WidiantoYOTH11>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Akira_Ono>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hiroyuki_Yotsuyanagi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masaki_Hashizume>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masao_Takagi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Widianto>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F3DIC.2012.6263041>
foaf:homepage <https://doi.org/10.1109/3DIC.2012.6263041>
dc:identifier DBLP conf/3dic/WidiantoYOTH11 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F3DIC.2012.6263041 (xsd:string)
dcterms:issued 2011 (xsd:gYear)
rdfs:label A built-in test circuit for open defects at interconnects between dies in 3D ICs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Akira_Ono>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hiroyuki_Yotsuyanagi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masaki_Hashizume>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masao_Takagi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Widianto>
swrc:pages 1-5 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/3dic/2011>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/3dic/WidiantoYOTH11/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/3dic/WidiantoYOTH11>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/3dic/3dic2011.html#WidiantoYOTH11>
rdfs:seeAlso <https://doi.org/10.1109/3DIC.2012.6263041>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/3dic>
dc:title A built-in test circuit for open defects at interconnects between dies in 3D ICs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document