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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/IEEEcit/TangWCHKZ10>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Binbin_Wu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jiexiang_Kang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tianzhou_Chen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wei_Hu_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xingsheng_Tang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhenwei_Zheng>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FCIT.2010.429>
foaf:homepage <https://doi.org/10.1109/CIT.2010.429>
dc:identifier DBLP conf/IEEEcit/TangWCHKZ10 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FCIT.2010.429 (xsd:string)
dcterms:issued 2010 (xsd:gYear)
rdfs:label Network Main Memory Architecture for NoC-Based Chips. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Binbin_Wu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jiexiang_Kang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tianzhou_Chen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wei_Hu_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xingsheng_Tang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhenwei_Zheng>
swrc:pages 2516-2523 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/IEEEcit/2010>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/IEEEcit/TangWCHKZ10/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/IEEEcit/TangWCHKZ10>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/IEEEcit/IEEEcit2010.html#TangWCHKZ10>
rdfs:seeAlso <https://doi.org/10.1109/CIT.2010.429>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/IEEEcit>
dc:subject network on chip, main memory, memory bandwidth (xsd:string)
dc:title Network Main Memory Architecture for NoC-Based Chips. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document