Code Size Efficiency in Global Scheduling for ILP Processors.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/IEEEinteract/ZhouC02
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Code Size Efficiency in Global Scheduling for ILP Processors.
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Code Size Efficiency, I-cache Performance, Instruction Level Parallelism (ILP), Code Replication, Tail Duplication, Optimal Code Size Efficiency, Quantitative Measure, Diminishing Returns.
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Code Size Efficiency in Global Scheduling for ILP Processors.
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