Leveraging on-chip networks for data cache migration in chip multiprocessors.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/IEEEpact/EisleyPS08
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2008
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Leveraging on-chip networks for data cache migration in chip multiprocessors.
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CMP, chip-multiprocessor, interconnection network, migration, network-driven computing
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Leveraging on-chip networks for data cache migration in chip multiprocessors.
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