Core architecture optimization for heterogeneous chip multiprocessors.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/IEEEpact/KumarTJ06
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Core architecture optimization for heterogeneous chip multiprocessors.
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computer architecture, heterogeneous chip multiprocessors, multi-core architectures
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Core architecture optimization for heterogeneous chip multiprocessors.
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