Development and Validation of a Load Balancing and Control Mechanism for a Reconfigurable Single-Chip Heterogenous and Hybrid Multiprocessor Architecture Platform. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/J._Robert_Heath>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Kanchan_Bhide>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Sridhar_Hegde>
dc:identifier	DBLP conf/ISCApdcs/HeathHB09 (xsd:string)
dcterms:issued	2009 (xsd:gYear)
rdfs:label	Development and Validation of a Load Balancing and Control Mechanism for a Reconfigurable Single-Chip Heterogenous and Hybrid Multiprocessor Architecture Platform. (xsd:string)
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swrc:pages	228-235 (xsd:string)
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dc:title	Development and Validation of a Load Balancing and Control Mechanism for a Reconfigurable Single-Chip Heterogenous and Hybrid Multiprocessor Architecture Platform. (xsd:string)
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