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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/aca/ZhangLW20>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gen_Li>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lei_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ying_Zhang_0032>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-981-15-8135-9%5F24>
foaf:homepage <https://doi.org/10.1007/978-981-15-8135-9_24>
dc:identifier DBLP conf/aca/ZhangLW20 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-981-15-8135-9%5F24 (xsd:string)
dcterms:issued 2020 (xsd:gYear)
rdfs:label A High-Performance with Low-Resource Utility FPGA Implementation of Variable Size HEVC 2D-DCT Transform. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gen_Li>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lei_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ying_Zhang_0032>
swrc:pages 325-333 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/aca/2020>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/aca/ZhangLW20/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/aca/ZhangLW20>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/aca/aca2020.html#ZhangLW20>
rdfs:seeAlso <https://doi.org/10.1007/978-981-15-8135-9_24>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/aca>
dc:title A High-Performance with Low-Resource Utility FPGA Implementation of Variable Size HEVC 2D-DCT Transform. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document